sound/soc/codecs/rk1000_codec.c

   1 /*
   2  * rk1000.c -- RK1000 ALSA SoC audio driver
   3  *
   4  * Copyright (C) 2009 rockchip lhh
   5  *
   6  *
   7  * Based on RK1000.c
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13 #include <linux/vmalloc.h>
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/slab.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/pm.h>
  20 #include <linux/i2c.h>
  21 #include <linux/platform_device.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/initval.h>
  28 #include <linux/of.h>
  29 #include <linux/of_gpio.h>
  30 #include "rk1000_codec.h"
  31
  32
  33 /*
  34  * Debug
  35  */
  36 #define RK1000_CODEC_DBG 0
  37 #if RK1000_CODEC_DBG
  38 #define DBG(x...)       pr_info(x)
  39 #else
  40 #define DBG(x...)
  41 #endif
  42
  43 /*rk1000 codec proc debug*/
  44 #define RK1000_CODEC_PROC 1
  45
  46 #define HP_OUT 0
  47 #define HP_IN  1
  48 #define USE_MIC_IN
  49 #define USE_LPF
  50
  51 #define FREQ441KHZ    (0x11 << 1)
  52 /* rk1000 output volume,DAC Digital Gain */
  53 /* 0x0000 ~ 0xF42 */
  54 #define VOLUME_OUTPUT 0xF42
  55 /* 0x0 ~ 0x3f(bit0-bit5)         max=0x0(+6DB) min=0x3f(-60DB)   Analog Gain */
  56 #define VOLUME_CODEC_PA 0x0
  57
  58 /* rk1000 input volume,rk610 can not adjust the recording volume */
  59 #define VOLUME_INPUT 0x07
  60
  61 #define OUT_CAPLESS  (1)
  62
  63 /* 1:set pll from rk1000 */
  64 #define RK1000_CTL_PLL 0
  65
  66 static u8 g_r0_a_reg;
  67 static u8 g_r0_b_reg;
  68
  69 /*
  70  * rk1000 register cache
  71  * We can't read the RK1000 register space when we
  72  * are using 2 wire for device control, so we cache them instead.
  73  */
  74 static const u16 rk1000_codec_reg[] = {
  75         0x0005, 0x0004, 0x00fd, 0x00f3,  /*  0 */
  76         0x0003, 0x0000, 0x0000, 0x0000,  /*  4 */
  77         0x0000, 0x0005, 0x0000, 0x0000,  /*  8 */
  78         0x0097, 0x0097, 0x0097, 0x0097,  /* 0x0a */
  79         0x0097, 0x0097, 0x00cc, 0x0000,  /* 0x10 */
  80         0x0000, 0x00f1, 0x0090, 0x00ff,  /* 0x14 */
  81         0x00ff, 0x00ff, 0x009c, 0x0000,  /* 0x18 */
  82         0x0000, 0x00ff, 0x00ff, 0x00ff,  /* 0x1a */
  83 };
  84
  85 static struct snd_soc_codec *rk1000_codec_codec;
  86 /* codec private data */
  87 struct rk1000_codec_priv {
  88         enum snd_soc_control_type control_type;
  89         unsigned int sysclk;
  90         struct snd_soc_codec codec;
  91         struct snd_pcm_hw_constraint_list *sysclk_constraints;
  92         u16 reg_cache[RK1000_CODEC_NUM_REG];
  93
  94         struct delayed_work rk1000_delayed_work;
  95         unsigned int spk_ctrl_io;
  96         enum of_gpio_flags flags;
  97         /*
  98                 Some amplifiers enable a longer time.
  99                 config after pa_enable_io delay pa_enable_time(ms)
 100                 so value range is 0 - 8000.
 101         */
 102         unsigned int pa_enable_time;
 103         /* if found boot pop,set boot_depop 1 test */
 104         int boot_depop;
 105         int call_enable;
 106         int headset_status;
 107 };
 108
 109
 110 static void spk_ctrl_fun(int status)
 111 {
 112         struct rk1000_codec_priv *rk1000_codec;
 113
 114         if (rk1000_codec_codec == NULL)
 115                 return;
 116         rk1000_codec = snd_soc_codec_get_drvdata(rk1000_codec_codec);
 117         if (rk1000_codec == NULL)
 118                 return;
 119         if (!rk1000_codec->spk_ctrl_io)
 120                 return;
 121         DBG("%s:: spk status = %d\n", __func__, status);
 122         if (status)
 123                 gpio_set_value(rk1000_codec->spk_ctrl_io,
 124                                rk1000_codec->flags);
 125         else
 126                 gpio_set_value(rk1000_codec->spk_ctrl_io,
 127                                !rk1000_codec->flags);
 128 }
 129
 130
 131 /*
 132  * read rk1000 register cache
 133  */
 134 static unsigned int rk1000_codec_read_reg_cache(struct snd_soc_codec *codec,
 135                                                 unsigned int reg)
 136 {
 137         u16 *cache = codec->reg_cache;
 138
 139         if (reg > RK1000_CACHE_REGNUM)
 140                 return -1;
 141         return cache[reg];
 142 }
 143
 144 static unsigned int rk1000_codec_read(struct snd_soc_codec *codec,
 145                                       unsigned int r)
 146 {
 147         struct i2c_msg xfer[1];
 148         int reg;
 149         int ret;
 150         struct i2c_client *i2c;
 151
 152         reg = r;
 153         i2c = to_i2c_client(codec->dev);
 154         /* Read register */
 155         xfer[0].addr = (i2c->addr & 0x60) | (reg);
 156         xfer[0].flags = I2C_M_RD;
 157         xfer[0].len = 1;
 158         xfer[0].buf = (unsigned char *)&reg;
 159         xfer[0].scl_rate = 100000;
 160         ret = i2c_transfer(i2c->adapter, xfer, 1);
 161         if (ret != 1) {
 162                 dev_err(&i2c->dev, "i2c_transfer() returned %d\n", ret);
 163                 return 0;
 164         }
 165         return reg;
 166 }
 167
 168 /*
 169  * write rk1000 register cache
 170  */
 171 static inline void rk1000_codec_write_reg_cache(struct snd_soc_codec *codec,
 172                                                 unsigned int reg,
 173                                                 unsigned int value)
 174 {
 175         u16 *cache;
 176
 177         cache = codec->reg_cache;
 178         if (reg > RK1000_CACHE_REGNUM)
 179                 return;
 180         cache[reg] = value;
 181 }
 182
 183 static int rk1000_codec_write(struct snd_soc_codec *codec, unsigned int reg,
 184                               unsigned int value)
 185 {
 186 #ifdef CONFIG_MODEM_SOUND
 187         struct rk1000_codec_priv *rk1000_codec;
 188 #endif
 189         u8 data[2];
 190         struct i2c_client *i2c;
 191
 192         i2c = to_i2c_client(codec->dev);
 193 #ifdef CONFIG_MODEM_SOUND
 194         rk1000_codec = snd_soc_codec_get_drvdata(rk1000_codec_codec);
 195         if (rk1000_codec->call_enable)
 196                 return 0;
 197 #endif
 198         DBG("Enter::%s, %d, reg=0x%02X, value=0x%02X\n", __func__,
 199             __LINE__, reg, value);
 200         data[0] = value & 0x00ff;
 201         i2c->addr = (i2c->addr & 0x60)|reg;
 202         if (codec->hw_write(i2c, data, 1) == 1) {
 203                 DBG("====%s %d Run OK=======\n", __func__, __LINE__);
 204                 rk1000_codec_write_reg_cache(codec, reg, value);
 205                 return 0;
 206         } else {
 207                 DBG("====%s %d Run EIO=====\n", __func__, __LINE__);
 208                 return -EIO;
 209         }
 210 }
 211
 212 #ifdef CONFIG_MODEM_SOUND
 213 static int rk1000_codec_write_incall(struct snd_soc_codec *codec,
 214                                      unsigned int reg, unsigned int value)
 215 {
 216         u8 data[2];
 217         struct i2c_client *i2c;
 218
 219         DBG("Enter::%s, %d, reg=0x%02X, value=0x%02X\n",
 220             __func__, __LINE__, reg, value);
 221         i2c = to_i2c_client(codec->dev);
 222         data[0] = value & 0x00ff;
 223         rk1000_codec_write_reg_cache(codec, reg, value);
 224         i2c = (struct i2c_client *)codec->control_data;
 225         i2c->addr = (i2c->addr & 0x60) | reg;
 226         if (codec->hw_write(i2c, data, 1) == 1)
 227                 return 0;
 228         else
 229                 return -EIO;
 230 }
 231
 232 void call_set_spk(int on)
 233 {
 234         struct rk1000_codec_priv *rk1000_codec;
 235
 236         if (!rk1000_codec_codec)
 237                 return;
 238         rk1000_codec = snd_soc_codec_get_drvdata(rk1000codec_codec);
 239         if (!rk1000_codec)
 240                 return;
 241
 242         switch (on) {
 243         case 0:
 244                 /* modem exit call,codec disable loopback */
 245                 DBG("%s modem exit call\n", __func__);
 246                 rk1000_codec_write_incall(rk1000_codec_codec,
 247                                           ACCELCODEC_R0E, 0x80);
 248                 rk1000_codec->call_enable = 0;
 249                 break;
 250         case 1:
 251                 /* modem calling,codec enable loopback,
 252                 * spk hp different volume */
 253                 DBG("%s spk incalling\n", __func__);
 254                 rk1000_codec->call_enable = 1;
 255                 rk1000_codec_write_incall(rk1000_codec_codec,
 256                                           ACCELCODEC_R0E, 0x00);
 257                 return;
 258         case 2:
 259                 DBG("%s hp incalling\n", __func__);
 260                 rk1000_codec->call_enable = 1;
 261                 rk1000_codec_write_incall(rk1000_codec_codec,
 262                                           ACCELCODEC_R0E, 0x00);
 263                 break;
 264         case 3:
 265                 DBG("%s bt incalling\n", __func__);
 266                 rk1000_codec->call_enable = 1;
 267                 rk1000_codec_write_incall(rk1000_codec_codec,
 268                                           ACCELCODEC_R0E, 0x00);
 269                 break;
 270         }
 271 }
 272 #endif
 273
 274
 275
 276 struct _coeff_div {
 277         u32 mclk;
 278         u32 rate;
 279         u16 fs;
 280         u8 sr:5;
 281         u8 usb:1;
 282         u8 bclk;
 283 };
 284
 285 /* codec hifi mclk clock divider coefficients */
 286 static const struct _coeff_div coeff_div[] = {
 287         /* 8k */
 288         {12288000, 8000, 1536, 0x6, 0x0, ASC_BCLKDIV_16},
 289         {11289600, 8000, 1408, 0x16, 0x0, ASC_BCLKDIV_16},
 290         {18432000, 8000, 2304, 0x7, 0x0, ASC_BCLKDIV_16},
 291         {16934400, 8000, 2112, 0x17, 0x0, ASC_BCLKDIV_16},
 292         {8192000, 8000, 1024, 0x0, 0x0, ASC_BCLKDIV_16},
 293         {12000000, 8000, 1500, 0x6, 0x1, ASC_BCLKDIV_16},
 294         /* 11.025k */
 295         {11289600, 11025, 1024, 0x18, 0x0, ASC_BCLKDIV_16},
 296         {16934400, 11025, 1536, 0x19, 0x0, ASC_BCLKDIV_16},
 297         {12000000, 11025, 1088, 0x19, 0x1, ASC_BCLKDIV_16},
 298         /* 12k */
 299         {12288000, 12000, 1024, 0x8, 0x0, ASC_BCLKDIV_16},
 300         {18432000, 12000, 1536, 0x9, 0x0, ASC_BCLKDIV_16},
 301         {12000000, 12000, 1000, 0x8, 0x1, ASC_BCLKDIV_16},
 302         /* 16k */
 303         {12288000, 16000, 768, 0xa, 0x0, ASC_BCLKDIV_8},
 304         {18432000, 16000, 1152, 0xb, 0x0, ASC_BCLKDIV_8},
 305         {12000000, 16000, 750, 0xa, 0x1, ASC_BCLKDIV_8},
 306         /* 22.05k */
 307         {11289600, 22050, 512, 0x1a, 0x0, ASC_BCLKDIV_8},
 308         {16934400, 22050, 768, 0x1b, 0x0, ASC_BCLKDIV_8},
 309         {12000000, 22050, 544, 0x1b, 0x1, ASC_BCLKDIV_8},
 310         /* 24k */
 311         {12288000, 24000, 512, 0x1c, 0x0, ASC_BCLKDIV_8},
 312         {18432000, 24000, 768, 0x1d, 0x0, ASC_BCLKDIV_8},
 313         {12000000, 24000, 500, 0x1c, 0x1, ASC_BCLKDIV_8},
 314         /* 32k */
 315         {12288000, 32000, 384, 0xc, 0x0, ASC_BCLKDIV_8},
 316         {18432000, 32000, 576, 0xd, 0x0, ASC_BCLKDIV_8},
 317         {12000000, 32000, 375, 0xa, 0x1, ASC_BCLKDIV_8},
 318         /* 44.1k */
 319         {11289600, 44100, 256, 0x10, 0x0, ASC_BCLKDIV_4},
 320         {16934400, 44100, 384, 0x11, 0x0, ASC_BCLKDIV_8},
 321         {12000000, 44100, 272, 0x11, 0x1, ASC_BCLKDIV_8},
 322         /* 48k */
 323         {12288000, 48000, 256, 0x0, 0x0, ASC_BCLKDIV_4},
 324         {18432000, 48000, 384, 0x1, 0x0, ASC_BCLKDIV_4},
 325         {12000000, 48000, 250, 0x0, 0x1, ASC_BCLKDIV_4},
 326         /* 88.2k */
 327         {11289600, 88200, 128, 0x1e, 0x0, ASC_BCLKDIV_4},
 328         {16934400, 88200, 192, 0x1f, 0x0, ASC_BCLKDIV_4},
 329         {12000000, 88200, 136, 0x1f, 0x1, ASC_BCLKDIV_4},
 330         /* 96k */
 331         {12288000, 96000, 128, 0xe, 0x0, ASC_BCLKDIV_4},
 332         {18432000, 96000, 192, 0xf, 0x0, ASC_BCLKDIV_4},
 333         {12000000, 96000, 125, 0xe, 0x1, ASC_BCLKDIV_4},
 334 };
 335
 336 static inline int get_coeff(int mclk, int rate)
 337 {
 338         int i;
 339
 340         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
 341                 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
 342                         return i;
 343         }
 344         return -EINVAL;
 345 }
 346
 347 /* The set of rates we can generate from the above for each SYSCLK */
 348
 349 static unsigned int rates_12288[] = {
 350         8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
 351 };
 352
 353 static struct snd_pcm_hw_constraint_list constraints_12288 = {
 354         .count  = ARRAY_SIZE(rates_12288),
 355         .list   = rates_12288,
 356 };
 357
 358 static unsigned int rates_112896[] = {
 359         8000, 11025, 22050, 44100,
 360 };
 361
 362 static struct snd_pcm_hw_constraint_list constraints_112896 = {
 363         .count  = ARRAY_SIZE(rates_112896),
 364         .list   = rates_112896,
 365 };
 366
 367 static unsigned int rates_12[] = {
 368         8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
 369         48000, 88235, 96000,
 370 };
 371
 372 static struct snd_pcm_hw_constraint_list constraints_12 = {
 373         .count  = ARRAY_SIZE(rates_12),
 374         .list   = rates_12,
 375 };
 376
 377 static int rk1000_codec_set_bias_level(struct snd_soc_codec *codec,
 378                                        enum snd_soc_bias_level level)
 379 {
 380         DBG("Enter::%s----%d now_level =%d  old_level = %d\n",
 381             __func__, __LINE__, level, codec->dapm.bias_level);
 382         switch (level) {
 383         case SND_SOC_BIAS_ON:
 384                 break;
 385         case SND_SOC_BIAS_PREPARE:
 386                 rk1000_codec_write(codec, ACCELCODEC_R1D, 0x2a);
 387                 rk1000_codec_write(codec, ACCELCODEC_R1E, 0x40);
 388                 rk1000_codec_write(codec, ACCELCODEC_R1F, 0x49);
 389                 /*VREF, VMID=2x50k, digital enabled */
 390                 break;
 391
 392         case SND_SOC_BIAS_STANDBY:
 393                 DBG("rk1000 standby\n");
 394                 rk1000_codec_write(codec, ACCELCODEC_R1D, 0x2a);
 395                 rk1000_codec_write(codec, ACCELCODEC_R1E, 0x40);
 396                 rk1000_codec_write(codec, ACCELCODEC_R1F, 0x49);
 397                 break;
 398
 399         case SND_SOC_BIAS_OFF:
 400                 DBG("rk1000 power off\n");
 401                 spk_ctrl_fun(GPIO_LOW);
 402                 rk1000_codec_write(codec, ACCELCODEC_R1D, 0xFF);
 403                 rk1000_codec_write(codec, ACCELCODEC_R1E, 0xFF);
 404                 rk1000_codec_write(codec, ACCELCODEC_R1F, 0xFF);
 405                 break;
 406         }
 407         codec->dapm.bias_level = level;
 408         return 0;
 409 }
 410 /*
 411  * Note that this should be called from init rather than from hw_params.
 412  */
 413 static int rk1000_codec_set_dai_sysclk(struct snd_soc_dai *codec_dai,
 414                                        int clk_id, unsigned int freq, int dir)
 415 {
 416         struct snd_soc_codec *codec = codec_dai->codec;
 417         struct rk1000_codec_priv *rk1000_codec;
 418
 419         DBG("Enter::%s----%d\n", __func__, __LINE__);
 420         rk1000_codec = snd_soc_codec_get_drvdata(codec);
 421         switch (freq) {
 422         case 11289600:
 423         case 18432000:
 424         case 22579200:
 425         case 36864000:
 426                 rk1000_codec->sysclk_constraints = &constraints_112896;
 427                 rk1000_codec->sysclk = freq;
 428                 return 0;
 429
 430         case 12288000:
 431         case 16934400:
 432         case 24576000:
 433         case 33868800:
 434                 rk1000_codec->sysclk_constraints = &constraints_12288;
 435                 rk1000_codec->sysclk = freq;
 436                 return 0;
 437
 438         case 12000000:
 439         case 24000000:
 440                 rk1000_codec->sysclk_constraints = &constraints_12;
 441                 rk1000_codec->sysclk = freq;
 442                 return 0;
 443         }
 444         return -EINVAL;
 445 }
 446
 447 static int rk1000_codec_set_dai_fmt(struct snd_soc_dai *codec_dai,
 448                                     unsigned int fmt)
 449 {
 450         struct snd_soc_codec *codec = codec_dai->codec;
 451         struct rk1000_codec_priv *rk1000_codec;
 452         u16 iface = 0;
 453
 454         rk1000_codec = snd_soc_codec_get_drvdata(codec);
 455         /* setup Vmid and Vref, other module power down */
 456         rk1000_codec_write(codec, ACCELCODEC_R1D, 0x2a);
 457         rk1000_codec_write(codec, ACCELCODEC_R1E, 0x40);
 458         /* set master/slave audio interface */
 459         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 460         case SND_SOC_DAIFMT_CBM_CFM:
 461                 iface = 0x0040;
 462                 break;
 463         case SND_SOC_DAIFMT_CBS_CFS:
 464                 iface = 0x0000;
 465                 break;
 466         default:
 467                 return -EINVAL;
 468         }
 469         /* interface format */
 470         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 471         case SND_SOC_DAIFMT_I2S:
 472                 iface |= 0x0002;
 473                 break;
 474         case SND_SOC_DAIFMT_RIGHT_J:
 475                 break;
 476         case SND_SOC_DAIFMT_LEFT_J:
 477                 iface |= 0x0001;
 478                 break;
 479         case SND_SOC_DAIFMT_DSP_A:
 480                 iface |= 0x0003;
 481                 break;
 482         case SND_SOC_DAIFMT_DSP_B:
 483                 iface |= 0x0013;
 484                 break;
 485         default:
 486                 return -EINVAL;
 487         }
 488         /* clock inversion */
 489         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 490         case SND_SOC_DAIFMT_NB_NF:
 491                 break;
 492         case SND_SOC_DAIFMT_IB_IF:
 493                 iface |= 0x0090;
 494                 break;
 495         case SND_SOC_DAIFMT_IB_NF:
 496                 iface |= 0x0080;
 497                 break;
 498         case SND_SOC_DAIFMT_NB_IF:
 499                 iface |= 0x0010;
 500                 break;
 501         default:
 502                 return -EINVAL;
 503         }
 504         DBG("Enter::%s----%d  iface=%x\n", __func__, __LINE__, iface);
 505         rk1000_codec_write(codec, ACCELCODEC_R09, iface);
 506         return 0;
 507 }
 508
 509
 510
 511 static int rk1000_codec_pcm_hw_params(struct snd_pcm_substream *substream,
 512                                       struct snd_pcm_hw_params *params,
 513                                       struct snd_soc_dai *dai)
 514 {
 515         u16 iface;
 516         int coeff;
 517         struct snd_soc_pcm_runtime *rtd;
 518         struct snd_soc_codec *codec;
 519         unsigned int dai_fmt;
 520
 521         rtd = substream->private_data;
 522         codec = rtd->codec;
 523         dai_fmt = rtd->card->dai_link[0].dai_fmt;
 524         iface = rk1000_codec_read_reg_cache(codec, ACCELCODEC_R09) & 0x1f3;
 525         coeff = 0;
 526         rk1000_codec_write(codec, ACCELCODEC_R0C, 0x17);
 527         rk1000_codec_write(codec, ACCELCODEC_R04, ASC_INT_MUTE_L|ASC_INT_MUTE_R|
 528                            ASC_SIDETONE_L_OFF|ASC_SIDETONE_R_OFF);
 529         rk1000_codec_write(codec, ACCELCODEC_R0B,
 530                            ASC_DEC_DISABLE|ASC_INT_DISABLE);
 531         /* set iface & srate */
 532         if ((dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
 533                 iface |= ASC_INVERT_BCLK;
 534         rk1000_codec_write(codec, ACCELCODEC_R09, iface);
 535         if (coeff >= 0)
 536                 rk1000_codec_write(codec, ACCELCODEC_R0A, 0xa0);
 537         rk1000_codec_write(codec, ACCELCODEC_R0B, g_r0_b_reg);
 538         return 0;
 539 }
 540
 541
 542
 543 static int rk1000_codec_mute(struct snd_soc_dai *dai, int mute)
 544 {
 545         struct snd_soc_codec *codec = dai->codec;
 546         struct rk1000_codec_priv *rk1000_codec;
 547
 548         DBG("Enter::%s----%d--mute=%d\n", __func__, __LINE__, mute);
 549         rk1000_codec = snd_soc_codec_get_drvdata(codec);
 550         if (mute) {
 551                 /* AOL */
 552                 rk1000_codec_write(codec, ACCELCODEC_R17, 0xFF);
 553                 /* AOR */
 554                 rk1000_codec_write(codec, ACCELCODEC_R18, 0xFF);
 555                 /* AOM */
 556                 rk1000_codec_write(codec, ACCELCODEC_R19, 0xFF);
 557                 /* soft mute */
 558                 rk1000_codec_write(codec, ACCELCODEC_R04, ASC_INT_MUTE_L|
 559                                    ASC_INT_MUTE_R | ASC_SIDETONE_L_OFF |
 560                                    ASC_SIDETONE_R_OFF);
 561         } else {
 562                 /* setup Vmid and Vref, other module power down */
 563                 rk1000_codec_write(codec, ACCELCODEC_R1D, 0x2a);
 564                 rk1000_codec_write(codec, ACCELCODEC_R1E, 0x40);
 565                 /* AOL */
 566                 rk1000_codec_write(codec, ACCELCODEC_R17, VOLUME_CODEC_PA |
 567                                    ASC_OUTPUT_ACTIVE | ASC_CROSSZERO_EN);
 568                 /* AOR */
 569                 rk1000_codec_write(codec, ACCELCODEC_R18, VOLUME_CODEC_PA |
 570                                    ASC_OUTPUT_ACTIVE | ASC_CROSSZERO_EN);
 571                 rk1000_codec_write(codec, ACCELCODEC_R04, ASC_INT_ACTIVE_L|
 572                                    ASC_INT_ACTIVE_R | ASC_SIDETONE_L_OFF|
 573                                    ASC_SIDETONE_R_OFF);
 574                 /* AOM */
 575                 rk1000_codec_write(codec, ACCELCODEC_R19, 0x7F);
 576                 #if OUT_CAPLESS
 577                 rk1000_codec_write(codec, ACCELCODEC_R1F, 0x09|
 578                                    ASC_PDMIXM_ENABLE);
 579                 #else
 580                 rk1000_codec_write(codec, ACCELCODEC_R1F, 0x09|
 581                                    ASC_PDMIXM_ENABLE | ASC_PDPAM_ENABLE);
 582                 #endif
 583         }
 584         return 0;
 585 }
 586
 587 static void rk1000_delayedwork_fun(struct work_struct *work)
 588 {
 589         struct snd_soc_codec *codec;
 590         struct rk1000_codec_priv *rk1000_codec;
 591
 592         DBG("--------%s----------\n", __func__);
 593         codec = rk1000_codec_codec;
 594         rk1000_codec = snd_soc_codec_get_drvdata(codec);
 595         if (!rk1000_codec->boot_depop) {
 596                 #if OUT_CAPLESS
 597                 rk1000_codec_write(codec, ACCELCODEC_R1F,
 598                                    0x09 | ASC_PDMIXM_ENABLE);
 599                 #else
 600                 rk1000_codec_write(codec, ACCELCODEC_R1F,
 601                                    0x09 | ASC_PDMIXM_ENABLE | ASC_PDPAM_ENABLE);
 602                 #endif
 603         }
 604         spk_ctrl_fun(GPIO_HIGH);
 605 }
 606
 607
 608
 609 static struct snd_soc_dai_ops rk1000_codec_ops = {
 610         .hw_params = rk1000_codec_pcm_hw_params,
 611         .set_fmt = rk1000_codec_set_dai_fmt,
 612         .set_sysclk = rk1000_codec_set_dai_sysclk,
 613         .digital_mute = rk1000_codec_mute,
 614 };
 615
 616 #define RK1000_CODEC_RATES SNDRV_PCM_RATE_8000_192000
 617 #define RK1000_CODEC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
 618                                 SNDRV_PCM_FMTBIT_S20_3LE |\
 619                                 SNDRV_PCM_FMTBIT_S24_LE)
 620 static struct snd_soc_dai_driver rk1000_codec_dai[] = {
 621         {
 622                 .name = "rk1000_codec",
 623                 .playback = {
 624                         .stream_name = "Playback",
 625                         .channels_min = 1,
 626                         .channels_max = 8,
 627                         .rates = RK1000_CODEC_RATES,
 628                         .formats = RK1000_CODEC_FORMATS,
 629                 },
 630                 .capture = {
 631                         .stream_name = "Capture",
 632                         .channels_min = 1,
 633                         .channels_max = 2,
 634                         .rates = RK1000_CODEC_RATES,
 635                         .formats = RK1000_CODEC_FORMATS,
 636                  },
 637                 .ops = &rk1000_codec_ops,
 638                 .symmetric_rates = 1,
 639         }
 640 };
 641
 642
 643 void rk1000_codec_reg_set(void)
 644 {
 645         struct snd_soc_codec *codec;
 646         struct rk1000_codec_priv *rk1000_codec;
 647         unsigned int digital_gain;
 648         unsigned int mic_vol;
 649
 650         mic_vol = VOLUME_INPUT;
 651         codec = rk1000_codec_codec;
 652         rk1000_codec = snd_soc_codec_get_drvdata(codec);
 653         rk1000_codec_write(codec, ACCELCODEC_R1D, 0x30);
 654         rk1000_codec_write(codec, ACCELCODEC_R1E, 0x40);
 655 #ifdef USE_LPF
 656         /*Route R-LPF->R-Mixer, L-LPF->L-Mixer*/
 657         rk1000_codec_write(codec, ACCELCODEC_R15, 0xC1);
 658 #else
 659         /*Route RDAC->R-Mixer, LDAC->L->Mixer*/
 660         rk1000_codec_write(codec, ACCELCODEC_R15, 0x0C);
 661 #endif
 662         /*With Cap Output, VMID ramp up slow*/
 663         rk1000_codec_write(codec, ACCELCODEC_R1A, 0x14);
 664         mdelay(10);
 665         rk1000_codec_write(codec, ACCELCODEC_R0C, 0x10 | ASC_INPUT_VOL_0DB);
 666         rk1000_codec_write(codec, ACCELCODEC_R0D, 0x10 | ASC_INPUT_VOL_0DB);
 667 #ifdef USE_MIC_IN
 668         if (mic_vol > 0x07) {
 669                 /*Select MIC input*/
 670                 rk1000_codec_write(codec, ACCELCODEC_R12,
 671                                    0x4c | ASC_MIC_INPUT | ASC_MIC_BOOST_20DB);
 672                 mic_vol -= 0x07;
 673         } else
 674                 /*Select MIC input*/
 675                 rk1000_codec_write(codec, ACCELCODEC_R12, 0x4c | ASC_MIC_INPUT);
 676         /*use default value*/
 677         rk1000_codec_write(codec, ACCELCODEC_R1C, ASC_DEM_ENABLE);
 678 #else
 679         /*Select Line input*/
 680         rk1000_codec_write(codec, ACCELCODEC_R12, 0x4c);
 681 #endif
 682         rk1000_codec_write(codec, ACCELCODEC_R0E, 0x10|mic_vol);
 683         /*Diable route PGA->R/L Mixer, PGA gain 0db.*/
 684         rk1000_codec_write(codec, ACCELCODEC_R13, 0x05 | 0 << 3);
 685         rk1000_codec_write(codec, ACCELCODEC_R14, 0x05 | 0 << 3);
 686         /*2soft mute*/
 687         rk1000_codec_write(codec, ACCELCODEC_R04,
 688                            ASC_INT_MUTE_L | ASC_INT_MUTE_R |
 689                            ASC_SIDETONE_L_OFF | ASC_SIDETONE_R_OFF);
 690         /*2set default SR and clk*/
 691         rk1000_codec_write(codec, ACCELCODEC_R0A, FREQ441KHZ | ASC_NORMAL_MODE |
 692                            (0x10 << 1) | ASC_CLKNODIV | ASC_CLK_ENABLE);
 693         g_r0_a_reg = ASC_NORMAL_MODE | (0x10 << 1) |
 694                      ASC_CLKNODIV | ASC_CLK_DISABLE;
 695         /*2Config audio  interface*/
 696         rk1000_codec_write(codec, ACCELCODEC_R09, ASC_I2S_MODE |
 697                            ASC_16BIT_MODE | ASC_NORMAL_LRCLK |
 698                            ASC_LRSWAP_DISABLE | ASC_NORMAL_BCLK);
 699         rk1000_codec_write(codec, ACCELCODEC_R00, ASC_HPF_ENABLE
 700                            | ASC_DSM_MODE_ENABLE | ASC_SCRAMBLE_ENABLE
 701                            | ASC_DITHER_ENABLE | ASC_BCLKDIV_4);
 702         /*2volume,input,output*/
 703         digital_gain = VOLUME_OUTPUT;
 704         if (rk1000_codec_read(codec, ACCELCODEC_R05) != 0x0f) {
 705                 rk1000_codec_write(codec, ACCELCODEC_R05,
 706                                    (digital_gain >> 8) & 0xFF);
 707                 rk1000_codec_write(codec, ACCELCODEC_R06, digital_gain & 0xFF);
 708         }
 709         if (rk1000_codec_read(codec, ACCELCODEC_R07) != 0x0f) {
 710                 rk1000_codec_write(codec, ACCELCODEC_R07,
 711                                    (digital_gain >> 8) & 0xFF);
 712                 rk1000_codec_write(codec, ACCELCODEC_R08, digital_gain & 0xFF);
 713         }
 714         rk1000_codec_write(codec, ACCELCODEC_R0B,
 715                            ASC_DEC_ENABLE | ASC_INT_ENABLE);
 716         g_r0_b_reg = ASC_DEC_ENABLE | ASC_INT_ENABLE;
 717         if (rk1000_codec->boot_depop) {
 718                 #if OUT_CAPLESS
 719                 rk1000_codec_write(codec, ACCELCODEC_R1F,
 720                                    0x09 | ASC_PDMIXM_ENABLE);
 721                 #else
 722                 rk1000_codec_write(codec, ACCELCODEC_R1F, 0x09 |
 723                                    ASC_PDMIXM_ENABLE | ASC_PDPAM_ENABLE);
 724                 #endif
 725         }
 726         rk1000_codec_write(codec, ACCELCODEC_R17, VOLUME_CODEC_PA |
 727                            ASC_OUTPUT_ACTIVE | ASC_CROSSZERO_EN);
 728         rk1000_codec_write(codec, ACCELCODEC_R18, VOLUME_CODEC_PA |
 729                            ASC_OUTPUT_ACTIVE | ASC_CROSSZERO_EN);
 730         rk1000_codec_write(codec, ACCELCODEC_R04, ASC_INT_ACTIVE_L |
 731                            ASC_INT_ACTIVE_R | ASC_SIDETONE_L_OFF |
 732                            ASC_SIDETONE_R_OFF);
 733         rk1000_codec_write(codec, ACCELCODEC_R19, 0x7F);
 734 }
 735
 736
 737 static int rk1000_codec_suspend(struct snd_soc_codec *codec)
 738 {
 739         DBG("Enter::%s----%d\n", __func__, __LINE__);
 740         spk_ctrl_fun(GPIO_LOW);
 741         rk1000_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
 742         return 0;
 743 }
 744
 745 static int rk1000_codec_resume(struct snd_soc_codec *codec)
 746 {
 747         rk1000_codec_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
 748         spk_ctrl_fun(GPIO_HIGH);
 749         return 0;
 750 }
 751
 752 static int rk1000_codec_probe(struct snd_soc_codec *codec)
 753 {
 754         struct rk1000_codec_priv *rk1000_codec;
 755         int ret;
 756
 757         rk1000_codec_codec = codec;
 758         rk1000_codec = snd_soc_codec_get_drvdata(codec);
 759         DBG("[%s] start\n", __func__);
 760         ret = snd_soc_codec_set_cache_io(codec, 8, 16,
 761                                          rk1000_codec->control_type);
 762         if (ret != 0) {
 763                 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
 764                 return ret;
 765         }
 766         /*For RK1000, i2c write&read method is special
 767          *do not use system default method.*/
 768         codec->write = rk1000_codec_write;
 769         codec->read = rk1000_codec_read;
 770         codec->hw_write = (hw_write_t)i2c_master_send;
 771         if (rk1000_codec_codec == NULL) {
 772                 dev_err(codec->dev, "Codec device not registered\n");
 773                 return -ENODEV;
 774         }
 775         INIT_DELAYED_WORK(&rk1000_codec->rk1000_delayed_work,
 776                           rk1000_delayedwork_fun);
 777
 778         if (rk1000_codec->spk_ctrl_io) {
 779                 ret = gpio_request(rk1000_codec->spk_ctrl_io,
 780                                    "rk1000-spk-ctrl");
 781                 if (ret) {
 782                         DBG("rk1000 codec request gpio fail!\n");
 783                         return ret;
 784                 }
 785                 /*set hight disable codec lr output*/
 786                 gpio_direction_output(rk1000_codec->spk_ctrl_io,
 787                                       !rk1000_codec->flags);
 788                 gpio_set_value(rk1000_codec->spk_ctrl_io,
 789                                !rk1000_codec->flags);
 790         }
 791         rk1000_codec->call_enable = 0;
 792         rk1000_codec->headset_status = HP_OUT;
 793         rk1000_codec_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
 794         schedule_delayed_work(&rk1000_codec->rk1000_delayed_work,
 795                               msecs_to_jiffies(rk1000_codec->pa_enable_time));
 796         rk1000_codec_reg_set();
 797         DBG("rk1000_codec_probe ret=0x%x\n", ret);
 798         return ret;
 799 }
 800
 801 static int rk1000_codec_remove(struct snd_soc_codec *codec)
 802 {
 803         rk1000_codec_set_bias_level(codec, SND_SOC_BIAS_OFF);
 804         return 0;
 805 }
 806
 807 static struct snd_soc_codec_driver soc_codec_dev_rk1000_codec = {
 808         .probe =        rk1000_codec_probe,
 809         .remove =       rk1000_codec_remove,
 810         .suspend =      rk1000_codec_suspend,
 811         .resume =       rk1000_codec_resume,
 812         .set_bias_level = rk1000_codec_set_bias_level,
 813         .reg_cache_size = ARRAY_SIZE(rk1000_codec_reg),
 814         .reg_word_size = sizeof(u16),
 815         .reg_cache_default = rk1000_codec_reg,
 816 };
 817
 818
 819 static int rk1000_codec_i2c_probe(struct i2c_client *i2c,
 820                                   const struct i2c_device_id *id)
 821 {
 822         struct rk1000_codec_priv *rk1000_codec;
 823         struct device_node *rk1000_np = i2c->dev.of_node;
 824         int ret;
 825
 826         DBG("%s::%d\n", __func__, __LINE__);
 827         rk1000_codec = kmalloc(sizeof(*rk1000_codec), GFP_KERNEL);
 828         if (rk1000_codec == NULL)
 829                 return -ENOMEM;
 830         rk1000_codec->spk_ctrl_io = of_get_named_gpio_flags(rk1000_np,
 831                                     "spk_ctl_io", 0, &(rk1000_codec->flags));
 832         if (!gpio_is_valid(rk1000_codec->spk_ctrl_io)) {
 833                 DBG("invalid core_info->reset_gpio: %d\n",
 834                     rk1000_codec->spk_ctrl_io);
 835                 return -1;
 836         }
 837         of_property_read_u32(rk1000_np, "pa_enable_time",
 838                              &(rk1000_codec->pa_enable_time));
 839         of_property_read_u32(rk1000_np, "boot_depop",
 840                              &(rk1000_codec->boot_depop));
 841         i2c_set_clientdata(i2c, rk1000_codec);
 842         rk1000_codec->control_type = SND_SOC_I2C;
 843         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rk1000_codec,
 844                                      rk1000_codec_dai,
 845                                      ARRAY_SIZE(rk1000_codec_dai));
 846         if (ret < 0)
 847                 kfree(rk1000_codec);
 848         return ret;
 849 }
 850
 851 static int rk1000_codec_i2c_remove(struct i2c_client *client)
 852 {
 853         snd_soc_unregister_codec(&client->dev);
 854         kfree(i2c_get_clientdata(client));
 855         return 0;
 856 }
 857
 858 static const struct i2c_device_id rk1000_codec_i2c_id[] = {
 859         { "rk1000_codec", 0 },
 860         { }
 861 };
 862 MODULE_DEVICE_TABLE(i2c, rk1000_codec_i2c_id);
 863
 864 /* corgi i2c codec control layer */
 865 static struct i2c_driver rk1000_codec_i2c_driver = {
 866         .driver = {
 867                 .name = "rk1000_codec",
 868                 .owner = THIS_MODULE,
 869         },
 870         .probe = rk1000_codec_i2c_probe,
 871         .remove = rk1000_codec_i2c_remove,
 872         .id_table = rk1000_codec_i2c_id,
 873 };
 874
 875
 876 static int __init rk1000_codec_modinit(void)
 877 {
 878         int ret;
 879
 880         DBG("[%s] start\n", __func__);
 881         ret = i2c_add_driver(&rk1000_codec_i2c_driver);
 882         if (ret != 0)
 883                 pr_err("rk1000 codec: register I2C driver err=: %d\n", ret);
 884         return ret;
 885 }
 886 /* late_initcall(rk1000_codec_modinit); */
 887 module_init(rk1000_codec_modinit);
 888
 889 static void __exit rk1000_codec_exit(void)
 890 {
 891         i2c_del_driver(&rk1000_codec_i2c_driver);
 892 }
 893 module_exit(rk1000_codec_exit);
 894
 895
 896
 897 #ifdef RK1000_CODEC_PROC
 898 #include <linux/proc_fs.h>
 899 #include <linux/seq_file.h>
 900
 901 static int debug_write_read;
 902
 903 void rk1000_codec_reg_read(void)
 904 {
 905         struct snd_soc_codec *codec;
 906         int i;
 907         unsigned int data;
 908
 909         codec = rk1000_codec_codec;
 910         for (i = 0; i <= 0x1f; i++) {
 911                 data = rk1000_codec_read(codec, i);
 912                 pr_info("reg[0x%x]=0x%x\n", i, data);
 913         }
 914 }
 915
 916
 917 static ssize_t rk1000_codec_proc_write(struct file *file,
 918                                        const char __user *buffer,
 919                                        size_t len, loff_t *data)
 920 {
 921         char *cookie_pot;
 922         char *p;
 923         long reg;
 924         long value;
 925         int ret;
 926
 927         cookie_pot = vmalloc(len);
 928         if (!cookie_pot) {
 929                 pr_err("malloc cookie error for rk1000 codec proc debug\n");
 930                 return -ENOMEM;
 931         } else {
 932                 if (copy_from_user(cookie_pot, buffer, len))
 933                         return -EFAULT;
 934         }
 935         switch (cookie_pot[0]) {
 936         case 'd':
 937         case 'D':
 938                 debug_write_read++;
 939                 debug_write_read %= 2;
 940                 if (debug_write_read != 0)
 941                         pr_info("Debug read and write reg on\n");
 942                 else
 943                         pr_info("Debug read and write reg off\n");
 944                 break;
 945         case 'r':
 946         case 'R':
 947                 pr_info("Read reg debug\n");
 948                 if (cookie_pot[1] == ':') {
 949                         debug_write_read = 1;
 950                         strsep(&cookie_pot, ":");
 951                         while ((p = strsep(&cookie_pot, ","))) {
 952                                 ret = kstrtol((const char *)p, 0, &reg);
 953                                 if (ret < 0) {
 954                                         pr_err("string to long error\n");
 955                                         return ret;
 956                                 }
 957                                 value = rk1000_codec_read(rk1000_codec_codec,
 958                                                           reg);
 959                                 pr_info("rk1000_codec_read:0x%04lx = 0x%04lx",
 960                                         reg, value);
 961                         }
 962                         debug_write_read = 0;
 963                         pr_info("\n");
 964                 } else {
 965                         pr_info("Error Read reg debug.\n");
 966                 }
 967                 break;
 968         case 'w':
 969         case 'W':
 970                 pr_info("Write reg debug\n");
 971                 if (cookie_pot[1] == ':') {
 972                         debug_write_read = 1;
 973                         strsep(&cookie_pot, ":");
 974                         while ((p = strsep(&cookie_pot, "="))) {
 975                                 ret = kstrtol(p, 0, &reg);
 976                                 if (ret < 0) {
 977                                         pr_err("string to long error\n");
 978                                         return ret;
 979                                 }
 980                                 p = strsep(&cookie_pot, ",");
 981                                 ret = kstrtol(p, 0, &value);
 982                                 if (ret < 0) {
 983                                         pr_err("string to long error\n");
 984                                         return ret;
 985                                 }
 986                                 rk1000_codec_write(rk1000_codec_codec, reg,
 987                                                    value);
 988                                 pr_info("rk1000_codec_write:0x%04lx = 0x%04lx\n",
 989                                         reg, value);
 990                         }
 991                         debug_write_read = 0;
 992                         pr_info("\n");
 993                 } else {
 994                         pr_info("Error Write reg debug.\n");
 995                         pr_info("For example: w:22=0,23=0,24=0,25=0\n");
 996                 }
 997                 break;
 998         case 'p':
 999                 rk1000_codec_reg_read();
1000                 break;
1001         default:
1002                 pr_info("Help for rk1000_codec_ts .\n-->The Cmd list:\n");
1003                 pr_info("-->'d&&D' Open or Off the debug\n");
1004                 pr_info("-->'r&&R' Read reg debug,Example:");
1005                 pr_info("echo 'r:22,23,24,25'>rk1000_codec_ts\n");
1006                 pr_info("-->'w&&W' Write reg debug,Example:");
1007                 pr_info("echo 'w:22=0,23=0,24=0,25=0'>rk1000_codec_ts\n");
1008                 break;
1009         }
1010         vfree(cookie_pot);
1011         return len;
1012 }
1013
1014
1015 static const struct file_operations rk1000_codec_proc_fops = {
1016         .owner = THIS_MODULE,
1017         .write = rk1000_codec_proc_write,
1018 };
1019
1020 static int rk1000_codec_proc_init(void)
1021 {
1022         proc_create("rk1000_codec_reg", 0,
1023                     NULL, &rk1000_codec_proc_fops);
1024         return 0;
1025 }
1026 late_initcall(rk1000_codec_proc_init);
1027 #endif