2 * lm49453.c - LM49453 ALSA Soc Audio driver
4 * Copyright (c) 2012 Texas Instruments, Inc
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * Initially based on sound/soc/codecs/wm8350.c
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/tlv.h>
28 #include <sound/jack.h>
29 #include <sound/initval.h>
30 #include <asm/div64.h>
33 static struct reg_default lm49453_reg_defs[] = {
219 /* codec private data */
220 struct lm49453_priv {
221 struct regmap *regmap;
225 /* capture path controls */
227 static const char *lm49453_mic2mode_text[] = {"Single Ended", "Differential"};
229 static const SOC_ENUM_SINGLE_DECL(lm49453_mic2mode_enum, LM49453_P0_MICR_REG, 5,
230 lm49453_mic2mode_text);
232 static const char *lm49453_dmic_cfg_text[] = {"DMICDAT1", "DMICDAT2"};
234 static const SOC_ENUM_SINGLE_DECL(lm49453_dmic12_cfg_enum,
235 LM49453_P0_DIGITAL_MIC1_CONFIG_REG,
236 7, lm49453_dmic_cfg_text);
238 static const SOC_ENUM_SINGLE_DECL(lm49453_dmic34_cfg_enum,
239 LM49453_P0_DIGITAL_MIC2_CONFIG_REG,
240 7, lm49453_dmic_cfg_text);
243 static const char *lm49453_adcl_mux_text[] = { "MIC1", "Aux_L" };
245 static const char *lm49453_adcr_mux_text[] = { "MIC2", "Aux_R" };
247 static const struct soc_enum lm49453_adcl_enum =
248 SOC_ENUM_SINGLE(LM49453_P0_ANALOG_MIXER_ADC_REG, 0,
249 ARRAY_SIZE(lm49453_adcl_mux_text),
250 lm49453_adcl_mux_text);
252 static const struct soc_enum lm49453_adcr_enum =
253 SOC_ENUM_SINGLE(LM49453_P0_ANALOG_MIXER_ADC_REG, 1,
254 ARRAY_SIZE(lm49453_adcr_mux_text),
255 lm49453_adcr_mux_text);
257 static const struct snd_kcontrol_new lm49453_adcl_mux_control =
258 SOC_DAPM_ENUM("ADC Left Mux", lm49453_adcl_enum);
260 static const struct snd_kcontrol_new lm49453_adcr_mux_control =
261 SOC_DAPM_ENUM("ADC Right Mux", lm49453_adcr_enum);
263 static const struct snd_kcontrol_new lm49453_headset_left_mixer[] = {
264 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPL1_REG, 0, 1, 0),
265 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPL1_REG, 1, 1, 0),
266 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPL1_REG, 2, 1, 0),
267 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPL1_REG, 3, 1, 0),
268 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPL1_REG, 4, 1, 0),
269 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPL1_REG, 5, 1, 0),
270 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPL1_REG, 6, 1, 0),
271 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPL1_REG, 7, 1, 0),
272 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPL2_REG, 0, 1, 0),
273 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPL2_REG, 1, 1, 0),
274 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPL2_REG, 2, 1, 0),
275 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPL2_REG, 3, 1, 0),
276 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPL2_REG, 4, 1, 0),
277 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPL2_REG, 5, 1, 0),
278 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPL2_REG, 6, 1, 0),
279 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPL2_REG, 7, 1, 0),
280 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 0, 0, 0),
283 static const struct snd_kcontrol_new lm49453_headset_right_mixer[] = {
284 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHPR1_REG, 0, 1, 0),
285 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHPR1_REG, 1, 1, 0),
286 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHPR1_REG, 2, 1, 0),
287 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHPR1_REG, 3, 1, 0),
288 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHPR1_REG, 4, 1, 0),
289 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHPR1_REG, 5, 1, 0),
290 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHPR1_REG, 6, 1, 0),
291 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHPR1_REG, 7, 1, 0),
292 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHPR2_REG, 0, 1, 0),
293 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHPR2_REG, 1, 1, 0),
294 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHPR2_REG, 2, 1, 0),
295 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHPR2_REG, 3, 1, 0),
296 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHPR2_REG, 4, 1, 0),
297 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHPR2_REG, 5, 1, 0),
298 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHPR2_REG, 6, 1, 0),
299 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHPR2_REG, 7, 1, 0),
300 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 1, 0, 0),
303 static const struct snd_kcontrol_new lm49453_speaker_left_mixer[] = {
304 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSL1_REG, 0, 1, 0),
305 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSL1_REG, 1, 1, 0),
306 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSL1_REG, 2, 1, 0),
307 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSL1_REG, 3, 1, 0),
308 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSL1_REG, 4, 1, 0),
309 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSL1_REG, 5, 1, 0),
310 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSL1_REG, 6, 1, 0),
311 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSL1_REG, 7, 1, 0),
312 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSL2_REG, 0, 1, 0),
313 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSL2_REG, 1, 1, 0),
314 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSL2_REG, 2, 1, 0),
315 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSL2_REG, 3, 1, 0),
316 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSL2_REG, 4, 1, 0),
317 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSL2_REG, 5, 1, 0),
318 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSL2_REG, 6, 1, 0),
319 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSL2_REG, 7, 1, 0),
320 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 2, 0, 0),
323 static const struct snd_kcontrol_new lm49453_speaker_right_mixer[] = {
324 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLSR1_REG, 0, 1, 0),
325 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLSR1_REG, 1, 1, 0),
326 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLSR1_REG, 2, 1, 0),
327 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLSR1_REG, 3, 1, 0),
328 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLSR1_REG, 4, 1, 0),
329 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLSR1_REG, 5, 1, 0),
330 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLSR1_REG, 6, 1, 0),
331 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLSR1_REG, 7, 1, 0),
332 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLSR2_REG, 0, 1, 0),
333 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLSR2_REG, 1, 1, 0),
334 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLSR2_REG, 2, 1, 0),
335 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLSR2_REG, 3, 1, 0),
336 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLSR2_REG, 4, 1, 0),
337 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLSR2_REG, 5, 1, 0),
338 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLSR2_REG, 6, 1, 0),
339 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLSR2_REG, 7, 1, 0),
340 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 3, 0, 0),
343 static const struct snd_kcontrol_new lm49453_haptic_left_mixer[] = {
344 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAL1_REG, 0, 1, 0),
345 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAL1_REG, 1, 1, 0),
346 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAL1_REG, 2, 1, 0),
347 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAL1_REG, 3, 1, 0),
348 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAL1_REG, 4, 1, 0),
349 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAL1_REG, 5, 1, 0),
350 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAL1_REG, 6, 1, 0),
351 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAL1_REG, 7, 1, 0),
352 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAL2_REG, 0, 1, 0),
353 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAL2_REG, 1, 1, 0),
354 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAL2_REG, 2, 1, 0),
355 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAL2_REG, 3, 1, 0),
356 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAL2_REG, 4, 1, 0),
357 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAL2_REG, 5, 1, 0),
358 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAL2_REG, 6, 1, 0),
359 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAL2_REG, 7, 1, 0),
360 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 4, 0, 0),
363 static const struct snd_kcontrol_new lm49453_haptic_right_mixer[] = {
364 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACHAR1_REG, 0, 1, 0),
365 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACHAR1_REG, 1, 1, 0),
366 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACHAR1_REG, 2, 1, 0),
367 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACHAR1_REG, 3, 1, 0),
368 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACHAR1_REG, 4, 1, 0),
369 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACHAR1_REG, 5, 1, 0),
370 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACHAR1_REG, 6, 1, 0),
371 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACHAR1_REG, 7, 1, 0),
372 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACHAR2_REG, 0, 1, 0),
373 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACHAR2_REG, 1, 1, 0),
374 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACHAR2_REG, 2, 1, 0),
375 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACHAR2_REG, 3, 1, 0),
376 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACHAR2_REG, 4, 1, 0),
377 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACHAR2_REG, 5, 1, 0),
378 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACHAR2_REG, 6, 1, 0),
379 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACHAR2_REG, 7, 1, 0),
380 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 5, 0, 0),
383 static const struct snd_kcontrol_new lm49453_lineout_left_mixer[] = {
384 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOL1_REG, 0, 1, 0),
385 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOL1_REG, 1, 1, 0),
386 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOL1_REG, 2, 1, 0),
387 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOL1_REG, 3, 1, 0),
388 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOL1_REG, 4, 1, 0),
389 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOL1_REG, 5, 1, 0),
390 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOL1_REG, 6, 1, 0),
391 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOL1_REG, 7, 1, 0),
392 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOL2_REG, 0, 1, 0),
393 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOL2_REG, 1, 1, 0),
394 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOL2_REG, 2, 1, 0),
395 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOL2_REG, 3, 1, 0),
396 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOL2_REG, 4, 1, 0),
397 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOL2_REG, 5, 1, 0),
398 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOL2_REG, 6, 1, 0),
399 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOL2_REG, 7, 1, 0),
400 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 6, 0, 0),
403 static const struct snd_kcontrol_new lm49453_lineout_right_mixer[] = {
404 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_DACLOR1_REG, 0, 1, 0),
405 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_DACLOR1_REG, 1, 1, 0),
406 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_DACLOR1_REG, 2, 1, 0),
407 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_DACLOR1_REG, 3, 1, 0),
408 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_DACLOR1_REG, 4, 1, 0),
409 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_DACLOR1_REG, 5, 1, 0),
410 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_DACLOR1_REG, 6, 1, 0),
411 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_DACLOR1_REG, 7, 1, 0),
412 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_DACLOR2_REG, 0, 1, 0),
413 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_DACLOR2_REG, 1, 1, 0),
414 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_DACLOR2_REG, 2, 1, 0),
415 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_DACLOR2_REG, 3, 1, 0),
416 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_DACLOR2_REG, 4, 1, 0),
417 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_DACLOR2_REG, 5, 1, 0),
418 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_DACLOR2_REG, 6, 1, 0),
419 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_DACLOR2_REG, 7, 1, 0),
420 SOC_DAPM_SINGLE("Sidetone Switch", LM49453_P0_STN_SEL_REG, 7, 0, 0),
423 static const struct snd_kcontrol_new lm49453_port1_tx1_mixer[] = {
424 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX1_REG, 0, 1, 0),
425 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX1_REG, 1, 1, 0),
426 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX1_REG, 2, 1, 0),
427 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX1_REG, 3, 1, 0),
428 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX1_REG, 4, 1, 0),
429 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX1_REG, 5, 1, 0),
430 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT1_TX1_REG, 6, 1, 0),
431 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT1_TX1_REG, 7, 1, 0),
434 static const struct snd_kcontrol_new lm49453_port1_tx2_mixer[] = {
435 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX2_REG, 0, 1, 0),
436 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX2_REG, 1, 1, 0),
437 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX2_REG, 2, 1, 0),
438 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX2_REG, 3, 1, 0),
439 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX2_REG, 4, 1, 0),
440 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX2_REG, 5, 1, 0),
441 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT1_TX2_REG, 6, 1, 0),
442 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT1_TX2_REG, 7, 1, 0),
445 static const struct snd_kcontrol_new lm49453_port1_tx3_mixer[] = {
446 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX3_REG, 0, 1, 0),
447 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX3_REG, 1, 1, 0),
448 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX3_REG, 2, 1, 0),
449 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX3_REG, 3, 1, 0),
450 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX3_REG, 4, 1, 0),
451 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX3_REG, 5, 1, 0),
452 SOC_DAPM_SINGLE("Port1_3 Switch", LM49453_P0_PORT1_TX3_REG, 6, 1, 0),
455 static const struct snd_kcontrol_new lm49453_port1_tx4_mixer[] = {
456 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX4_REG, 0, 1, 0),
457 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX4_REG, 1, 1, 0),
458 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX4_REG, 2, 1, 0),
459 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX4_REG, 3, 1, 0),
460 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX4_REG, 4, 1, 0),
461 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX4_REG, 5, 1, 0),
462 SOC_DAPM_SINGLE("Port1_4 Switch", LM49453_P0_PORT1_TX4_REG, 6, 1, 0),
465 static const struct snd_kcontrol_new lm49453_port1_tx5_mixer[] = {
466 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX5_REG, 0, 1, 0),
467 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX5_REG, 1, 1, 0),
468 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX5_REG, 2, 1, 0),
469 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX5_REG, 3, 1, 0),
470 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX5_REG, 4, 1, 0),
471 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX5_REG, 5, 1, 0),
472 SOC_DAPM_SINGLE("Port1_5 Switch", LM49453_P0_PORT1_TX5_REG, 6, 1, 0),
475 static const struct snd_kcontrol_new lm49453_port1_tx6_mixer[] = {
476 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX6_REG, 0, 1, 0),
477 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX6_REG, 1, 1, 0),
478 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX6_REG, 2, 1, 0),
479 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX6_REG, 3, 1, 0),
480 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX6_REG, 4, 1, 0),
481 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX6_REG, 5, 1, 0),
482 SOC_DAPM_SINGLE("Port1_6 Switch", LM49453_P0_PORT1_TX6_REG, 6, 1, 0),
485 static const struct snd_kcontrol_new lm49453_port1_tx7_mixer[] = {
486 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX7_REG, 0, 1, 0),
487 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX7_REG, 1, 1, 0),
488 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX7_REG, 2, 1, 0),
489 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX7_REG, 3, 1, 0),
490 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX7_REG, 4, 1, 0),
491 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX7_REG, 5, 1, 0),
492 SOC_DAPM_SINGLE("Port1_7 Switch", LM49453_P0_PORT1_TX7_REG, 6, 1, 0),
495 static const struct snd_kcontrol_new lm49453_port1_tx8_mixer[] = {
496 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT1_TX8_REG, 0, 1, 0),
497 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT1_TX8_REG, 1, 1, 0),
498 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT1_TX8_REG, 2, 1, 0),
499 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT1_TX8_REG, 3, 1, 0),
500 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT1_TX8_REG, 4, 1, 0),
501 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT1_TX8_REG, 5, 1, 0),
502 SOC_DAPM_SINGLE("Port1_8 Switch", LM49453_P0_PORT1_TX8_REG, 6, 1, 0),
505 static const struct snd_kcontrol_new lm49453_port2_tx1_mixer[] = {
506 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX1_REG, 0, 1, 0),
507 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX1_REG, 1, 1, 0),
508 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX1_REG, 2, 1, 0),
509 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX1_REG, 3, 1, 0),
510 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX1_REG, 4, 1, 0),
511 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX1_REG, 5, 1, 0),
512 SOC_DAPM_SINGLE("Port1_1 Switch", LM49453_P0_PORT2_TX1_REG, 6, 1, 0),
513 SOC_DAPM_SINGLE("Port2_1 Switch", LM49453_P0_PORT2_TX1_REG, 7, 1, 0),
516 static const struct snd_kcontrol_new lm49453_port2_tx2_mixer[] = {
517 SOC_DAPM_SINGLE("DMIC1L Switch", LM49453_P0_PORT2_TX2_REG, 0, 1, 0),
518 SOC_DAPM_SINGLE("DMIC1R Switch", LM49453_P0_PORT2_TX2_REG, 1, 1, 0),
519 SOC_DAPM_SINGLE("DMIC2L Switch", LM49453_P0_PORT2_TX2_REG, 2, 1, 0),
520 SOC_DAPM_SINGLE("DMIC2R Switch", LM49453_P0_PORT2_TX2_REG, 3, 1, 0),
521 SOC_DAPM_SINGLE("ADCL Switch", LM49453_P0_PORT2_TX2_REG, 4, 1, 0),
522 SOC_DAPM_SINGLE("ADCR Switch", LM49453_P0_PORT2_TX2_REG, 5, 1, 0),
523 SOC_DAPM_SINGLE("Port1_2 Switch", LM49453_P0_PORT2_TX2_REG, 6, 1, 0),
524 SOC_DAPM_SINGLE("Port2_2 Switch", LM49453_P0_PORT2_TX2_REG, 7, 1, 0),
527 /* TLV Declarations */
528 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7650, 150, 1);
529 static const DECLARE_TLV_DB_SCALE(port_tlv, 0, 600, 0);
531 static const struct snd_kcontrol_new lm49453_sidetone_mixer_controls[] = {
532 /* Sidetone supports mono only */
533 SOC_DAPM_SINGLE_TLV("Sidetone ADCL Volume", LM49453_P0_STN_VOL_ADCL_REG,
534 0, 0x3F, 0, digital_tlv),
535 SOC_DAPM_SINGLE_TLV("Sidetone ADCR Volume", LM49453_P0_STN_VOL_ADCR_REG,
536 0, 0x3F, 0, digital_tlv),
537 SOC_DAPM_SINGLE_TLV("Sidetone DMIC1L Volume", LM49453_P0_STN_VOL_DMIC1L_REG,
538 0, 0x3F, 0, digital_tlv),
539 SOC_DAPM_SINGLE_TLV("Sidetone DMIC1R Volume", LM49453_P0_STN_VOL_DMIC1R_REG,
540 0, 0x3F, 0, digital_tlv),
541 SOC_DAPM_SINGLE_TLV("Sidetone DMIC2L Volume", LM49453_P0_STN_VOL_DMIC2L_REG,
542 0, 0x3F, 0, digital_tlv),
543 SOC_DAPM_SINGLE_TLV("Sidetone DMIC2R Volume", LM49453_P0_STN_VOL_DMIC2R_REG,
544 0, 0x3F, 0, digital_tlv),
547 static const struct snd_kcontrol_new lm49453_snd_controls[] = {
548 /* mic1 and mic2 supports mono only */
549 SOC_SINGLE_TLV("Mic1 Volume", LM49453_P0_ADC_LEVELL_REG, 0, 6,
551 SOC_SINGLE_TLV("Mic2 Volume", LM49453_P0_ADC_LEVELR_REG, 0, 6,
554 SOC_DOUBLE_R_TLV("DMIC1 Volume", LM49453_P0_DMIC1_LEVELL_REG,
555 LM49453_P0_DMIC1_LEVELR_REG, 0, 6, 0, digital_tlv),
556 SOC_DOUBLE_R_TLV("DMIC2 Volume", LM49453_P0_DMIC2_LEVELL_REG,
557 LM49453_P0_DMIC2_LEVELR_REG, 0, 6, 0, digital_tlv),
559 SOC_DAPM_ENUM("Mic2Mode", lm49453_mic2mode_enum),
560 SOC_DAPM_ENUM("DMIC12 SRC", lm49453_dmic12_cfg_enum),
561 SOC_DAPM_ENUM("DMIC34 SRC", lm49453_dmic34_cfg_enum),
563 /* Capture path filter enable */
564 SOC_SINGLE("DMIC1 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
566 SOC_SINGLE("DMIC2 HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
568 SOC_SINGLE("ADC HPFilter Switch", LM49453_P0_ADC_FX_ENABLES_REG,
571 SOC_DOUBLE_R_TLV("DAC HP Volume", LM49453_P0_DAC_HP_LEVELL_REG,
572 LM49453_P0_DAC_HP_LEVELR_REG, 0, 6, 0, digital_tlv),
573 SOC_DOUBLE_R_TLV("DAC LO Volume", LM49453_P0_DAC_LO_LEVELL_REG,
574 LM49453_P0_DAC_LO_LEVELR_REG, 0, 6, 0, digital_tlv),
575 SOC_DOUBLE_R_TLV("DAC LS Volume", LM49453_P0_DAC_LS_LEVELL_REG,
576 LM49453_P0_DAC_LS_LEVELR_REG, 0, 6, 0, digital_tlv),
577 SOC_DOUBLE_R_TLV("DAC HA Volume", LM49453_P0_DAC_HA_LEVELL_REG,
578 LM49453_P0_DAC_HA_LEVELR_REG, 0, 6, 0, digital_tlv),
580 SOC_SINGLE_TLV("EP Volume", LM49453_P0_DAC_LS_LEVELL_REG,
581 0, 6, 0, digital_tlv),
583 SOC_SINGLE_TLV("PORT1_1_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
585 SOC_SINGLE_TLV("PORT1_2_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
587 SOC_SINGLE_TLV("PORT1_3_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
589 SOC_SINGLE_TLV("PORT1_4_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL1_REG,
591 SOC_SINGLE_TLV("PORT1_5_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
593 SOC_SINGLE_TLV("PORT1_6_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
595 SOC_SINGLE_TLV("PORT1_7_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
597 SOC_SINGLE_TLV("PORT1_8_RX_LVL Volume", LM49453_P0_PORT1_RX_LVL2_REG,
600 SOC_SINGLE_TLV("PORT2_1_RX_LVL Volume", LM49453_P0_PORT2_RX_LVL_REG,
602 SOC_SINGLE_TLV("PORT2_2_RX_LVL Volume", LM49453_P0_PORT2_RX_LVL_REG,
605 SOC_SINGLE("Port1 Playback Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
607 SOC_SINGLE("Port2 Playback Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
609 SOC_SINGLE("Port1 Capture Switch", LM49453_P0_AUDIO_PORT1_BASIC_REG,
611 SOC_SINGLE("Port2 Capture Switch", LM49453_P0_AUDIO_PORT2_BASIC_REG,
617 static const struct snd_soc_dapm_widget lm49453_dapm_widgets[] = {
619 /* All end points HP,EP, LS, Lineout and Haptic */
620 SND_SOC_DAPM_OUTPUT("HPOUTL"),
621 SND_SOC_DAPM_OUTPUT("HPOUTR"),
622 SND_SOC_DAPM_OUTPUT("EPOUT"),
623 SND_SOC_DAPM_OUTPUT("LSOUTL"),
624 SND_SOC_DAPM_OUTPUT("LSOUTR"),
625 SND_SOC_DAPM_OUTPUT("LOOUTR"),
626 SND_SOC_DAPM_OUTPUT("LOOUTL"),
627 SND_SOC_DAPM_OUTPUT("HAOUTL"),
628 SND_SOC_DAPM_OUTPUT("HAOUTR"),
630 SND_SOC_DAPM_INPUT("AMIC1"),
631 SND_SOC_DAPM_INPUT("AMIC2"),
632 SND_SOC_DAPM_INPUT("DMIC1DAT"),
633 SND_SOC_DAPM_INPUT("DMIC2DAT"),
634 SND_SOC_DAPM_INPUT("AUXL"),
635 SND_SOC_DAPM_INPUT("AUXR"),
637 SND_SOC_DAPM_PGA("PORT1_1_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
638 SND_SOC_DAPM_PGA("PORT1_2_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
639 SND_SOC_DAPM_PGA("PORT1_3_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
640 SND_SOC_DAPM_PGA("PORT1_4_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
641 SND_SOC_DAPM_PGA("PORT1_5_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
642 SND_SOC_DAPM_PGA("PORT1_6_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
643 SND_SOC_DAPM_PGA("PORT1_7_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
644 SND_SOC_DAPM_PGA("PORT1_8_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
645 SND_SOC_DAPM_PGA("PORT2_1_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
646 SND_SOC_DAPM_PGA("PORT2_2_RX", SND_SOC_NOPM, 0, 0, NULL, 0),
648 SND_SOC_DAPM_SUPPLY("AMIC1Bias", LM49453_P0_MICL_REG, 6, 0, NULL, 0),
649 SND_SOC_DAPM_SUPPLY("AMIC2Bias", LM49453_P0_MICR_REG, 6, 0, NULL, 0),
651 /* playback path driver enables */
652 SND_SOC_DAPM_OUT_DRV("Headset Switch",
653 LM49453_P0_PMC_SETUP_REG, 0, 0, NULL, 0),
654 SND_SOC_DAPM_OUT_DRV("Earpiece Switch",
655 LM49453_P0_EP_REG, 0, 0, NULL, 0),
656 SND_SOC_DAPM_OUT_DRV("Speaker Left Switch",
657 LM49453_P0_DIS_PKVL_FB_REG, 0, 1, NULL, 0),
658 SND_SOC_DAPM_OUT_DRV("Speaker Right Switch",
659 LM49453_P0_DIS_PKVL_FB_REG, 1, 1, NULL, 0),
660 SND_SOC_DAPM_OUT_DRV("Haptic Left Switch",
661 LM49453_P0_DIS_PKVL_FB_REG, 2, 1, NULL, 0),
662 SND_SOC_DAPM_OUT_DRV("Haptic Right Switch",
663 LM49453_P0_DIS_PKVL_FB_REG, 3, 1, NULL, 0),
666 SND_SOC_DAPM_DAC("HPL DAC", "Headset", SND_SOC_NOPM, 0, 0),
667 SND_SOC_DAPM_DAC("HPR DAC", "Headset", SND_SOC_NOPM, 0, 0),
668 SND_SOC_DAPM_DAC("LSL DAC", "Speaker", SND_SOC_NOPM, 0, 0),
669 SND_SOC_DAPM_DAC("LSR DAC", "Speaker", SND_SOC_NOPM, 0, 0),
670 SND_SOC_DAPM_DAC("HAL DAC", "Haptic", SND_SOC_NOPM, 0, 0),
671 SND_SOC_DAPM_DAC("HAR DAC", "Haptic", SND_SOC_NOPM, 0, 0),
672 SND_SOC_DAPM_DAC("LOL DAC", "Lineout", SND_SOC_NOPM, 0, 0),
673 SND_SOC_DAPM_DAC("LOR DAC", "Lineout", SND_SOC_NOPM, 0, 0),
676 SND_SOC_DAPM_PGA("AUXL Input",
677 LM49453_P0_ANALOG_MIXER_ADC_REG, 2, 0, NULL, 0),
678 SND_SOC_DAPM_PGA("AUXR Input",
679 LM49453_P0_ANALOG_MIXER_ADC_REG, 3, 0, NULL, 0),
681 SND_SOC_DAPM_PGA("Sidetone", SND_SOC_NOPM, 0, 0, NULL, 0),
684 SND_SOC_DAPM_ADC("DMIC1 Left", "Capture", SND_SOC_NOPM, 1, 0),
685 SND_SOC_DAPM_ADC("DMIC1 Right", "Capture", SND_SOC_NOPM, 1, 0),
686 SND_SOC_DAPM_ADC("DMIC2 Left", "Capture", SND_SOC_NOPM, 1, 0),
687 SND_SOC_DAPM_ADC("DMIC2 Right", "Capture", SND_SOC_NOPM, 1, 0),
689 SND_SOC_DAPM_ADC("ADC Left", "Capture", SND_SOC_NOPM, 1, 0),
690 SND_SOC_DAPM_ADC("ADC Right", "Capture", SND_SOC_NOPM, 0, 0),
692 SND_SOC_DAPM_MUX("ADCL Mux", SND_SOC_NOPM, 0, 0,
693 &lm49453_adcl_mux_control),
694 SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0,
695 &lm49453_adcr_mux_control),
697 SND_SOC_DAPM_MUX("Mic1 Input",
698 SND_SOC_NOPM, 0, 0, &lm49453_adcl_mux_control),
700 SND_SOC_DAPM_MUX("Mic2 Input",
701 SND_SOC_NOPM, 0, 0, &lm49453_adcr_mux_control),
704 SND_SOC_DAPM_AIF_IN("PORT1_SDI", NULL, 0,
705 LM49453_P0_PULL_CONFIG1_REG, 2, 0),
706 SND_SOC_DAPM_AIF_IN("PORT2_SDI", NULL, 0,
707 LM49453_P0_PULL_CONFIG1_REG, 6, 0),
709 SND_SOC_DAPM_AIF_OUT("PORT1_SDO", NULL, 0,
710 LM49453_P0_PULL_CONFIG1_REG, 3, 0),
711 SND_SOC_DAPM_AIF_OUT("PORT2_SDO", NULL, 0,
712 LM49453_P0_PULL_CONFIG1_REG, 7, 0),
714 /* Port1 TX controls */
715 SND_SOC_DAPM_OUT_DRV("P1_1_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
716 SND_SOC_DAPM_OUT_DRV("P1_2_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
717 SND_SOC_DAPM_OUT_DRV("P1_3_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
718 SND_SOC_DAPM_OUT_DRV("P1_4_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
719 SND_SOC_DAPM_OUT_DRV("P1_5_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
720 SND_SOC_DAPM_OUT_DRV("P1_6_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
721 SND_SOC_DAPM_OUT_DRV("P1_7_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
722 SND_SOC_DAPM_OUT_DRV("P1_8_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
724 /* Port2 TX controls */
725 SND_SOC_DAPM_OUT_DRV("P2_1_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
726 SND_SOC_DAPM_OUT_DRV("P2_2_TX", SND_SOC_NOPM, 0, 0, NULL, 0),
729 SND_SOC_DAPM_MIXER("Sidetone Mixer", SND_SOC_NOPM, 0, 0,
730 lm49453_sidetone_mixer_controls,
731 ARRAY_SIZE(lm49453_sidetone_mixer_controls)),
734 SND_SOC_DAPM_MIXER("HPL Mixer", SND_SOC_NOPM, 0, 0,
735 lm49453_headset_left_mixer,
736 ARRAY_SIZE(lm49453_headset_left_mixer)),
737 SND_SOC_DAPM_MIXER("HPR Mixer", SND_SOC_NOPM, 0, 0,
738 lm49453_headset_right_mixer,
739 ARRAY_SIZE(lm49453_headset_right_mixer)),
740 SND_SOC_DAPM_MIXER("LOL Mixer", SND_SOC_NOPM, 0, 0,
741 lm49453_lineout_left_mixer,
742 ARRAY_SIZE(lm49453_lineout_left_mixer)),
743 SND_SOC_DAPM_MIXER("LOR Mixer", SND_SOC_NOPM, 0, 0,
744 lm49453_lineout_right_mixer,
745 ARRAY_SIZE(lm49453_lineout_right_mixer)),
746 SND_SOC_DAPM_MIXER("LSL Mixer", SND_SOC_NOPM, 0, 0,
747 lm49453_speaker_left_mixer,
748 ARRAY_SIZE(lm49453_speaker_left_mixer)),
749 SND_SOC_DAPM_MIXER("LSR Mixer", SND_SOC_NOPM, 0, 0,
750 lm49453_speaker_right_mixer,
751 ARRAY_SIZE(lm49453_speaker_right_mixer)),
752 SND_SOC_DAPM_MIXER("HAL Mixer", SND_SOC_NOPM, 0, 0,
753 lm49453_haptic_left_mixer,
754 ARRAY_SIZE(lm49453_haptic_left_mixer)),
755 SND_SOC_DAPM_MIXER("HAR Mixer", SND_SOC_NOPM, 0, 0,
756 lm49453_haptic_right_mixer,
757 ARRAY_SIZE(lm49453_haptic_right_mixer)),
760 SND_SOC_DAPM_MIXER("Port1_1 Mixer", SND_SOC_NOPM, 0, 0,
761 lm49453_port1_tx1_mixer,
762 ARRAY_SIZE(lm49453_port1_tx1_mixer)),
763 SND_SOC_DAPM_MIXER("Port1_2 Mixer", SND_SOC_NOPM, 0, 0,
764 lm49453_port1_tx2_mixer,
765 ARRAY_SIZE(lm49453_port1_tx2_mixer)),
766 SND_SOC_DAPM_MIXER("Port1_3 Mixer", SND_SOC_NOPM, 0, 0,
767 lm49453_port1_tx3_mixer,
768 ARRAY_SIZE(lm49453_port1_tx3_mixer)),
769 SND_SOC_DAPM_MIXER("Port1_4 Mixer", SND_SOC_NOPM, 0, 0,
770 lm49453_port1_tx4_mixer,
771 ARRAY_SIZE(lm49453_port1_tx4_mixer)),
772 SND_SOC_DAPM_MIXER("Port1_5 Mixer", SND_SOC_NOPM, 0, 0,
773 lm49453_port1_tx5_mixer,
774 ARRAY_SIZE(lm49453_port1_tx5_mixer)),
775 SND_SOC_DAPM_MIXER("Port1_6 Mixer", SND_SOC_NOPM, 0, 0,
776 lm49453_port1_tx6_mixer,
777 ARRAY_SIZE(lm49453_port1_tx6_mixer)),
778 SND_SOC_DAPM_MIXER("Port1_7 Mixer", SND_SOC_NOPM, 0, 0,
779 lm49453_port1_tx7_mixer,
780 ARRAY_SIZE(lm49453_port1_tx7_mixer)),
781 SND_SOC_DAPM_MIXER("Port1_8 Mixer", SND_SOC_NOPM, 0, 0,
782 lm49453_port1_tx8_mixer,
783 ARRAY_SIZE(lm49453_port1_tx8_mixer)),
785 SND_SOC_DAPM_MIXER("Port2_1 Mixer", SND_SOC_NOPM, 0, 0,
786 lm49453_port2_tx1_mixer,
787 ARRAY_SIZE(lm49453_port2_tx1_mixer)),
788 SND_SOC_DAPM_MIXER("Port2_2 Mixer", SND_SOC_NOPM, 0, 0,
789 lm49453_port2_tx2_mixer,
790 ARRAY_SIZE(lm49453_port2_tx2_mixer)),
793 static const struct snd_soc_dapm_route lm49453_audio_map[] = {
794 /* Port SDI mapping */
795 { "PORT1_1_RX", "Port1 Playback Switch", "PORT1_SDI" },
796 { "PORT1_2_RX", "Port1 Playback Switch", "PORT1_SDI" },
797 { "PORT1_3_RX", "Port1 Playback Switch", "PORT1_SDI" },
798 { "PORT1_4_RX", "Port1 Playback Switch", "PORT1_SDI" },
799 { "PORT1_5_RX", "Port1 Playback Switch", "PORT1_SDI" },
800 { "PORT1_6_RX", "Port1 Playback Switch", "PORT1_SDI" },
801 { "PORT1_7_RX", "Port1 Playback Switch", "PORT1_SDI" },
802 { "PORT1_8_RX", "Port1 Playback Switch", "PORT1_SDI" },
804 { "PORT2_1_RX", "Port2 Playback Switch", "PORT2_SDI" },
805 { "PORT2_2_RX", "Port2 Playback Switch", "PORT2_SDI" },
808 { "HPL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
809 { "HPL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
810 { "HPL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
811 { "HPL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
812 { "HPL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
813 { "HPL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
814 { "HPL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
815 { "HPL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
817 { "HPL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
818 { "HPL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
820 { "HPL Mixer", "ADCL Switch", "ADC Left" },
821 { "HPL Mixer", "ADCR Switch", "ADC Right" },
822 { "HPL Mixer", "DMIC1L Switch", "DMIC1 Left" },
823 { "HPL Mixer", "DMIC1R Switch", "DMIC1 Right" },
824 { "HPL Mixer", "DMIC2L Switch", "DMIC2 Left" },
825 { "HPL Mixer", "DMIC2R Switch", "DMIC2 Right" },
826 { "HPL Mixer", "Sidetone Switch", "Sidetone" },
828 { "HPL DAC", NULL, "HPL Mixer" },
830 { "HPR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
831 { "HPR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
832 { "HPR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
833 { "HPR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
834 { "HPR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
835 { "HPR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
836 { "HPR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
837 { "HPR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
840 { "HPR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
841 { "HPR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
843 { "HPR Mixer", "ADCL Switch", "ADC Left" },
844 { "HPR Mixer", "ADCR Switch", "ADC Right" },
845 { "HPR Mixer", "DMIC1L Switch", "DMIC1 Left" },
846 { "HPR Mixer", "DMIC1R Switch", "DMIC1 Right" },
847 { "HPR Mixer", "DMIC2L Switch", "DMIC2 Left" },
848 { "HPR Mixer", "DMIC2L Switch", "DMIC2 Right" },
849 { "HPR Mixer", "Sidetone Switch", "Sidetone" },
851 { "HPR DAC", NULL, "HPR Mixer" },
853 { "HPOUTL", "Headset Switch", "HPL DAC"},
854 { "HPOUTR", "Headset Switch", "HPR DAC"},
857 { "EPOUT", "Earpiece Switch", "HPL DAC" },
860 { "LSL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
861 { "LSL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
862 { "LSL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
863 { "LSL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
864 { "LSL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
865 { "LSL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
866 { "LSL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
867 { "LSL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
870 { "LSL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
871 { "LSL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
873 { "LSL Mixer", "ADCL Switch", "ADC Left" },
874 { "LSL Mixer", "ADCR Switch", "ADC Right" },
875 { "LSL Mixer", "DMIC1L Switch", "DMIC1 Left" },
876 { "LSL Mixer", "DMIC1R Switch", "DMIC1 Right" },
877 { "LSL Mixer", "DMIC2L Switch", "DMIC2 Left" },
878 { "LSL Mixer", "DMIC2R Switch", "DMIC2 Right" },
879 { "LSL Mixer", "Sidetone Switch", "Sidetone" },
881 { "LSL DAC", NULL, "LSL Mixer" },
883 { "LSR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
884 { "LSR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
885 { "LSR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
886 { "LSR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
887 { "LSR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
888 { "LSR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
889 { "LSR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
890 { "LSR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
893 { "LSR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
894 { "LSR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
896 { "LSR Mixer", "ADCL Switch", "ADC Left" },
897 { "LSR Mixer", "ADCR Switch", "ADC Right" },
898 { "LSR Mixer", "DMIC1L Switch", "DMIC1 Left" },
899 { "LSR Mixer", "DMIC1R Switch", "DMIC1 Right" },
900 { "LSR Mixer", "DMIC2L Switch", "DMIC2 Left" },
901 { "LSR Mixer", "DMIC2R Switch", "DMIC2 Right" },
902 { "LSR Mixer", "Sidetone Switch", "Sidetone" },
904 { "LSR DAC", NULL, "LSR Mixer" },
906 { "LSOUTL", "Speaker Left Switch", "LSL DAC"},
907 { "LSOUTR", "Speaker Left Switch", "LSR DAC"},
910 { "HAL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
911 { "HAL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
912 { "HAL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
913 { "HAL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
914 { "HAL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
915 { "HAL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
916 { "HAL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
917 { "HAL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
920 { "HAL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
921 { "HAL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
923 { "HAL Mixer", "ADCL Switch", "ADC Left" },
924 { "HAL Mixer", "ADCR Switch", "ADC Right" },
925 { "HAL Mixer", "DMIC1L Switch", "DMIC1 Left" },
926 { "HAL Mixer", "DMIC1R Switch", "DMIC1 Right" },
927 { "HAL Mixer", "DMIC2L Switch", "DMIC2 Left" },
928 { "HAL Mixer", "DMIC2R Switch", "DMIC2 Right" },
929 { "HAL Mixer", "Sidetone Switch", "Sidetone" },
931 { "HAL DAC", NULL, "HAL Mixer" },
933 { "HAR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
934 { "HAR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
935 { "HAR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
936 { "HAR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
937 { "HAR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
938 { "HAR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
939 { "HAR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
940 { "HAR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
943 { "HAR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
944 { "HAR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
946 { "HAR Mixer", "ADCL Switch", "ADC Left" },
947 { "HAR Mixer", "ADCR Switch", "ADC Right" },
948 { "HAR Mixer", "DMIC1L Switch", "DMIC1 Left" },
949 { "HAR Mixer", "DMIC1R Switch", "DMIC1 Right" },
950 { "HAR Mixer", "DMIC2L Switch", "DMIC2 Left" },
951 { "HAR Mixer", "DMIC2R Switch", "DMIC2 Right" },
952 { "HAR Mixer", "Sideton Switch", "Sidetone" },
954 { "HAR DAC", NULL, "HAR Mixer" },
956 { "HAOUTL", "Haptic Left Switch", "HAL DAC" },
957 { "HAOUTR", "Haptic Right Switch", "HAR DAC" },
960 { "LOL Mixer", "Port1_1 Switch", "PORT1_1_RX" },
961 { "LOL Mixer", "Port1_2 Switch", "PORT1_2_RX" },
962 { "LOL Mixer", "Port1_3 Switch", "PORT1_3_RX" },
963 { "LOL Mixer", "Port1_4 Switch", "PORT1_4_RX" },
964 { "LOL Mixer", "Port1_5 Switch", "PORT1_5_RX" },
965 { "LOL Mixer", "Port1_6 Switch", "PORT1_6_RX" },
966 { "LOL Mixer", "Port1_7 Switch", "PORT1_7_RX" },
967 { "LOL Mixer", "Port1_8 Switch", "PORT1_8_RX" },
970 { "LOL Mixer", "Port2_1 Switch", "PORT2_1_RX" },
971 { "LOL Mixer", "Port2_2 Switch", "PORT2_2_RX" },
973 { "LOL Mixer", "ADCL Switch", "ADC Left" },
974 { "LOL Mixer", "ADCR Switch", "ADC Right" },
975 { "LOL Mixer", "DMIC1L Switch", "DMIC1 Left" },
976 { "LOL Mixer", "DMIC1R Switch", "DMIC1 Right" },
977 { "LOL Mixer", "DMIC2L Switch", "DMIC2 Left" },
978 { "LOL Mixer", "DMIC2R Switch", "DMIC2 Right" },
979 { "LOL Mixer", "Sidetone Switch", "Sidetone" },
981 { "LOL DAC", NULL, "LOL Mixer" },
983 { "LOR Mixer", "Port1_1 Switch", "PORT1_1_RX" },
984 { "LOR Mixer", "Port1_2 Switch", "PORT1_2_RX" },
985 { "LOR Mixer", "Port1_3 Switch", "PORT1_3_RX" },
986 { "LOR Mixer", "Port1_4 Switch", "PORT1_4_RX" },
987 { "LOR Mixer", "Port1_5 Switch", "PORT1_5_RX" },
988 { "LOR Mixer", "Port1_6 Switch", "PORT1_6_RX" },
989 { "LOR Mixer", "Port1_7 Switch", "PORT1_7_RX" },
990 { "LOR Mixer", "Port1_8 Switch", "PORT1_8_RX" },
993 { "LOR Mixer", "Port2_1 Switch", "PORT2_1_RX" },
994 { "LOR Mixer", "Port2_2 Switch", "PORT2_2_RX" },
996 { "LOR Mixer", "ADCL Switch", "ADC Left" },
997 { "LOR Mixer", "ADCR Switch", "ADC Right" },
998 { "LOR Mixer", "DMIC1L Switch", "DMIC1 Left" },
999 { "LOR Mixer", "DMIC1R Switch", "DMIC1 Right" },
1000 { "LOR Mixer", "DMIC2L Switch", "DMIC2 Left" },
1001 { "LOR Mixer", "DMIC2R Switch", "DMIC2 Right" },
1002 { "LOR Mixer", "Sidetone Switch", "Sidetone" },
1004 { "LOR DAC", NULL, "LOR Mixer" },
1006 { "LOOUTL", NULL, "LOL DAC" },
1007 { "LOOUTR", NULL, "LOR DAC" },
1010 /* Port1 mappings */
1011 { "Port1_1 Mixer", "ADCL Switch", "ADC Left" },
1012 { "Port1_1 Mixer", "ADCR Switch", "ADC Right" },
1013 { "Port1_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1014 { "Port1_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1015 { "Port1_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1016 { "Port1_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1018 { "Port1_2 Mixer", "ADCL Switch", "ADC Left" },
1019 { "Port1_2 Mixer", "ADCR Switch", "ADC Right" },
1020 { "Port1_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1021 { "Port1_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1022 { "Port1_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1023 { "Port1_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1025 { "Port1_3 Mixer", "ADCL Switch", "ADC Left" },
1026 { "Port1_3 Mixer", "ADCR Switch", "ADC Right" },
1027 { "Port1_3 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1028 { "Port1_3 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1029 { "Port1_3 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1030 { "Port1_3 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1032 { "Port1_4 Mixer", "ADCL Switch", "ADC Left" },
1033 { "Port1_4 Mixer", "ADCR Switch", "ADC Right" },
1034 { "Port1_4 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1035 { "Port1_4 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1036 { "Port1_4 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1037 { "Port1_4 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1039 { "Port1_5 Mixer", "ADCL Switch", "ADC Left" },
1040 { "Port1_5 Mixer", "ADCR Switch", "ADC Right" },
1041 { "Port1_5 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1042 { "Port1_5 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1043 { "Port1_5 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1044 { "Port1_5 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1046 { "Port1_6 Mixer", "ADCL Switch", "ADC Left" },
1047 { "Port1_6 Mixer", "ADCR Switch", "ADC Right" },
1048 { "Port1_6 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1049 { "Port1_6 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1050 { "Port1_6 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1051 { "Port1_6 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1053 { "Port1_7 Mixer", "ADCL Switch", "ADC Left" },
1054 { "Port1_7 Mixer", "ADCR Switch", "ADC Right" },
1055 { "Port1_7 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1056 { "Port1_7 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1057 { "Port1_7 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1058 { "Port1_7 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1060 { "Port1_8 Mixer", "ADCL Switch", "ADC Left" },
1061 { "Port1_8 Mixer", "ADCR Switch", "ADC Right" },
1062 { "Port1_8 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1063 { "Port1_8 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1064 { "Port1_8 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1065 { "Port1_8 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1067 { "Port2_1 Mixer", "ADCL Switch", "ADC Left" },
1068 { "Port2_1 Mixer", "ADCR Switch", "ADC Right" },
1069 { "Port2_1 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1070 { "Port2_1 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1071 { "Port2_1 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1072 { "Port2_1 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1074 { "Port2_2 Mixer", "ADCL Switch", "ADC Left" },
1075 { "Port2_2 Mixer", "ADCR Switch", "ADC Right" },
1076 { "Port2_2 Mixer", "DMIC1L Switch", "DMIC1 Left" },
1077 { "Port2_2 Mixer", "DMIC1R Switch", "DMIC1 Right" },
1078 { "Port2_2 Mixer", "DMIC2L Switch", "DMIC2 Left" },
1079 { "Port2_2 Mixer", "DMIC2R Switch", "DMIC2 Right" },
1081 { "P1_1_TX", NULL, "Port1_1 Mixer" },
1082 { "P1_2_TX", NULL, "Port1_2 Mixer" },
1083 { "P1_3_TX", NULL, "Port1_3 Mixer" },
1084 { "P1_4_TX", NULL, "Port1_4 Mixer" },
1085 { "P1_5_TX", NULL, "Port1_5 Mixer" },
1086 { "P1_6_TX", NULL, "Port1_6 Mixer" },
1087 { "P1_7_TX", NULL, "Port1_7 Mixer" },
1088 { "P1_8_TX", NULL, "Port1_8 Mixer" },
1090 { "P2_1_TX", NULL, "Port2_1 Mixer" },
1091 { "P2_2_TX", NULL, "Port2_2 Mixer" },
1093 { "PORT1_SDO", "Port1 Capture Switch", "P1_1_TX"},
1094 { "PORT1_SDO", "Port1 Capture Switch", "P1_2_TX"},
1095 { "PORT1_SDO", "Port1 Capture Switch", "P1_3_TX"},
1096 { "PORT1_SDO", "Port1 Capture Switch", "P1_4_TX"},
1097 { "PORT1_SDO", "Port1 Capture Switch", "P1_5_TX"},
1098 { "PORT1_SDO", "Port1 Capture Switch", "P1_6_TX"},
1099 { "PORT1_SDO", "Port1 Capture Switch", "P1_7_TX"},
1100 { "PORT1_SDO", "Port1 Capture Switch", "P1_8_TX"},
1102 { "PORT2_SDO", "Port2 Capture Switch", "P2_1_TX"},
1103 { "PORT2_SDO", "Port2 Capture Switch", "P2_2_TX"},
1105 { "Mic1 Input", NULL, "AMIC1" },
1106 { "Mic2 Input", NULL, "AMIC2" },
1108 { "AUXL Input", NULL, "AUXL" },
1109 { "AUXR Input", NULL, "AUXR" },
1111 /* AUX connections */
1112 { "ADCL Mux", "Aux_L", "AUXL Input" },
1113 { "ADCL Mux", "MIC1", "Mic1 Input" },
1115 { "ADCR Mux", "Aux_R", "AUXR Input" },
1116 { "ADCR Mux", "MIC2", "Mic2 Input" },
1118 /* ADC connection */
1119 { "ADC Left", NULL, "ADCL Mux"},
1120 { "ADC Right", NULL, "ADCR Mux"},
1122 { "DMIC1 Left", NULL, "DMIC1DAT"},
1123 { "DMIC1 Right", NULL, "DMIC1DAT"},
1124 { "DMIC2 Left", NULL, "DMIC2DAT"},
1125 { "DMIC2 Right", NULL, "DMIC2DAT"},
1128 { "Sidetone Mixer", NULL, "ADC Left" },
1129 { "Sidetone Mixer", NULL, "ADC Right" },
1130 { "Sidetone Mixer", NULL, "DMIC1 Left" },
1131 { "Sidetone Mixer", NULL, "DMIC1 Right" },
1132 { "Sidetone Mixer", NULL, "DMIC2 Left" },
1133 { "Sidetone Mixer", NULL, "DMIC2 Right" },
1135 { "Sidetone", "Sidetone Switch", "Sidetone Mixer" },
1138 static int lm49453_hw_params(struct snd_pcm_substream *substream,
1139 struct snd_pcm_hw_params *params,
1140 struct snd_soc_dai *dai)
1142 struct snd_soc_codec *codec = dai->codec;
1143 struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);
1146 lm49453->fs_rate = params_rate(params);
1148 /* Setting DAC clock dividers based on substream sample rate. */
1149 switch (lm49453->fs_rate) {
1169 snd_soc_write(codec, LM49453_P0_ADC_CLK_DIV_REG, clk_div);
1170 snd_soc_write(codec, LM49453_P0_DAC_HP_CLK_DIV_REG, clk_div);
1175 static int lm49453_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1177 struct snd_soc_codec *codec = codec_dai->codec;
1184 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1185 case SND_SOC_DAIFMT_CBS_CFS:
1188 case SND_SOC_DAIFMT_CBS_CFM:
1189 aif_val = LM49453_AUDIO_PORT1_BASIC_SYNC_MS;
1191 case SND_SOC_DAIFMT_CBM_CFS:
1192 aif_val = LM49453_AUDIO_PORT1_BASIC_CLK_MS;
1194 case SND_SOC_DAIFMT_CBM_CFM:
1195 aif_val = LM49453_AUDIO_PORT1_BASIC_CLK_MS |
1196 LM49453_AUDIO_PORT1_BASIC_SYNC_MS;
1203 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1204 case SND_SOC_DAIFMT_I2S:
1206 case SND_SOC_DAIFMT_DSP_A:
1208 clk_phase = (1 << 5);
1211 case SND_SOC_DAIFMT_DSP_B:
1213 clk_phase = (1 << 5);
1220 snd_soc_update_bits(codec, LM49453_P0_AUDIO_PORT1_BASIC_REG,
1221 LM49453_AUDIO_PORT1_BASIC_FMT_MASK|BIT(1)|BIT(5),
1222 (aif_val | mode | clk_phase));
1224 snd_soc_write(codec, LM49453_P0_AUDIO_PORT1_RX_MSB_REG, clk_shift);
1229 static int lm49453_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1230 unsigned int freq, int dir)
1232 struct snd_soc_codec *codec = dai->codec;
1239 /* pll clk slection */
1244 /* fll clk slection */
1251 snd_soc_update_bits(codec, LM49453_P0_PMC_SETUP_REG, BIT(4), pll_clk);
1256 static int lm49453_hp_mute(struct snd_soc_dai *dai, int mute)
1258 snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(1)|BIT(0),
1259 (mute ? (BIT(1)|BIT(0)) : 0));
1263 static int lm49453_lo_mute(struct snd_soc_dai *dai, int mute)
1265 snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(3)|BIT(2),
1266 (mute ? (BIT(3)|BIT(2)) : 0));
1270 static int lm49453_ls_mute(struct snd_soc_dai *dai, int mute)
1272 snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(5)|BIT(4),
1273 (mute ? (BIT(5)|BIT(4)) : 0));
1277 static int lm49453_ep_mute(struct snd_soc_dai *dai, int mute)
1279 snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(4),
1280 (mute ? BIT(4) : 0));
1284 static int lm49453_ha_mute(struct snd_soc_dai *dai, int mute)
1286 snd_soc_update_bits(dai->codec, LM49453_P0_DAC_DSP_REG, BIT(7)|BIT(6),
1287 (mute ? (BIT(7)|BIT(6)) : 0));
1291 static int lm49453_set_bias_level(struct snd_soc_codec *codec,
1292 enum snd_soc_bias_level level)
1294 struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);
1297 case SND_SOC_BIAS_ON:
1298 case SND_SOC_BIAS_PREPARE:
1301 case SND_SOC_BIAS_STANDBY:
1302 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
1303 regcache_sync(lm49453->regmap);
1305 snd_soc_update_bits(codec, LM49453_P0_PMC_SETUP_REG,
1306 LM49453_PMC_SETUP_CHIP_EN, LM49453_CHIP_EN);
1309 case SND_SOC_BIAS_OFF:
1310 snd_soc_update_bits(codec, LM49453_P0_PMC_SETUP_REG,
1311 LM49453_PMC_SETUP_CHIP_EN, 0);
1315 codec->dapm.bias_level = level;
1320 /* Formates supported by LM49453 driver. */
1321 #define LM49453_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1322 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1324 static struct snd_soc_dai_ops lm49453_headset_dai_ops = {
1325 .hw_params = lm49453_hw_params,
1326 .set_sysclk = lm49453_set_dai_sysclk,
1327 .set_fmt = lm49453_set_dai_fmt,
1328 .digital_mute = lm49453_hp_mute,
1331 static struct snd_soc_dai_ops lm49453_speaker_dai_ops = {
1332 .hw_params = lm49453_hw_params,
1333 .set_sysclk = lm49453_set_dai_sysclk,
1334 .set_fmt = lm49453_set_dai_fmt,
1335 .digital_mute = lm49453_ls_mute,
1338 static struct snd_soc_dai_ops lm49453_haptic_dai_ops = {
1339 .hw_params = lm49453_hw_params,
1340 .set_sysclk = lm49453_set_dai_sysclk,
1341 .set_fmt = lm49453_set_dai_fmt,
1342 .digital_mute = lm49453_ha_mute,
1345 static struct snd_soc_dai_ops lm49453_ep_dai_ops = {
1346 .hw_params = lm49453_hw_params,
1347 .set_sysclk = lm49453_set_dai_sysclk,
1348 .set_fmt = lm49453_set_dai_fmt,
1349 .digital_mute = lm49453_ep_mute,
1352 static struct snd_soc_dai_ops lm49453_lineout_dai_ops = {
1353 .hw_params = lm49453_hw_params,
1354 .set_sysclk = lm49453_set_dai_sysclk,
1355 .set_fmt = lm49453_set_dai_fmt,
1356 .digital_mute = lm49453_lo_mute,
1359 /* LM49453 dai structure. */
1360 static struct snd_soc_dai_driver lm49453_dai[] = {
1362 .name = "LM49453 Headset",
1364 .stream_name = "Headset",
1367 .rates = SNDRV_PCM_RATE_8000_192000,
1368 .formats = LM49453_FORMATS,
1371 .stream_name = "Capture",
1374 .rates = SNDRV_PCM_RATE_8000_192000,
1375 .formats = LM49453_FORMATS,
1377 .ops = &lm49453_headset_dai_ops,
1378 .symmetric_rates = 1,
1381 .name = "LM49453 Speaker",
1383 .stream_name = "Speaker",
1386 .rates = SNDRV_PCM_RATE_8000_192000,
1387 .formats = LM49453_FORMATS,
1389 .ops = &lm49453_speaker_dai_ops,
1392 .name = "LM49453 Haptic",
1394 .stream_name = "Haptic",
1397 .rates = SNDRV_PCM_RATE_8000_192000,
1398 .formats = LM49453_FORMATS,
1400 .ops = &lm49453_haptic_dai_ops,
1403 .name = "LM49453 Earpiece",
1405 .stream_name = "Earpiece",
1408 .rates = SNDRV_PCM_RATE_8000_192000,
1409 .formats = LM49453_FORMATS,
1411 .ops = &lm49453_ep_dai_ops,
1414 .name = "LM49453 line out",
1416 .stream_name = "Lineout",
1419 .rates = SNDRV_PCM_RATE_8000_192000,
1420 .formats = LM49453_FORMATS,
1422 .ops = &lm49453_lineout_dai_ops,
1426 static int lm49453_suspend(struct snd_soc_codec *codec)
1428 lm49453_set_bias_level(codec, SND_SOC_BIAS_OFF);
1432 static int lm49453_resume(struct snd_soc_codec *codec)
1434 lm49453_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1438 static int lm49453_probe(struct snd_soc_codec *codec)
1440 struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);
1443 codec->control_data = lm49453->regmap;
1445 ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
1447 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1454 /* power down chip */
1455 static int lm49453_remove(struct snd_soc_codec *codec)
1457 lm49453_set_bias_level(codec, SND_SOC_BIAS_OFF);
1461 static struct snd_soc_codec_driver soc_codec_dev_lm49453 = {
1462 .probe = lm49453_probe,
1463 .remove = lm49453_remove,
1464 .suspend = lm49453_suspend,
1465 .resume = lm49453_resume,
1466 .set_bias_level = lm49453_set_bias_level,
1467 .controls = lm49453_snd_controls,
1468 .num_controls = ARRAY_SIZE(lm49453_snd_controls),
1469 .dapm_widgets = lm49453_dapm_widgets,
1470 .num_dapm_widgets = ARRAY_SIZE(lm49453_dapm_widgets),
1471 .dapm_routes = lm49453_audio_map,
1472 .num_dapm_routes = ARRAY_SIZE(lm49453_audio_map),
1473 .idle_bias_off = true,
1476 static const struct regmap_config lm49453_regmap_config = {
1480 .max_register = LM49453_MAX_REGISTER,
1481 .reg_defaults = lm49453_reg_defs,
1482 .num_reg_defaults = ARRAY_SIZE(lm49453_reg_defs),
1483 .cache_type = REGCACHE_RBTREE,
1486 static int lm49453_i2c_probe(struct i2c_client *i2c,
1487 const struct i2c_device_id *id)
1489 struct lm49453_priv *lm49453;
1492 lm49453 = devm_kzalloc(&i2c->dev, sizeof(struct lm49453_priv),
1495 if (lm49453 == NULL)
1498 i2c_set_clientdata(i2c, lm49453);
1500 lm49453->regmap = devm_regmap_init_i2c(i2c, &lm49453_regmap_config);
1501 if (IS_ERR(lm49453->regmap)) {
1502 ret = PTR_ERR(lm49453->regmap);
1503 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1508 ret = snd_soc_register_codec(&i2c->dev,
1509 &soc_codec_dev_lm49453,
1510 lm49453_dai, ARRAY_SIZE(lm49453_dai));
1512 dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
1517 static int lm49453_i2c_remove(struct i2c_client *client)
1519 snd_soc_unregister_codec(&client->dev);
1523 static const struct i2c_device_id lm49453_i2c_id[] = {
1527 MODULE_DEVICE_TABLE(i2c, lm49453_i2c_id);
1529 static struct i2c_driver lm49453_i2c_driver = {
1532 .owner = THIS_MODULE,
1534 .probe = lm49453_i2c_probe,
1535 .remove = lm49453_i2c_remove,
1536 .id_table = lm49453_i2c_id,
1539 module_i2c_driver(lm49453_i2c_driver);
1541 MODULE_DESCRIPTION("ASoC LM49453 driver");
1542 MODULE_AUTHOR("M R Swami Reddy <MR.Swami.Reddy@ti.com>");
1543 MODULE_LICENSE("GPL v2");