sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *
  10  *  Authors:
  11  *                      Wu Fengguang <wfg@linux.intel.com>
  12  *
  13  *  Maintained by:
  14  *                      Wu Fengguang <wfg@linux.intel.com>
  15  *
  16  *  This program is free software; you can redistribute it and/or modify it
  17  *  under the terms of the GNU General Public License as published by the Free
  18  *  Software Foundation; either version 2 of the License, or (at your option)
  19  *  any later version.
  20  *
  21  *  This program is distributed in the hope that it will be useful, but
  22  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  24  *  for more details.
  25  *
  26  *  You should have received a copy of the GNU General Public License
  27  *  along with this program; if not, write to the Free Software Foundation,
  28  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/delay.h>
  33 #include <linux/slab.h>
  34 #include <linux/module.h>
  35 #include <sound/core.h>
  36 #include <sound/jack.h>
  37 #include <sound/asoundef.h>
  38 #include <sound/tlv.h>
  39 #include "hda_codec.h"
  40 #include "hda_local.h"
  41 #include "hda_jack.h"
  42
  43 static bool static_hdmi_pcm;
  44 module_param(static_hdmi_pcm, bool, 0644);
  45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  46
  47 struct hdmi_spec_per_cvt {
  48         hda_nid_t cvt_nid;
  49         int assigned;
  50         unsigned int channels_min;
  51         unsigned int channels_max;
  52         u32 rates;
  53         u64 formats;
  54         unsigned int maxbps;
  55 };
  56
  57 /* max. connections to a widget */
  58 #define HDA_MAX_CONNECTIONS     32
  59
  60 struct hdmi_spec_per_pin {
  61         hda_nid_t pin_nid;
  62         int num_mux_nids;
  63         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  64
  65         struct hda_codec *codec;
  66         struct hdmi_eld sink_eld;
  67         struct delayed_work work;
  68         struct snd_kcontrol *eld_ctl;
  69         int repoll_count;
  70         bool setup; /* the stream has been set up by prepare callback */
  71         int channels; /* current number of channels */
  72         bool non_pcm;
  73         bool chmap_set;         /* channel-map override by ALSA API? */
  74         unsigned char chmap[8]; /* ALSA API channel-map */
  75         char pcm_name[8];       /* filled in build_pcm callbacks */
  76 };
  77
  78 struct hdmi_spec {
  79         int num_cvts;
  80         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  81         hda_nid_t cvt_nids[4]; /* only for haswell fix */
  82
  83         int num_pins;
  84         struct snd_array pins; /* struct hdmi_spec_per_pin */
  85         struct snd_array pcm_rec; /* struct hda_pcm */
  86         unsigned int channels_max; /* max over all cvts */
  87
  88         struct hdmi_eld temp_eld;
  89         /*
  90          * Non-generic ATI/NVIDIA specific
  91          */
  92         struct hda_multi_out multiout;
  93         struct hda_pcm_stream pcm_playback;
  94 };
  95
  96
  97 struct hdmi_audio_infoframe {
  98         u8 type; /* 0x84 */
  99         u8 ver;  /* 0x01 */
 100         u8 len;  /* 0x0a */
 101
 102         u8 checksum;
 103
 104         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 105         u8 SS01_SF24;
 106         u8 CXT04;
 107         u8 CA;
 108         u8 LFEPBL01_LSV36_DM_INH7;
 109 };
 110
 111 struct dp_audio_infoframe {
 112         u8 type; /* 0x84 */
 113         u8 len;  /* 0x1b */
 114         u8 ver;  /* 0x11 << 2 */
 115
 116         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 117         u8 SS01_SF24;
 118         u8 CXT04;
 119         u8 CA;
 120         u8 LFEPBL01_LSV36_DM_INH7;
 121 };
 122
 123 union audio_infoframe {
 124         struct hdmi_audio_infoframe hdmi;
 125         struct dp_audio_infoframe dp;
 126         u8 bytes[0];
 127 };
 128
 129 /*
 130  * CEA speaker placement:
 131  *
 132  *        FLH       FCH        FRH
 133  *  FLW    FL  FLC   FC   FRC   FR   FRW
 134  *
 135  *                                  LFE
 136  *                     TC
 137  *
 138  *          RL  RLC   RC   RRC   RR
 139  *
 140  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 141  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 142  */
 143 enum cea_speaker_placement {
 144         FL  = (1 <<  0),        /* Front Left           */
 145         FC  = (1 <<  1),        /* Front Center         */
 146         FR  = (1 <<  2),        /* Front Right          */
 147         FLC = (1 <<  3),        /* Front Left Center    */
 148         FRC = (1 <<  4),        /* Front Right Center   */
 149         RL  = (1 <<  5),        /* Rear Left            */
 150         RC  = (1 <<  6),        /* Rear Center          */
 151         RR  = (1 <<  7),        /* Rear Right           */
 152         RLC = (1 <<  8),        /* Rear Left Center     */
 153         RRC = (1 <<  9),        /* Rear Right Center    */
 154         LFE = (1 << 10),        /* Low Frequency Effect */
 155         FLW = (1 << 11),        /* Front Left Wide      */
 156         FRW = (1 << 12),        /* Front Right Wide     */
 157         FLH = (1 << 13),        /* Front Left High      */
 158         FCH = (1 << 14),        /* Front Center High    */
 159         FRH = (1 << 15),        /* Front Right High     */
 160         TC  = (1 << 16),        /* Top Center           */
 161 };
 162
 163 /*
 164  * ELD SA bits in the CEA Speaker Allocation data block
 165  */
 166 static int eld_speaker_allocation_bits[] = {
 167         [0] = FL | FR,
 168         [1] = LFE,
 169         [2] = FC,
 170         [3] = RL | RR,
 171         [4] = RC,
 172         [5] = FLC | FRC,
 173         [6] = RLC | RRC,
 174         /* the following are not defined in ELD yet */
 175         [7] = FLW | FRW,
 176         [8] = FLH | FRH,
 177         [9] = TC,
 178         [10] = FCH,
 179 };
 180
 181 struct cea_channel_speaker_allocation {
 182         int ca_index;
 183         int speakers[8];
 184
 185         /* derived values, just for convenience */
 186         int channels;
 187         int spk_mask;
 188 };
 189
 190 /*
 191  * ALSA sequence is:
 192  *
 193  *       surround40   surround41   surround50   surround51   surround71
 194  * ch0   front left   =            =            =            =
 195  * ch1   front right  =            =            =            =
 196  * ch2   rear left    =            =            =            =
 197  * ch3   rear right   =            =            =            =
 198  * ch4                LFE          center       center       center
 199  * ch5                                          LFE          LFE
 200  * ch6                                                       side left
 201  * ch7                                                       side right
 202  *
 203  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 204  */
 205 static int hdmi_channel_mapping[0x32][8] = {
 206         /* stereo */
 207         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 208         /* 2.1 */
 209         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
 210         /* Dolby Surround */
 211         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
 212         /* surround40 */
 213         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
 214         /* 4ch */
 215         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
 216         /* surround41 */
 217         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
 218         /* surround50 */
 219         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
 220         /* surround51 */
 221         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
 222         /* 7.1 */
 223         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
 224 };
 225
 226 /*
 227  * This is an ordered list!
 228  *
 229  * The preceding ones have better chances to be selected by
 230  * hdmi_channel_allocation().
 231  */
 232 static struct cea_channel_speaker_allocation channel_allocations[] = {
 233 /*                        channel:   7     6    5    4    3     2    1    0  */
 234 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
 235                                  /* 2.1 */
 236 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
 237                                  /* Dolby Surround */
 238 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
 239                                  /* surround40 */
 240 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
 241                                  /* surround41 */
 242 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
 243                                  /* surround50 */
 244 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 245                                  /* surround51 */
 246 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 247                                  /* 6.1 */
 248 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 249                                  /* surround71 */
 250 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 251
 252 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
 253 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
 254 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
 255 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
 256 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
 257 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
 258 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
 259 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 260 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
 261 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 262 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
 263 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
 264 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
 265 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
 266 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
 267 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
 268 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
 269 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
 270 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
 271 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
 272 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
 273 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
 274 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 275 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 276 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 277 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
 278 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
 279 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
 280 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
 281 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
 282 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
 283 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 284 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 285 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
 286 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
 287 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
 288 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 289 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
 290 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
 291 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
 292 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
 293 };
 294
 295
 296 /*
 297  * HDMI routines
 298  */
 299
 300 #define get_pin(spec, idx) \
 301         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 302 #define get_cvt(spec, idx) \
 303         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 304 #define get_pcm_rec(spec, idx) \
 305         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
 306
 307 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
 308 {
 309         int pin_idx;
 310
 311         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 312                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 313                         return pin_idx;
 314
 315         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
 316         return -EINVAL;
 317 }
 318
 319 static int hinfo_to_pin_index(struct hdmi_spec *spec,
 320                               struct hda_pcm_stream *hinfo)
 321 {
 322         int pin_idx;
 323
 324         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 325                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
 326                         return pin_idx;
 327
 328         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
 329         return -EINVAL;
 330 }
 331
 332 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
 333 {
 334         int cvt_idx;
 335
 336         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 337                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 338                         return cvt_idx;
 339
 340         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
 341         return -EINVAL;
 342 }
 343
 344 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 345                         struct snd_ctl_elem_info *uinfo)
 346 {
 347         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 348         struct hdmi_spec *spec = codec->spec;
 349         struct hdmi_eld *eld;
 350         int pin_idx;
 351
 352         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 353
 354         pin_idx = kcontrol->private_value;
 355         eld = &get_pin(spec, pin_idx)->sink_eld;
 356
 357         mutex_lock(&eld->lock);
 358         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 359         mutex_unlock(&eld->lock);
 360
 361         return 0;
 362 }
 363
 364 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 365                         struct snd_ctl_elem_value *ucontrol)
 366 {
 367         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 368         struct hdmi_spec *spec = codec->spec;
 369         struct hdmi_eld *eld;
 370         int pin_idx;
 371
 372         pin_idx = kcontrol->private_value;
 373         eld = &get_pin(spec, pin_idx)->sink_eld;
 374
 375         mutex_lock(&eld->lock);
 376         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
 377                 mutex_unlock(&eld->lock);
 378                 snd_BUG();
 379                 return -EINVAL;
 380         }
 381
 382         memset(ucontrol->value.bytes.data, 0,
 383                ARRAY_SIZE(ucontrol->value.bytes.data));
 384         if (eld->eld_valid)
 385                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 386                        eld->eld_size);
 387         mutex_unlock(&eld->lock);
 388
 389         return 0;
 390 }
 391
 392 static struct snd_kcontrol_new eld_bytes_ctl = {
 393         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 394         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 395         .name = "ELD",
 396         .info = hdmi_eld_ctl_info,
 397         .get = hdmi_eld_ctl_get,
 398 };
 399
 400 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
 401                         int device)
 402 {
 403         struct snd_kcontrol *kctl;
 404         struct hdmi_spec *spec = codec->spec;
 405         int err;
 406
 407         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 408         if (!kctl)
 409                 return -ENOMEM;
 410         kctl->private_value = pin_idx;
 411         kctl->id.device = device;
 412
 413         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
 414         if (err < 0)
 415                 return err;
 416
 417         get_pin(spec, pin_idx)->eld_ctl = kctl;
 418         return 0;
 419 }
 420
 421 #ifdef BE_PARANOID
 422 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 423                                 int *packet_index, int *byte_index)
 424 {
 425         int val;
 426
 427         val = snd_hda_codec_read(codec, pin_nid, 0,
 428                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 429
 430         *packet_index = val >> 5;
 431         *byte_index = val & 0x1f;
 432 }
 433 #endif
 434
 435 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 436                                 int packet_index, int byte_index)
 437 {
 438         int val;
 439
 440         val = (packet_index << 5) | (byte_index & 0x1f);
 441
 442         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 443 }
 444
 445 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 446                                 unsigned char val)
 447 {
 448         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 449 }
 450
 451 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 452 {
 453         /* Unmute */
 454         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 455                 snd_hda_codec_write(codec, pin_nid, 0,
 456                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 457         /* Enable pin out: some machines with GM965 gets broken output when
 458          * the pin is disabled or changed while using with HDMI
 459          */
 460         snd_hda_codec_write(codec, pin_nid, 0,
 461                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
 462 }
 463
 464 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
 465 {
 466         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
 467                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
 468 }
 469
 470 static void hdmi_set_channel_count(struct hda_codec *codec,
 471                                    hda_nid_t cvt_nid, int chs)
 472 {
 473         if (chs != hdmi_get_channel_count(codec, cvt_nid))
 474                 snd_hda_codec_write(codec, cvt_nid, 0,
 475                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
 476 }
 477
 478
 479 /*
 480  * Channel mapping routines
 481  */
 482
 483 /*
 484  * Compute derived values in channel_allocations[].
 485  */
 486 static void init_channel_allocations(void)
 487 {
 488         int i, j;
 489         struct cea_channel_speaker_allocation *p;
 490
 491         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 492                 p = channel_allocations + i;
 493                 p->channels = 0;
 494                 p->spk_mask = 0;
 495                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
 496                         if (p->speakers[j]) {
 497                                 p->channels++;
 498                                 p->spk_mask |= p->speakers[j];
 499                         }
 500         }
 501 }
 502
 503 static int get_channel_allocation_order(int ca)
 504 {
 505         int i;
 506
 507         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 508                 if (channel_allocations[i].ca_index == ca)
 509                         break;
 510         }
 511         return i;
 512 }
 513
 514 /*
 515  * The transformation takes two steps:
 516  *
 517  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 518  *            spk_mask => (channel_allocations[])         => ai->CA
 519  *
 520  * TODO: it could select the wrong CA from multiple candidates.
 521 */
 522 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
 523 {
 524         int i;
 525         int ca = 0;
 526         int spk_mask = 0;
 527         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
 528
 529         /*
 530          * CA defaults to 0 for basic stereo audio
 531          */
 532         if (channels <= 2)
 533                 return 0;
 534
 535         /*
 536          * expand ELD's speaker allocation mask
 537          *
 538          * ELD tells the speaker mask in a compact(paired) form,
 539          * expand ELD's notions to match the ones used by Audio InfoFrame.
 540          */
 541         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
 542                 if (eld->info.spk_alloc & (1 << i))
 543                         spk_mask |= eld_speaker_allocation_bits[i];
 544         }
 545
 546         /* search for the first working match in the CA table */
 547         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 548                 if (channels == channel_allocations[i].channels &&
 549                     (spk_mask & channel_allocations[i].spk_mask) ==
 550                                 channel_allocations[i].spk_mask) {
 551                         ca = channel_allocations[i].ca_index;
 552                         break;
 553                 }
 554         }
 555
 556         if (!ca) {
 557                 /* if there was no match, select the regular ALSA channel
 558                  * allocation with the matching number of channels */
 559                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 560                         if (channels == channel_allocations[i].channels) {
 561                                 ca = channel_allocations[i].ca_index;
 562                                 break;
 563                         }
 564                 }
 565         }
 566
 567         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
 568         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
 569                     ca, channels, buf);
 570
 571         return ca;
 572 }
 573
 574 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
 575                                        hda_nid_t pin_nid)
 576 {
 577 #ifdef CONFIG_SND_DEBUG_VERBOSE
 578         int i;
 579         int slot;
 580
 581         for (i = 0; i < 8; i++) {
 582                 slot = snd_hda_codec_read(codec, pin_nid, 0,
 583                                                 AC_VERB_GET_HDMI_CHAN_SLOT, i);
 584                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
 585                                                 slot >> 4, slot & 0xf);
 586         }
 587 #endif
 588 }
 589
 590
 591 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
 592                                        hda_nid_t pin_nid,
 593                                        bool non_pcm,
 594                                        int ca)
 595 {
 596         int i;
 597         int err;
 598         int order;
 599         int non_pcm_mapping[8];
 600
 601         order = get_channel_allocation_order(ca);
 602
 603         if (hdmi_channel_mapping[ca][1] == 0) {
 604                 for (i = 0; i < channel_allocations[order].channels; i++)
 605                         hdmi_channel_mapping[ca][i] = i | (i << 4);
 606                 for (; i < 8; i++)
 607                         hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
 608         }
 609
 610         if (non_pcm) {
 611                 for (i = 0; i < channel_allocations[order].channels; i++)
 612                         non_pcm_mapping[i] = i | (i << 4);
 613                 for (; i < 8; i++)
 614                         non_pcm_mapping[i] = 0xf | (i << 4);
 615         }
 616
 617         for (i = 0; i < 8; i++) {
 618                 err = snd_hda_codec_write(codec, pin_nid, 0,
 619                                           AC_VERB_SET_HDMI_CHAN_SLOT,
 620                                           non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
 621                 if (err) {
 622                         snd_printdd(KERN_NOTICE
 623                                     "HDMI: channel mapping failed\n");
 624                         break;
 625                 }
 626         }
 627
 628         hdmi_debug_channel_mapping(codec, pin_nid);
 629 }
 630
 631 struct channel_map_table {
 632         unsigned char map;              /* ALSA API channel map position */
 633         unsigned char cea_slot;         /* CEA slot value */
 634         int spk_mask;                   /* speaker position bit mask */
 635 };
 636
 637 static struct channel_map_table map_tables[] = {
 638         { SNDRV_CHMAP_FL,       0x00,   FL },
 639         { SNDRV_CHMAP_FR,       0x01,   FR },
 640         { SNDRV_CHMAP_RL,       0x04,   RL },
 641         { SNDRV_CHMAP_RR,       0x05,   RR },
 642         { SNDRV_CHMAP_LFE,      0x02,   LFE },
 643         { SNDRV_CHMAP_FC,       0x03,   FC },
 644         { SNDRV_CHMAP_RLC,      0x06,   RLC },
 645         { SNDRV_CHMAP_RRC,      0x07,   RRC },
 646         {} /* terminator */
 647 };
 648
 649 /* from ALSA API channel position to speaker bit mask */
 650 static int to_spk_mask(unsigned char c)
 651 {
 652         struct channel_map_table *t = map_tables;
 653         for (; t->map; t++) {
 654                 if (t->map == c)
 655                         return t->spk_mask;
 656         }
 657         return 0;
 658 }
 659
 660 /* from ALSA API channel position to CEA slot */
 661 static int to_cea_slot(unsigned char c)
 662 {
 663         struct channel_map_table *t = map_tables;
 664         for (; t->map; t++) {
 665                 if (t->map == c)
 666                         return t->cea_slot;
 667         }
 668         return 0x0f;
 669 }
 670
 671 /* from CEA slot to ALSA API channel position */
 672 static int from_cea_slot(unsigned char c)
 673 {
 674         struct channel_map_table *t = map_tables;
 675         for (; t->map; t++) {
 676                 if (t->cea_slot == c)
 677                         return t->map;
 678         }
 679         return 0;
 680 }
 681
 682 /* from speaker bit mask to ALSA API channel position */
 683 static int spk_to_chmap(int spk)
 684 {
 685         struct channel_map_table *t = map_tables;
 686         for (; t->map; t++) {
 687                 if (t->spk_mask == spk)
 688                         return t->map;
 689         }
 690         return 0;
 691 }
 692
 693 /* get the CA index corresponding to the given ALSA API channel map */
 694 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
 695 {
 696         int i, spks = 0, spk_mask = 0;
 697
 698         for (i = 0; i < chs; i++) {
 699                 int mask = to_spk_mask(map[i]);
 700                 if (mask) {
 701                         spk_mask |= mask;
 702                         spks++;
 703                 }
 704         }
 705
 706         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
 707                 if ((chs == channel_allocations[i].channels ||
 708                      spks == channel_allocations[i].channels) &&
 709                     (spk_mask & channel_allocations[i].spk_mask) ==
 710                                 channel_allocations[i].spk_mask)
 711                         return channel_allocations[i].ca_index;
 712         }
 713         return -1;
 714 }
 715
 716 /* set up the channel slots for the given ALSA API channel map */
 717 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
 718                                              hda_nid_t pin_nid,
 719                                              int chs, unsigned char *map)
 720 {
 721         int i;
 722         for (i = 0; i < 8; i++) {
 723                 int val, err;
 724                 if (i < chs)
 725                         val = to_cea_slot(map[i]);
 726                 else
 727                         val = 0xf;
 728                 val |= (i << 4);
 729                 err = snd_hda_codec_write(codec, pin_nid, 0,
 730                                           AC_VERB_SET_HDMI_CHAN_SLOT, val);
 731                 if (err)
 732                         return -EINVAL;
 733         }
 734         return 0;
 735 }
 736
 737 /* store ALSA API channel map from the current default map */
 738 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
 739 {
 740         int i;
 741         int ordered_ca = get_channel_allocation_order(ca);
 742         for (i = 0; i < 8; i++) {
 743                 if (i < channel_allocations[ordered_ca].channels)
 744                         map[i] = from_cea_slot(hdmi_channel_mapping[ca][i] & 0x0f);
 745                 else
 746                         map[i] = 0;
 747         }
 748 }
 749
 750 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
 751                                        hda_nid_t pin_nid, bool non_pcm, int ca,
 752                                        int channels, unsigned char *map,
 753                                        bool chmap_set)
 754 {
 755         if (!non_pcm && chmap_set) {
 756                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
 757                                                   channels, map);
 758         } else {
 759                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
 760                 hdmi_setup_fake_chmap(map, ca);
 761         }
 762 }
 763
 764 /*
 765  * Audio InfoFrame routines
 766  */
 767
 768 /*
 769  * Enable Audio InfoFrame Transmission
 770  */
 771 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 772                                        hda_nid_t pin_nid)
 773 {
 774         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 775         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 776                                                 AC_DIPXMIT_BEST);
 777 }
 778
 779 /*
 780  * Disable Audio InfoFrame Transmission
 781  */
 782 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 783                                       hda_nid_t pin_nid)
 784 {
 785         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 786         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 787                                                 AC_DIPXMIT_DISABLE);
 788 }
 789
 790 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 791 {
 792 #ifdef CONFIG_SND_DEBUG_VERBOSE
 793         int i;
 794         int size;
 795
 796         size = snd_hdmi_get_eld_size(codec, pin_nid);
 797         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
 798
 799         for (i = 0; i < 8; i++) {
 800                 size = snd_hda_codec_read(codec, pin_nid, 0,
 801                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 802                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 803         }
 804 #endif
 805 }
 806
 807 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 808 {
 809 #ifdef BE_PARANOID
 810         int i, j;
 811         int size;
 812         int pi, bi;
 813         for (i = 0; i < 8; i++) {
 814                 size = snd_hda_codec_read(codec, pin_nid, 0,
 815                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 816                 if (size == 0)
 817                         continue;
 818
 819                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 820                 for (j = 1; j < 1000; j++) {
 821                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 822                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 823                         if (pi != i)
 824                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
 825                                                 bi, pi, i);
 826                         if (bi == 0) /* byte index wrapped around */
 827                                 break;
 828                 }
 829                 snd_printd(KERN_INFO
 830                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 831                         i, size, j);
 832         }
 833 #endif
 834 }
 835
 836 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 837 {
 838         u8 *bytes = (u8 *)hdmi_ai;
 839         u8 sum = 0;
 840         int i;
 841
 842         hdmi_ai->checksum = 0;
 843
 844         for (i = 0; i < sizeof(*hdmi_ai); i++)
 845                 sum += bytes[i];
 846
 847         hdmi_ai->checksum = -sum;
 848 }
 849
 850 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 851                                       hda_nid_t pin_nid,
 852                                       u8 *dip, int size)
 853 {
 854         int i;
 855
 856         hdmi_debug_dip_size(codec, pin_nid);
 857         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 858
 859         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 860         for (i = 0; i < size; i++)
 861                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 862 }
 863
 864 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 865                                     u8 *dip, int size)
 866 {
 867         u8 val;
 868         int i;
 869
 870         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 871                                                             != AC_DIPXMIT_BEST)
 872                 return false;
 873
 874         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 875         for (i = 0; i < size; i++) {
 876                 val = snd_hda_codec_read(codec, pin_nid, 0,
 877                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 878                 if (val != dip[i])
 879                         return false;
 880         }
 881
 882         return true;
 883 }
 884
 885 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 886                                        struct hdmi_spec_per_pin *per_pin,
 887                                        bool non_pcm)
 888 {
 889         hda_nid_t pin_nid = per_pin->pin_nid;
 890         int channels = per_pin->channels;
 891         struct hdmi_eld *eld;
 892         int ca;
 893         union audio_infoframe ai;
 894
 895         if (!channels)
 896                 return;
 897
 898         eld = &per_pin->sink_eld;
 899         if (!eld->monitor_present)
 900                 return;
 901
 902         if (!non_pcm && per_pin->chmap_set)
 903                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
 904         else
 905                 ca = hdmi_channel_allocation(eld, channels);
 906         if (ca < 0)
 907                 ca = 0;
 908
 909         memset(&ai, 0, sizeof(ai));
 910         if (eld->info.conn_type == 0) { /* HDMI */
 911                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 912
 913                 hdmi_ai->type           = 0x84;
 914                 hdmi_ai->ver            = 0x01;
 915                 hdmi_ai->len            = 0x0a;
 916                 hdmi_ai->CC02_CT47      = channels - 1;
 917                 hdmi_ai->CA             = ca;
 918                 hdmi_checksum_audio_infoframe(hdmi_ai);
 919         } else if (eld->info.conn_type == 1) { /* DisplayPort */
 920                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 921
 922                 dp_ai->type             = 0x84;
 923                 dp_ai->len              = 0x1b;
 924                 dp_ai->ver              = 0x11 << 2;
 925                 dp_ai->CC02_CT47        = channels - 1;
 926                 dp_ai->CA               = ca;
 927         } else {
 928                 snd_printd("HDMI: unknown connection type at pin %d\n",
 929                             pin_nid);
 930                 return;
 931         }
 932
 933         /*
 934          * always configure channel mapping, it may have been changed by the
 935          * user in the meantime
 936          */
 937         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
 938                                    channels, per_pin->chmap,
 939                                    per_pin->chmap_set);
 940
 941         /*
 942          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 943          * sizeof(*dp_ai) to avoid partial match/update problems when
 944          * the user switches between HDMI/DP monitors.
 945          */
 946         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 947                                         sizeof(ai))) {
 948                 snd_printdd("hdmi_setup_audio_infoframe: "
 949                             "pin=%d channels=%d\n",
 950                             pin_nid,
 951                             channels);
 952                 hdmi_stop_infoframe_trans(codec, pin_nid);
 953                 hdmi_fill_audio_infoframe(codec, pin_nid,
 954                                             ai.bytes, sizeof(ai));
 955                 hdmi_start_infoframe_trans(codec, pin_nid);
 956         }
 957
 958         per_pin->non_pcm = non_pcm;
 959 }
 960
 961
 962 /*
 963  * Unsolicited events
 964  */
 965
 966 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 967
 968 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 969 {
 970         struct hdmi_spec *spec = codec->spec;
 971         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 972         int pin_nid;
 973         int pin_idx;
 974         struct hda_jack_tbl *jack;
 975
 976         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 977         if (!jack)
 978                 return;
 979         pin_nid = jack->nid;
 980         jack->jack_dirty = 1;
 981
 982         _snd_printd(SND_PR_VERBOSE,
 983                 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
 984                 codec->addr, pin_nid,
 985                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 986
 987         pin_idx = pin_nid_to_pin_index(spec, pin_nid);
 988         if (pin_idx < 0)
 989                 return;
 990
 991         hdmi_present_sense(get_pin(spec, pin_idx), 1);
 992         snd_hda_jack_report_sync(codec);
 993 }
 994
 995 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 996 {
 997         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 998         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 999         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1000         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1001
1002         printk(KERN_INFO
1003                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1004                 codec->addr,
1005                 tag,
1006                 subtag,
1007                 cp_state,
1008                 cp_ready);
1009
1010         /* TODO */
1011         if (cp_state)
1012                 ;
1013         if (cp_ready)
1014                 ;
1015 }
1016
1017
1018 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1019 {
1020         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1021         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1022
1023         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1024                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1025                 return;
1026         }
1027
1028         if (subtag == 0)
1029                 hdmi_intrinsic_event(codec, res);
1030         else
1031                 hdmi_non_intrinsic_event(codec, res);
1032 }
1033
1034 static void haswell_verify_pin_D0(struct hda_codec *codec, hda_nid_t nid)
1035 {
1036         int pwr, lamp, ramp;
1037
1038         pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1039         pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1040         if (pwr != AC_PWRST_D0) {
1041                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1042                                     AC_PWRST_D0);
1043                 msleep(40);
1044                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1045                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1046                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1047         }
1048
1049         lamp = snd_hda_codec_read(codec, nid, 0,
1050                                   AC_VERB_GET_AMP_GAIN_MUTE,
1051                                   AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1052         ramp = snd_hda_codec_read(codec, nid, 0,
1053                                   AC_VERB_GET_AMP_GAIN_MUTE,
1054                                   AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1055         if (lamp != ramp) {
1056                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1057                                     AC_AMP_SET_RIGHT | AC_AMP_SET_OUTPUT | lamp);
1058
1059                 lamp = snd_hda_codec_read(codec, nid, 0,
1060                                   AC_VERB_GET_AMP_GAIN_MUTE,
1061                                   AC_AMP_GET_LEFT | AC_AMP_GET_OUTPUT);
1062                 ramp = snd_hda_codec_read(codec, nid, 0,
1063                                   AC_VERB_GET_AMP_GAIN_MUTE,
1064                                   AC_AMP_GET_RIGHT | AC_AMP_GET_OUTPUT);
1065                 snd_printd("Haswell HDMI audio: Mute after set on pin 0x%x: [0x%x 0x%x]\n", nid, lamp, ramp);
1066         }
1067 }
1068
1069 /*
1070  * Callbacks
1071  */
1072
1073 /* HBR should be Non-PCM, 8 channels */
1074 #define is_hbr_format(format) \
1075         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1076
1077 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1078                               hda_nid_t pin_nid, u32 stream_tag, int format)
1079 {
1080         int pinctl;
1081         int new_pinctl = 0;
1082
1083         if (codec->vendor_id == 0x80862807)
1084                 haswell_verify_pin_D0(codec, pin_nid);
1085
1086         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1087                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1088                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1089
1090                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1091                 if (is_hbr_format(format))
1092                         new_pinctl |= AC_PINCTL_EPT_HBR;
1093                 else
1094                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1095
1096                 snd_printdd("hdmi_setup_stream: "
1097                             "NID=0x%x, %spinctl=0x%x\n",
1098                             pin_nid,
1099                             pinctl == new_pinctl ? "" : "new-",
1100                             new_pinctl);
1101
1102                 if (pinctl != new_pinctl)
1103                         snd_hda_codec_write(codec, pin_nid, 0,
1104                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1105                                             new_pinctl);
1106
1107         }
1108         if (is_hbr_format(format) && !new_pinctl) {
1109                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1110                 return -EINVAL;
1111         }
1112
1113         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1114         return 0;
1115 }
1116
1117 /*
1118  * HDA PCM callbacks
1119  */
1120 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1121                          struct hda_codec *codec,
1122                          struct snd_pcm_substream *substream)
1123 {
1124         struct hdmi_spec *spec = codec->spec;
1125         struct snd_pcm_runtime *runtime = substream->runtime;
1126         int pin_idx, cvt_idx, mux_idx = 0;
1127         struct hdmi_spec_per_pin *per_pin;
1128         struct hdmi_eld *eld;
1129         struct hdmi_spec_per_cvt *per_cvt = NULL;
1130
1131         /* Validate hinfo */
1132         pin_idx = hinfo_to_pin_index(spec, hinfo);
1133         if (snd_BUG_ON(pin_idx < 0))
1134                 return -EINVAL;
1135         per_pin = get_pin(spec, pin_idx);
1136         eld = &per_pin->sink_eld;
1137
1138         /* Dynamically assign converter to stream */
1139         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1140                 per_cvt = get_cvt(spec, cvt_idx);
1141
1142                 /* Must not already be assigned */
1143                 if (per_cvt->assigned)
1144                         continue;
1145                 /* Must be in pin's mux's list of converters */
1146                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1147                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1148                                 break;
1149                 /* Not in mux list */
1150                 if (mux_idx == per_pin->num_mux_nids)
1151                         continue;
1152                 break;
1153         }
1154         /* No free converters */
1155         if (cvt_idx == spec->num_cvts)
1156                 return -ENODEV;
1157
1158         /* Claim converter */
1159         per_cvt->assigned = 1;
1160         hinfo->nid = per_cvt->cvt_nid;
1161
1162         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1163                             AC_VERB_SET_CONNECT_SEL,
1164                             mux_idx);
1165         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1166
1167         /* Initially set the converter's capabilities */
1168         hinfo->channels_min = per_cvt->channels_min;
1169         hinfo->channels_max = per_cvt->channels_max;
1170         hinfo->rates = per_cvt->rates;
1171         hinfo->formats = per_cvt->formats;
1172         hinfo->maxbps = per_cvt->maxbps;
1173
1174         /* Restrict capabilities by ELD if this isn't disabled */
1175         if (!static_hdmi_pcm && eld->eld_valid) {
1176                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1177                 if (hinfo->channels_min > hinfo->channels_max ||
1178                     !hinfo->rates || !hinfo->formats) {
1179                         per_cvt->assigned = 0;
1180                         hinfo->nid = 0;
1181                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1182                         return -ENODEV;
1183                 }
1184         }
1185
1186         /* Store the updated parameters */
1187         runtime->hw.channels_min = hinfo->channels_min;
1188         runtime->hw.channels_max = hinfo->channels_max;
1189         runtime->hw.formats = hinfo->formats;
1190         runtime->hw.rates = hinfo->rates;
1191
1192         snd_pcm_hw_constraint_step(substream->runtime, 0,
1193                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1194         return 0;
1195 }
1196
1197 /*
1198  * HDA/HDMI auto parsing
1199  */
1200 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1201 {
1202         struct hdmi_spec *spec = codec->spec;
1203         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1204         hda_nid_t pin_nid = per_pin->pin_nid;
1205
1206         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1207                 snd_printk(KERN_WARNING
1208                            "HDMI: pin %d wcaps %#x "
1209                            "does not support connection list\n",
1210                            pin_nid, get_wcaps(codec, pin_nid));
1211                 return -EINVAL;
1212         }
1213
1214         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1215                                                         per_pin->mux_nids,
1216                                                         HDA_MAX_CONNECTIONS);
1217
1218         return 0;
1219 }
1220
1221 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1222 {
1223         struct hda_codec *codec = per_pin->codec;
1224         struct hdmi_spec *spec = codec->spec;
1225         struct hdmi_eld *eld = &spec->temp_eld;
1226         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1227         hda_nid_t pin_nid = per_pin->pin_nid;
1228         /*
1229          * Always execute a GetPinSense verb here, even when called from
1230          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1231          * response's PD bit is not the real PD value, but indicates that
1232          * the real PD value changed. An older version of the HD-audio
1233          * specification worked this way. Hence, we just ignore the data in
1234          * the unsolicited response to avoid custom WARs.
1235          */
1236         int present = snd_hda_pin_sense(codec, pin_nid);
1237         bool update_eld = false;
1238         bool eld_changed = false;
1239
1240         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1241         if (pin_eld->monitor_present)
1242                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1243         else
1244                 eld->eld_valid = false;
1245
1246         _snd_printd(SND_PR_VERBOSE,
1247                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1248                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1249
1250         if (eld->eld_valid) {
1251                 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1252                                                      &eld->eld_size) < 0)
1253                         eld->eld_valid = false;
1254                 else {
1255                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1256                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1257                                                     eld->eld_size) < 0)
1258                                 eld->eld_valid = false;
1259                 }
1260
1261                 if (eld->eld_valid) {
1262                         snd_hdmi_show_eld(&eld->info);
1263                         update_eld = true;
1264                 }
1265                 else if (repoll) {
1266                         queue_delayed_work(codec->bus->workq,
1267                                            &per_pin->work,
1268                                            msecs_to_jiffies(300));
1269                         return;
1270                 }
1271         }
1272
1273         mutex_lock(&pin_eld->lock);
1274         if (pin_eld->eld_valid && !eld->eld_valid) {
1275                 update_eld = true;
1276                 eld_changed = true;
1277         }
1278         if (update_eld) {
1279                 bool old_eld_valid = pin_eld->eld_valid;
1280                 pin_eld->eld_valid = eld->eld_valid;
1281                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1282                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1283                                      eld->eld_size) != 0;
1284                 if (eld_changed)
1285                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1286                                eld->eld_size);
1287                 pin_eld->eld_size = eld->eld_size;
1288                 pin_eld->info = eld->info;
1289
1290                 /* Haswell-specific workaround: re-setup when the transcoder is
1291                  * changed during the stream playback
1292                  */
1293                 if (codec->vendor_id == 0x80862807 &&
1294                     eld->eld_valid && !old_eld_valid && per_pin->setup) {
1295                         snd_hda_codec_write(codec, pin_nid, 0,
1296                                             AC_VERB_SET_AMP_GAIN_MUTE,
1297                                             AMP_OUT_UNMUTE);
1298                         hdmi_setup_audio_infoframe(codec, per_pin,
1299                                                    per_pin->non_pcm);
1300                 }
1301         }
1302         mutex_unlock(&pin_eld->lock);
1303
1304         if (eld_changed)
1305                 snd_ctl_notify(codec->bus->card,
1306                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1307                                &per_pin->eld_ctl->id);
1308 }
1309
1310 static void hdmi_repoll_eld(struct work_struct *work)
1311 {
1312         struct hdmi_spec_per_pin *per_pin =
1313         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1314
1315         if (per_pin->repoll_count++ > 6)
1316                 per_pin->repoll_count = 0;
1317
1318         hdmi_present_sense(per_pin, per_pin->repoll_count);
1319 }
1320
1321 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1322                                              hda_nid_t nid);
1323
1324 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1325 {
1326         struct hdmi_spec *spec = codec->spec;
1327         unsigned int caps, config;
1328         int pin_idx;
1329         struct hdmi_spec_per_pin *per_pin;
1330         int err;
1331
1332         caps = snd_hda_query_pin_caps(codec, pin_nid);
1333         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1334                 return 0;
1335
1336         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1337         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1338                 return 0;
1339
1340         if (codec->vendor_id == 0x80862807)
1341                 intel_haswell_fixup_connect_list(codec, pin_nid);
1342
1343         pin_idx = spec->num_pins;
1344         per_pin = snd_array_new(&spec->pins);
1345         if (!per_pin)
1346                 return -ENOMEM;
1347
1348         per_pin->pin_nid = pin_nid;
1349         per_pin->non_pcm = false;
1350
1351         err = hdmi_read_pin_conn(codec, pin_idx);
1352         if (err < 0)
1353                 return err;
1354
1355         spec->num_pins++;
1356
1357         return 0;
1358 }
1359
1360 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1361 {
1362         struct hdmi_spec *spec = codec->spec;
1363         struct hdmi_spec_per_cvt *per_cvt;
1364         unsigned int chans;
1365         int err;
1366
1367         chans = get_wcaps(codec, cvt_nid);
1368         chans = get_wcaps_channels(chans);
1369
1370         per_cvt = snd_array_new(&spec->cvts);
1371         if (!per_cvt)
1372                 return -ENOMEM;
1373
1374         per_cvt->cvt_nid = cvt_nid;
1375         per_cvt->channels_min = 2;
1376         if (chans <= 16) {
1377                 per_cvt->channels_max = chans;
1378                 if (chans > spec->channels_max)
1379                         spec->channels_max = chans;
1380         }
1381
1382         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1383                                           &per_cvt->rates,
1384                                           &per_cvt->formats,
1385                                           &per_cvt->maxbps);
1386         if (err < 0)
1387                 return err;
1388
1389         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1390                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1391         spec->num_cvts++;
1392
1393         return 0;
1394 }
1395
1396 static int hdmi_parse_codec(struct hda_codec *codec)
1397 {
1398         hda_nid_t nid;
1399         int i, nodes;
1400
1401         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1402         if (!nid || nodes < 0) {
1403                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1404                 return -EINVAL;
1405         }
1406
1407         for (i = 0; i < nodes; i++, nid++) {
1408                 unsigned int caps;
1409                 unsigned int type;
1410
1411                 caps = get_wcaps(codec, nid);
1412                 type = get_wcaps_type(caps);
1413
1414                 if (!(caps & AC_WCAP_DIGITAL))
1415                         continue;
1416
1417                 switch (type) {
1418                 case AC_WID_AUD_OUT:
1419                         hdmi_add_cvt(codec, nid);
1420                         break;
1421                 case AC_WID_PIN:
1422                         hdmi_add_pin(codec, nid);
1423                         break;
1424                 }
1425         }
1426
1427 #ifdef CONFIG_PM
1428         /* We're seeing some problems with unsolicited hot plug events on
1429          * PantherPoint after S3, if this is not enabled */
1430         if (codec->vendor_id == 0x80862806)
1431                 codec->bus->power_keep_link_on = 1;
1432         /*
1433          * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1434          * can be lost and presence sense verb will become inaccurate if the
1435          * HDA link is powered off at hot plug or hw initialization time.
1436          */
1437         else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1438               AC_PWRST_EPSS))
1439                 codec->bus->power_keep_link_on = 1;
1440 #endif
1441
1442         return 0;
1443 }
1444
1445 /*
1446  */
1447 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1448 {
1449         struct hda_spdif_out *spdif;
1450         bool non_pcm;
1451
1452         mutex_lock(&codec->spdif_mutex);
1453         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1454         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1455         mutex_unlock(&codec->spdif_mutex);
1456         return non_pcm;
1457 }
1458
1459
1460 /*
1461  * HDMI callbacks
1462  */
1463
1464 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1465                                            struct hda_codec *codec,
1466                                            unsigned int stream_tag,
1467                                            unsigned int format,
1468                                            struct snd_pcm_substream *substream)
1469 {
1470         hda_nid_t cvt_nid = hinfo->nid;
1471         struct hdmi_spec *spec = codec->spec;
1472         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1473         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1474         hda_nid_t pin_nid = per_pin->pin_nid;
1475         bool non_pcm;
1476
1477         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1478         per_pin->channels = substream->runtime->channels;
1479         per_pin->setup = true;
1480
1481         hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1482
1483         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1484
1485         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1486 }
1487
1488 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1489                                              struct hda_codec *codec,
1490                                              struct snd_pcm_substream *substream)
1491 {
1492         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1493         return 0;
1494 }
1495
1496 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1497                           struct hda_codec *codec,
1498                           struct snd_pcm_substream *substream)
1499 {
1500         struct hdmi_spec *spec = codec->spec;
1501         int cvt_idx, pin_idx;
1502         struct hdmi_spec_per_cvt *per_cvt;
1503         struct hdmi_spec_per_pin *per_pin;
1504
1505         if (hinfo->nid) {
1506                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1507                 if (snd_BUG_ON(cvt_idx < 0))
1508                         return -EINVAL;
1509                 per_cvt = get_cvt(spec, cvt_idx);
1510
1511                 snd_BUG_ON(!per_cvt->assigned);
1512                 per_cvt->assigned = 0;
1513                 hinfo->nid = 0;
1514
1515                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1516                 if (snd_BUG_ON(pin_idx < 0))
1517                         return -EINVAL;
1518                 per_pin = get_pin(spec, pin_idx);
1519
1520                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1521                 per_pin->chmap_set = false;
1522                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1523
1524                 per_pin->setup = false;
1525                 per_pin->channels = 0;
1526         }
1527
1528         return 0;
1529 }
1530
1531 static const struct hda_pcm_ops generic_ops = {
1532         .open = hdmi_pcm_open,
1533         .close = hdmi_pcm_close,
1534         .prepare = generic_hdmi_playback_pcm_prepare,
1535         .cleanup = generic_hdmi_playback_pcm_cleanup,
1536 };
1537
1538 /*
1539  * ALSA API channel-map control callbacks
1540  */
1541 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1542                                struct snd_ctl_elem_info *uinfo)
1543 {
1544         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1545         struct hda_codec *codec = info->private_data;
1546         struct hdmi_spec *spec = codec->spec;
1547         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1548         uinfo->count = spec->channels_max;
1549         uinfo->value.integer.min = 0;
1550         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1551         return 0;
1552 }
1553
1554 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1555                               unsigned int size, unsigned int __user *tlv)
1556 {
1557         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1558         struct hda_codec *codec = info->private_data;
1559         struct hdmi_spec *spec = codec->spec;
1560         const unsigned int valid_mask =
1561                 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1562         unsigned int __user *dst;
1563         int chs, count = 0;
1564
1565         if (size < 8)
1566                 return -ENOMEM;
1567         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1568                 return -EFAULT;
1569         size -= 8;
1570         dst = tlv + 2;
1571         for (chs = 2; chs <= spec->channels_max; chs++) {
1572                 int i, c;
1573                 struct cea_channel_speaker_allocation *cap;
1574                 cap = channel_allocations;
1575                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1576                         int chs_bytes = chs * 4;
1577                         if (cap->channels != chs)
1578                                 continue;
1579                         if (cap->spk_mask & ~valid_mask)
1580                                 continue;
1581                         if (size < 8)
1582                                 return -ENOMEM;
1583                         if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1584                             put_user(chs_bytes, dst + 1))
1585                                 return -EFAULT;
1586                         dst += 2;
1587                         size -= 8;
1588                         count += 8;
1589                         if (size < chs_bytes)
1590                                 return -ENOMEM;
1591                         size -= chs_bytes;
1592                         count += chs_bytes;
1593                         for (c = 7; c >= 0; c--) {
1594                                 int spk = cap->speakers[c];
1595                                 if (!spk)
1596                                         continue;
1597                                 if (put_user(spk_to_chmap(spk), dst))
1598                                         return -EFAULT;
1599                                 dst++;
1600                         }
1601                 }
1602         }
1603         if (put_user(count, tlv + 1))
1604                 return -EFAULT;
1605         return 0;
1606 }
1607
1608 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1609                               struct snd_ctl_elem_value *ucontrol)
1610 {
1611         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1612         struct hda_codec *codec = info->private_data;
1613         struct hdmi_spec *spec = codec->spec;
1614         int pin_idx = kcontrol->private_value;
1615         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1616         int i;
1617
1618         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1619                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1620         return 0;
1621 }
1622
1623 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1624                               struct snd_ctl_elem_value *ucontrol)
1625 {
1626         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1627         struct hda_codec *codec = info->private_data;
1628         struct hdmi_spec *spec = codec->spec;
1629         int pin_idx = kcontrol->private_value;
1630         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1631         unsigned int ctl_idx;
1632         struct snd_pcm_substream *substream;
1633         unsigned char chmap[8];
1634         int i, ca, prepared = 0;
1635
1636         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1637         substream = snd_pcm_chmap_substream(info, ctl_idx);
1638         if (!substream || !substream->runtime)
1639                 return 0; /* just for avoiding error from alsactl restore */
1640         switch (substream->runtime->status->state) {
1641         case SNDRV_PCM_STATE_OPEN:
1642         case SNDRV_PCM_STATE_SETUP:
1643                 break;
1644         case SNDRV_PCM_STATE_PREPARED:
1645                 prepared = 1;
1646                 break;
1647         default:
1648                 return -EBUSY;
1649         }
1650         memset(chmap, 0, sizeof(chmap));
1651         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1652                 chmap[i] = ucontrol->value.integer.value[i];
1653         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1654                 return 0;
1655         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1656         if (ca < 0)
1657                 return -EINVAL;
1658         per_pin->chmap_set = true;
1659         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1660         if (prepared)
1661                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1662
1663         return 0;
1664 }
1665
1666 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1667 {
1668         struct hdmi_spec *spec = codec->spec;
1669         int pin_idx;
1670
1671         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1672                 struct hda_pcm *info;
1673                 struct hda_pcm_stream *pstr;
1674                 struct hdmi_spec_per_pin *per_pin;
1675
1676                 per_pin = get_pin(spec, pin_idx);
1677                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1678                 info = snd_array_new(&spec->pcm_rec);
1679                 if (!info)
1680                         return -ENOMEM;
1681                 info->name = per_pin->pcm_name;
1682                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1683                 info->own_chmap = true;
1684
1685                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1686                 pstr->substreams = 1;
1687                 pstr->ops = generic_ops;
1688                 /* other pstr fields are set in open */
1689         }
1690
1691         codec->num_pcms = spec->num_pins;
1692         codec->pcm_info = spec->pcm_rec.list;
1693
1694         return 0;
1695 }
1696
1697 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1698 {
1699         char hdmi_str[32] = "HDMI/DP";
1700         struct hdmi_spec *spec = codec->spec;
1701         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1702         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1703
1704         if (pcmdev > 0)
1705                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1706         if (!is_jack_detectable(codec, per_pin->pin_nid))
1707                 strncat(hdmi_str, " Phantom",
1708                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1709
1710         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1711 }
1712
1713 static int generic_hdmi_build_controls(struct hda_codec *codec)
1714 {
1715         struct hdmi_spec *spec = codec->spec;
1716         int err;
1717         int pin_idx;
1718
1719         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1720                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1721
1722                 err = generic_hdmi_build_jack(codec, pin_idx);
1723                 if (err < 0)
1724                         return err;
1725
1726                 err = snd_hda_create_dig_out_ctls(codec,
1727                                                   per_pin->pin_nid,
1728                                                   per_pin->mux_nids[0],
1729                                                   HDA_PCM_TYPE_HDMI);
1730                 if (err < 0)
1731                         return err;
1732                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1733
1734                 /* add control for ELD Bytes */
1735                 err = hdmi_create_eld_ctl(codec, pin_idx,
1736                                           get_pcm_rec(spec, pin_idx)->device);
1737
1738                 if (err < 0)
1739                         return err;
1740
1741                 hdmi_present_sense(per_pin, 0);
1742         }
1743
1744         /* add channel maps */
1745         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1746                 struct snd_pcm_chmap *chmap;
1747                 struct snd_kcontrol *kctl;
1748                 int i;
1749
1750                 if (!codec->pcm_info[pin_idx].pcm)
1751                         break;
1752                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1753                                              SNDRV_PCM_STREAM_PLAYBACK,
1754                                              NULL, 0, pin_idx, &chmap);
1755                 if (err < 0)
1756                         return err;
1757                 /* override handlers */
1758                 chmap->private_data = codec;
1759                 kctl = chmap->kctl;
1760                 for (i = 0; i < kctl->count; i++)
1761                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1762                 kctl->info = hdmi_chmap_ctl_info;
1763                 kctl->get = hdmi_chmap_ctl_get;
1764                 kctl->put = hdmi_chmap_ctl_put;
1765                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1766         }
1767
1768         return 0;
1769 }
1770
1771 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1772 {
1773         struct hdmi_spec *spec = codec->spec;
1774         int pin_idx;
1775
1776         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1777                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1778                 struct hdmi_eld *eld = &per_pin->sink_eld;
1779
1780                 per_pin->codec = codec;
1781                 mutex_init(&eld->lock);
1782                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1783                 snd_hda_eld_proc_new(codec, eld, pin_idx);
1784         }
1785         return 0;
1786 }
1787
1788 static int generic_hdmi_init(struct hda_codec *codec)
1789 {
1790         struct hdmi_spec *spec = codec->spec;
1791         int pin_idx;
1792
1793         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1794                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1795                 hda_nid_t pin_nid = per_pin->pin_nid;
1796
1797                 hdmi_init_pin(codec, pin_nid);
1798                 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1799         }
1800         return 0;
1801 }
1802
1803 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1804 {
1805         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1806         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1807         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1808 }
1809
1810 static void hdmi_array_free(struct hdmi_spec *spec)
1811 {
1812         snd_array_free(&spec->pins);
1813         snd_array_free(&spec->cvts);
1814         snd_array_free(&spec->pcm_rec);
1815 }
1816
1817 static void generic_hdmi_free(struct hda_codec *codec)
1818 {
1819         struct hdmi_spec *spec = codec->spec;
1820         int pin_idx;
1821
1822         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1823                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1824                 struct hdmi_eld *eld = &per_pin->sink_eld;
1825
1826                 cancel_delayed_work(&per_pin->work);
1827                 snd_hda_eld_proc_free(codec, eld);
1828         }
1829
1830         flush_workqueue(codec->bus->workq);
1831         hdmi_array_free(spec);
1832         kfree(spec);
1833 }
1834
1835 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1836         .init                   = generic_hdmi_init,
1837         .free                   = generic_hdmi_free,
1838         .build_pcms             = generic_hdmi_build_pcms,
1839         .build_controls         = generic_hdmi_build_controls,
1840         .unsol_event            = hdmi_unsol_event,
1841 };
1842
1843
1844 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1845                                              hda_nid_t nid)
1846 {
1847         struct hdmi_spec *spec = codec->spec;
1848         hda_nid_t conns[4];
1849         int nconns;
1850
1851         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1852         if (nconns == spec->num_cvts &&
1853             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1854                 return;
1855
1856         /* override pins connection list */
1857         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1858         nconns = max(spec->num_cvts, 4);
1859         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1860 }
1861
1862 #define INTEL_VENDOR_NID 0x08
1863 #define INTEL_GET_VENDOR_VERB 0xf81
1864 #define INTEL_SET_VENDOR_VERB 0x781
1865 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
1866 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
1867
1868 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1869                                           bool update_tree)
1870 {
1871         unsigned int vendor_param;
1872
1873         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1874                                 INTEL_GET_VENDOR_VERB, 0);
1875         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1876                 return;
1877
1878         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1879         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1880                                 INTEL_SET_VENDOR_VERB, vendor_param);
1881         if (vendor_param == -1)
1882                 return;
1883
1884         if (update_tree)
1885                 snd_hda_codec_update_widgets(codec);
1886 }
1887
1888 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1889 {
1890         unsigned int vendor_param;
1891
1892         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1893                                 INTEL_GET_VENDOR_VERB, 0);
1894         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1895                 return;
1896
1897         /* enable DP1.2 mode */
1898         vendor_param |= INTEL_EN_DP12;
1899         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1900                                 INTEL_SET_VENDOR_VERB, vendor_param);
1901 }
1902
1903 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1904  * Otherwise you may get severe h/w communication errors.
1905  */
1906 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1907                                 unsigned int power_state)
1908 {
1909         if (power_state == AC_PWRST_D0) {
1910                 intel_haswell_enable_all_pins(codec, false);
1911                 intel_haswell_fixup_enable_dp12(codec);
1912         }
1913
1914         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
1915         snd_hda_codec_set_power_to_all(codec, fg, power_state);
1916 }
1917
1918 static int patch_generic_hdmi(struct hda_codec *codec)
1919 {
1920         struct hdmi_spec *spec;
1921
1922         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1923         if (spec == NULL)
1924                 return -ENOMEM;
1925
1926         codec->spec = spec;
1927         hdmi_array_init(spec, 4);
1928
1929         if (codec->vendor_id == 0x80862807) {
1930                 intel_haswell_enable_all_pins(codec, true);
1931                 intel_haswell_fixup_enable_dp12(codec);
1932         }
1933
1934         if (hdmi_parse_codec(codec) < 0) {
1935                 codec->spec = NULL;
1936                 kfree(spec);
1937                 return -EINVAL;
1938         }
1939         codec->patch_ops = generic_hdmi_patch_ops;
1940         if (codec->vendor_id == 0x80862807)
1941                 codec->patch_ops.set_power_state = haswell_set_power_state;
1942
1943         generic_hdmi_init_per_pins(codec);
1944
1945         init_channel_allocations();
1946
1947         return 0;
1948 }
1949
1950 /*
1951  * Shared non-generic implementations
1952  */
1953
1954 static int simple_playback_build_pcms(struct hda_codec *codec)
1955 {
1956         struct hdmi_spec *spec = codec->spec;
1957         struct hda_pcm *info;
1958         unsigned int chans;
1959         struct hda_pcm_stream *pstr;
1960         struct hdmi_spec_per_cvt *per_cvt;
1961
1962         per_cvt = get_cvt(spec, 0);
1963         chans = get_wcaps(codec, per_cvt->cvt_nid);
1964         chans = get_wcaps_channels(chans);
1965
1966         info = snd_array_new(&spec->pcm_rec);
1967         if (!info)
1968                 return -ENOMEM;
1969         info->name = get_pin(spec, 0)->pcm_name;
1970         sprintf(info->name, "HDMI 0");
1971         info->pcm_type = HDA_PCM_TYPE_HDMI;
1972         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1973         *pstr = spec->pcm_playback;
1974         pstr->nid = per_cvt->cvt_nid;
1975         if (pstr->channels_max <= 2 && chans && chans <= 16)
1976                 pstr->channels_max = chans;
1977
1978         codec->num_pcms = 1;
1979         codec->pcm_info = info;
1980
1981         return 0;
1982 }
1983
1984 /* unsolicited event for jack sensing */
1985 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1986                                     unsigned int res)
1987 {
1988         snd_hda_jack_set_dirty_all(codec);
1989         snd_hda_jack_report_sync(codec);
1990 }
1991
1992 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1993  * as long as spec->pins[] is set correctly
1994  */
1995 #define simple_hdmi_build_jack  generic_hdmi_build_jack
1996
1997 static int simple_playback_build_controls(struct hda_codec *codec)
1998 {
1999         struct hdmi_spec *spec = codec->spec;
2000         struct hdmi_spec_per_cvt *per_cvt;
2001         int err;
2002
2003         per_cvt = get_cvt(spec, 0);
2004         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2005                                           per_cvt->cvt_nid,
2006                                           HDA_PCM_TYPE_HDMI);
2007         if (err < 0)
2008                 return err;
2009         return simple_hdmi_build_jack(codec, 0);
2010 }
2011
2012 static int simple_playback_init(struct hda_codec *codec)
2013 {
2014         struct hdmi_spec *spec = codec->spec;
2015         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2016         hda_nid_t pin = per_pin->pin_nid;
2017
2018         snd_hda_codec_write(codec, pin, 0,
2019                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2020         /* some codecs require to unmute the pin */
2021         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2022                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2023                                     AMP_OUT_UNMUTE);
2024         snd_hda_jack_detect_enable(codec, pin, pin);
2025         return 0;
2026 }
2027
2028 static void simple_playback_free(struct hda_codec *codec)
2029 {
2030         struct hdmi_spec *spec = codec->spec;
2031
2032         hdmi_array_free(spec);
2033         kfree(spec);
2034 }
2035
2036 /*
2037  * Nvidia specific implementations
2038  */
2039
2040 #define Nv_VERB_SET_Channel_Allocation          0xF79
2041 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2042 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2043 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2044
2045 #define nvhdmi_master_con_nid_7x        0x04
2046 #define nvhdmi_master_pin_nid_7x        0x05
2047
2048 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2049         /*front, rear, clfe, rear_surr */
2050         0x6, 0x8, 0xa, 0xc,
2051 };
2052
2053 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2054         /* set audio protect on */
2055         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2056         /* enable digital output on pin widget */
2057         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2058         {} /* terminator */
2059 };
2060
2061 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2062         /* set audio protect on */
2063         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2064         /* enable digital output on pin widget */
2065         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2066         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2067         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2068         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2069         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2070         {} /* terminator */
2071 };
2072
2073 #ifdef LIMITED_RATE_FMT_SUPPORT
2074 /* support only the safe format and rate */
2075 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2076 #define SUPPORTED_MAXBPS        16
2077 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2078 #else
2079 /* support all rates and formats */
2080 #define SUPPORTED_RATES \
2081         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2082         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2083          SNDRV_PCM_RATE_192000)
2084 #define SUPPORTED_MAXBPS        24
2085 #define SUPPORTED_FORMATS \
2086         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2087 #endif
2088
2089 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2090 {
2091         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2092         return 0;
2093 }
2094
2095 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2096 {
2097         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2098         return 0;
2099 }
2100
2101 static unsigned int channels_2_6_8[] = {
2102         2, 6, 8
2103 };
2104
2105 static unsigned int channels_2_8[] = {
2106         2, 8
2107 };
2108
2109 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2110         .count = ARRAY_SIZE(channels_2_6_8),
2111         .list = channels_2_6_8,
2112         .mask = 0,
2113 };
2114
2115 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2116         .count = ARRAY_SIZE(channels_2_8),
2117         .list = channels_2_8,
2118         .mask = 0,
2119 };
2120
2121 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2122                                     struct hda_codec *codec,
2123                                     struct snd_pcm_substream *substream)
2124 {
2125         struct hdmi_spec *spec = codec->spec;
2126         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2127
2128         switch (codec->preset->id) {
2129         case 0x10de0002:
2130         case 0x10de0003:
2131         case 0x10de0005:
2132         case 0x10de0006:
2133                 hw_constraints_channels = &hw_constraints_2_8_channels;
2134                 break;
2135         case 0x10de0007:
2136                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2137                 break;
2138         default:
2139                 break;
2140         }
2141
2142         if (hw_constraints_channels != NULL) {
2143                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2144                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2145                                 hw_constraints_channels);
2146         } else {
2147                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2148                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2149         }
2150
2151         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2152 }
2153
2154 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2155                                      struct hda_codec *codec,
2156                                      struct snd_pcm_substream *substream)
2157 {
2158         struct hdmi_spec *spec = codec->spec;
2159         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2160 }
2161
2162 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2163                                        struct hda_codec *codec,
2164                                        unsigned int stream_tag,
2165                                        unsigned int format,
2166                                        struct snd_pcm_substream *substream)
2167 {
2168         struct hdmi_spec *spec = codec->spec;
2169         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2170                                              stream_tag, format, substream);
2171 }
2172
2173 static const struct hda_pcm_stream simple_pcm_playback = {
2174         .substreams = 1,
2175         .channels_min = 2,
2176         .channels_max = 2,
2177         .ops = {
2178                 .open = simple_playback_pcm_open,
2179                 .close = simple_playback_pcm_close,
2180                 .prepare = simple_playback_pcm_prepare
2181         },
2182 };
2183
2184 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2185         .build_controls = simple_playback_build_controls,
2186         .build_pcms = simple_playback_build_pcms,
2187         .init = simple_playback_init,
2188         .free = simple_playback_free,
2189         .unsol_event = simple_hdmi_unsol_event,
2190 };
2191
2192 static int patch_simple_hdmi(struct hda_codec *codec,
2193                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2194 {
2195         struct hdmi_spec *spec;
2196         struct hdmi_spec_per_cvt *per_cvt;
2197         struct hdmi_spec_per_pin *per_pin;
2198
2199         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2200         if (!spec)
2201                 return -ENOMEM;
2202
2203         codec->spec = spec;
2204         hdmi_array_init(spec, 1);
2205
2206         spec->multiout.num_dacs = 0;  /* no analog */
2207         spec->multiout.max_channels = 2;
2208         spec->multiout.dig_out_nid = cvt_nid;
2209         spec->num_cvts = 1;
2210         spec->num_pins = 1;
2211         per_pin = snd_array_new(&spec->pins);
2212         per_cvt = snd_array_new(&spec->cvts);
2213         if (!per_pin || !per_cvt) {
2214                 simple_playback_free(codec);
2215                 return -ENOMEM;
2216         }
2217         per_cvt->cvt_nid = cvt_nid;
2218         per_pin->pin_nid = pin_nid;
2219         spec->pcm_playback = simple_pcm_playback;
2220
2221         codec->patch_ops = simple_hdmi_patch_ops;
2222
2223         return 0;
2224 }
2225
2226 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2227                                                     int channels)
2228 {
2229         unsigned int chanmask;
2230         int chan = channels ? (channels - 1) : 1;
2231
2232         switch (channels) {
2233         default:
2234         case 0:
2235         case 2:
2236                 chanmask = 0x00;
2237                 break;
2238         case 4:
2239                 chanmask = 0x08;
2240                 break;
2241         case 6:
2242                 chanmask = 0x0b;
2243                 break;
2244         case 8:
2245                 chanmask = 0x13;
2246                 break;
2247         }
2248
2249         /* Set the audio infoframe channel allocation and checksum fields.  The
2250          * channel count is computed implicitly by the hardware. */
2251         snd_hda_codec_write(codec, 0x1, 0,
2252                         Nv_VERB_SET_Channel_Allocation, chanmask);
2253
2254         snd_hda_codec_write(codec, 0x1, 0,
2255                         Nv_VERB_SET_Info_Frame_Checksum,
2256                         (0x71 - chan - chanmask));
2257 }
2258
2259 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2260                                    struct hda_codec *codec,
2261                                    struct snd_pcm_substream *substream)
2262 {
2263         struct hdmi_spec *spec = codec->spec;
2264         int i;
2265
2266         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2267                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2268         for (i = 0; i < 4; i++) {
2269                 /* set the stream id */
2270                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2271                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2272                 /* set the stream format */
2273                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2274                                 AC_VERB_SET_STREAM_FORMAT, 0);
2275         }
2276
2277         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2278          * streams are disabled. */
2279         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2280
2281         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2282 }
2283
2284 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2285                                      struct hda_codec *codec,
2286                                      unsigned int stream_tag,
2287                                      unsigned int format,
2288                                      struct snd_pcm_substream *substream)
2289 {
2290         int chs;
2291         unsigned int dataDCC2, channel_id;
2292         int i;
2293         struct hdmi_spec *spec = codec->spec;
2294         struct hda_spdif_out *spdif;
2295         struct hdmi_spec_per_cvt *per_cvt;
2296
2297         mutex_lock(&codec->spdif_mutex);
2298         per_cvt = get_cvt(spec, 0);
2299         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2300
2301         chs = substream->runtime->channels;
2302
2303         dataDCC2 = 0x2;
2304
2305         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2306         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2307                 snd_hda_codec_write(codec,
2308                                 nvhdmi_master_con_nid_7x,
2309                                 0,
2310                                 AC_VERB_SET_DIGI_CONVERT_1,
2311                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2312
2313         /* set the stream id */
2314         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2315                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2316
2317         /* set the stream format */
2318         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2319                         AC_VERB_SET_STREAM_FORMAT, format);
2320
2321         /* turn on again (if needed) */
2322         /* enable and set the channel status audio/data flag */
2323         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2324                 snd_hda_codec_write(codec,
2325                                 nvhdmi_master_con_nid_7x,
2326                                 0,
2327                                 AC_VERB_SET_DIGI_CONVERT_1,
2328                                 spdif->ctls & 0xff);
2329                 snd_hda_codec_write(codec,
2330                                 nvhdmi_master_con_nid_7x,
2331                                 0,
2332                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2333         }
2334
2335         for (i = 0; i < 4; i++) {
2336                 if (chs == 2)
2337                         channel_id = 0;
2338                 else
2339                         channel_id = i * 2;
2340
2341                 /* turn off SPDIF once;
2342                  *otherwise the IEC958 bits won't be updated
2343                  */
2344                 if (codec->spdif_status_reset &&
2345                 (spdif->ctls & AC_DIG1_ENABLE))
2346                         snd_hda_codec_write(codec,
2347                                 nvhdmi_con_nids_7x[i],
2348                                 0,
2349                                 AC_VERB_SET_DIGI_CONVERT_1,
2350                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2351                 /* set the stream id */
2352                 snd_hda_codec_write(codec,
2353                                 nvhdmi_con_nids_7x[i],
2354                                 0,
2355                                 AC_VERB_SET_CHANNEL_STREAMID,
2356                                 (stream_tag << 4) | channel_id);
2357                 /* set the stream format */
2358                 snd_hda_codec_write(codec,
2359                                 nvhdmi_con_nids_7x[i],
2360                                 0,
2361                                 AC_VERB_SET_STREAM_FORMAT,
2362                                 format);
2363                 /* turn on again (if needed) */
2364                 /* enable and set the channel status audio/data flag */
2365                 if (codec->spdif_status_reset &&
2366                 (spdif->ctls & AC_DIG1_ENABLE)) {
2367                         snd_hda_codec_write(codec,
2368                                         nvhdmi_con_nids_7x[i],
2369                                         0,
2370                                         AC_VERB_SET_DIGI_CONVERT_1,
2371                                         spdif->ctls & 0xff);
2372                         snd_hda_codec_write(codec,
2373                                         nvhdmi_con_nids_7x[i],
2374                                         0,
2375                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2376                 }
2377         }
2378
2379         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2380
2381         mutex_unlock(&codec->spdif_mutex);
2382         return 0;
2383 }
2384
2385 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2386         .substreams = 1,
2387         .channels_min = 2,
2388         .channels_max = 8,
2389         .nid = nvhdmi_master_con_nid_7x,
2390         .rates = SUPPORTED_RATES,
2391         .maxbps = SUPPORTED_MAXBPS,
2392         .formats = SUPPORTED_FORMATS,
2393         .ops = {
2394                 .open = simple_playback_pcm_open,
2395                 .close = nvhdmi_8ch_7x_pcm_close,
2396                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2397         },
2398 };
2399
2400 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2401 {
2402         struct hdmi_spec *spec;
2403         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2404                                     nvhdmi_master_pin_nid_7x);
2405         if (err < 0)
2406                 return err;
2407
2408         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2409         /* override the PCM rates, etc, as the codec doesn't give full list */
2410         spec = codec->spec;
2411         spec->pcm_playback.rates = SUPPORTED_RATES;
2412         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2413         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2414         return 0;
2415 }
2416
2417 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2418 {
2419         struct hdmi_spec *spec = codec->spec;
2420         int err = simple_playback_build_pcms(codec);
2421         if (!err) {
2422                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2423                 info->own_chmap = true;
2424         }
2425         return err;
2426 }
2427
2428 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2429 {
2430         struct hdmi_spec *spec = codec->spec;
2431         struct hda_pcm *info;
2432         struct snd_pcm_chmap *chmap;
2433         int err;
2434
2435         err = simple_playback_build_controls(codec);
2436         if (err < 0)
2437                 return err;
2438
2439         /* add channel maps */
2440         info = get_pcm_rec(spec, 0);
2441         err = snd_pcm_add_chmap_ctls(info->pcm,
2442                                      SNDRV_PCM_STREAM_PLAYBACK,
2443                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2444         if (err < 0)
2445                 return err;
2446         switch (codec->preset->id) {
2447         case 0x10de0002:
2448         case 0x10de0003:
2449         case 0x10de0005:
2450         case 0x10de0006:
2451                 chmap->channel_mask = (1U << 2) | (1U << 8);
2452                 break;
2453         case 0x10de0007:
2454                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2455         }
2456         return 0;
2457 }
2458
2459 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2460 {
2461         struct hdmi_spec *spec;
2462         int err = patch_nvhdmi_2ch(codec);
2463         if (err < 0)
2464                 return err;
2465         spec = codec->spec;
2466         spec->multiout.max_channels = 8;
2467         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2468         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2469         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2470         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2471
2472         /* Initialize the audio infoframe channel mask and checksum to something
2473          * valid */
2474         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2475
2476         return 0;
2477 }
2478
2479 /*
2480  * ATI-specific implementations
2481  *
2482  * FIXME: we may omit the whole this and use the generic code once after
2483  * it's confirmed to work.
2484  */
2485
2486 #define ATIHDMI_CVT_NID         0x02    /* audio converter */
2487 #define ATIHDMI_PIN_NID         0x03    /* HDMI output pin */
2488
2489 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2490                                         struct hda_codec *codec,
2491                                         unsigned int stream_tag,
2492                                         unsigned int format,
2493                                         struct snd_pcm_substream *substream)
2494 {
2495         struct hdmi_spec *spec = codec->spec;
2496         struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2497         int chans = substream->runtime->channels;
2498         int i, err;
2499
2500         err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2501                                           substream);
2502         if (err < 0)
2503                 return err;
2504         snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2505                             AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2506         /* FIXME: XXX */
2507         for (i = 0; i < chans; i++) {
2508                 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2509                                     AC_VERB_SET_HDMI_CHAN_SLOT,
2510                                     (i << 4) | i);
2511         }
2512         return 0;
2513 }
2514
2515 static int patch_atihdmi(struct hda_codec *codec)
2516 {
2517         struct hdmi_spec *spec;
2518         int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2519         if (err < 0)
2520                 return err;
2521         spec = codec->spec;
2522         spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2523         return 0;
2524 }
2525
2526 /* VIA HDMI Implementation */
2527 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
2528 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
2529
2530 static int patch_via_hdmi(struct hda_codec *codec)
2531 {
2532         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2533 }
2534
2535 /*
2536  * patch entries
2537  */
2538 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2539 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2540 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
2541 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
2542 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_generic_hdmi },
2543 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
2544 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
2545 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
2546 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2547 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2548 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2549 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
2550 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
2551 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_generic_hdmi },
2552 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_generic_hdmi },
2553 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_generic_hdmi },
2554 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_generic_hdmi },
2555 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_generic_hdmi },
2556 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_generic_hdmi },
2557 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_generic_hdmi },
2558 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_generic_hdmi },
2559 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_generic_hdmi },
2560 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_generic_hdmi },
2561 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_generic_hdmi },
2562 /* 17 is known to be absent */
2563 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_generic_hdmi },
2564 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_generic_hdmi },
2565 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_generic_hdmi },
2566 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_generic_hdmi },
2567 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_generic_hdmi },
2568 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_generic_hdmi },
2569 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_generic_hdmi },
2570 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_generic_hdmi },
2571 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_generic_hdmi },
2572 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_generic_hdmi },
2573 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_generic_hdmi },
2574 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_generic_hdmi },
2575 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
2576 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
2577 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2578 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
2579 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2580 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
2581 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2582 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
2583 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
2584 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
2585 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
2586 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2587 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2588 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
2589 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
2590 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
2591 {} /* terminator */
2592 };
2593
2594 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2595 MODULE_ALIAS("snd-hda-codec-id:10027919");
2596 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2597 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2598 MODULE_ALIAS("snd-hda-codec-id:10951390");
2599 MODULE_ALIAS("snd-hda-codec-id:10951392");
2600 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2601 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2602 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2603 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2604 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2605 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2606 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2607 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2608 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2609 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2610 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2611 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2612 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2613 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2614 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2615 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2616 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2617 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2618 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2619 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2620 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2621 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2622 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2623 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2624 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2625 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2626 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2627 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2628 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2629 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2630 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2631 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2632 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2633 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2634 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2635 MODULE_ALIAS("snd-hda-codec-id:80860054");
2636 MODULE_ALIAS("snd-hda-codec-id:80862801");
2637 MODULE_ALIAS("snd-hda-codec-id:80862802");
2638 MODULE_ALIAS("snd-hda-codec-id:80862803");
2639 MODULE_ALIAS("snd-hda-codec-id:80862804");
2640 MODULE_ALIAS("snd-hda-codec-id:80862805");
2641 MODULE_ALIAS("snd-hda-codec-id:80862806");
2642 MODULE_ALIAS("snd-hda-codec-id:80862807");
2643 MODULE_ALIAS("snd-hda-codec-id:80862880");
2644 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2645
2646 MODULE_LICENSE("GPL");
2647 MODULE_DESCRIPTION("HDMI HD-audio codec");
2648 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2649 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2650 MODULE_ALIAS("snd-hda-codec-atihdmi");
2651
2652 static struct hda_codec_preset_list intel_list = {
2653         .preset = snd_hda_preset_hdmi,
2654         .owner = THIS_MODULE,
2655 };
2656
2657 static int __init patch_hdmi_init(void)
2658 {
2659         return snd_hda_add_codec_preset(&intel_list);
2660 }
2661
2662 static void __exit patch_hdmi_exit(void)
2663 {
2664         snd_hda_delete_codec_preset(&intel_list);
2665 }
2666
2667 module_init(patch_hdmi_init)
2668 module_exit(patch_hdmi_exit)