sound/pci/hda/hda_controller.c

   1 /*
   2  *
   3  *  Implementation of primary alsa driver code base for Intel HD Audio.
   4  *
   5  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   6  *
   7  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   8  *                     PeiSen Hou <pshou@realtek.com.tw>
   9  *
  10  *  This program is free software; you can redistribute it and/or modify it
  11  *  under the terms of the GNU General Public License as published by the Free
  12  *  Software Foundation; either version 2 of the License, or (at your option)
  13  *  any later version.
  14  *
  15  *  This program is distributed in the hope that it will be useful, but WITHOUT
  16  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  18  *  more details.
  19  *
  20  *
  21  */
  22
  23 #include <linux/clocksource.h>
  24 #include <linux/delay.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/pm_runtime.h>
  29 #include <linux/slab.h>
  30 #include <sound/core.h>
  31 #include <sound/initval.h>
  32 #include "hda_controller.h"
  33
  34 #define CREATE_TRACE_POINTS
  35 #include "hda_intel_trace.h"
  36
  37 /* DSP lock helpers */
  38 #define dsp_lock(dev)           snd_hdac_dsp_lock(azx_stream(dev))
  39 #define dsp_unlock(dev)         snd_hdac_dsp_unlock(azx_stream(dev))
  40 #define dsp_is_locked(dev)      snd_hdac_stream_is_locked(azx_stream(dev))
  41
  42 /* assign a stream for the PCM */
  43 static inline struct azx_dev *
  44 azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream)
  45 {
  46         struct hdac_stream *s;
  47
  48         s = snd_hdac_stream_assign(azx_bus(chip), substream);
  49         if (!s)
  50                 return NULL;
  51         return stream_to_azx_dev(s);
  52 }
  53
  54 /* release the assigned stream */
  55 static inline void azx_release_device(struct azx_dev *azx_dev)
  56 {
  57         snd_hdac_stream_release(azx_stream(azx_dev));
  58 }
  59
  60 static inline struct hda_pcm_stream *
  61 to_hda_pcm_stream(struct snd_pcm_substream *substream)
  62 {
  63         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
  64         return &apcm->info->stream[substream->stream];
  65 }
  66
  67 static u64 azx_adjust_codec_delay(struct snd_pcm_substream *substream,
  68                                 u64 nsec)
  69 {
  70         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
  71         struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
  72         u64 codec_frames, codec_nsecs;
  73
  74         if (!hinfo->ops.get_delay)
  75                 return nsec;
  76
  77         codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream);
  78         codec_nsecs = div_u64(codec_frames * 1000000000LL,
  79                               substream->runtime->rate);
  80
  81         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  82                 return nsec + codec_nsecs;
  83
  84         return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
  85 }
  86
  87 /*
  88  * PCM ops
  89  */
  90
  91 static int azx_pcm_close(struct snd_pcm_substream *substream)
  92 {
  93         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
  94         struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
  95         struct azx *chip = apcm->chip;
  96         struct azx_dev *azx_dev = get_azx_dev(substream);
  97
  98         mutex_lock(&chip->open_mutex);
  99         azx_release_device(azx_dev);
 100         if (hinfo->ops.close)
 101                 hinfo->ops.close(hinfo, apcm->codec, substream);
 102         snd_hda_power_down(apcm->codec);
 103         mutex_unlock(&chip->open_mutex);
 104         snd_hda_codec_pcm_put(apcm->info);
 105         return 0;
 106 }
 107
 108 static int azx_pcm_hw_params(struct snd_pcm_substream *substream,
 109                              struct snd_pcm_hw_params *hw_params)
 110 {
 111         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 112         struct azx *chip = apcm->chip;
 113         struct azx_dev *azx_dev = get_azx_dev(substream);
 114         int ret;
 115
 116         dsp_lock(azx_dev);
 117         if (dsp_is_locked(azx_dev)) {
 118                 ret = -EBUSY;
 119                 goto unlock;
 120         }
 121
 122         azx_dev->core.bufsize = 0;
 123         azx_dev->core.period_bytes = 0;
 124         azx_dev->core.format_val = 0;
 125         ret = chip->ops->substream_alloc_pages(chip, substream,
 126                                           params_buffer_bytes(hw_params));
 127 unlock:
 128         dsp_unlock(azx_dev);
 129         return ret;
 130 }
 131
 132 static int azx_pcm_hw_free(struct snd_pcm_substream *substream)
 133 {
 134         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 135         struct azx_dev *azx_dev = get_azx_dev(substream);
 136         struct azx *chip = apcm->chip;
 137         struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
 138         int err;
 139
 140         /* reset BDL address */
 141         dsp_lock(azx_dev);
 142         if (!dsp_is_locked(azx_dev))
 143                 snd_hdac_stream_cleanup(azx_stream(azx_dev));
 144
 145         snd_hda_codec_cleanup(apcm->codec, hinfo, substream);
 146
 147         err = chip->ops->substream_free_pages(chip, substream);
 148         azx_dev->prepared = 0;
 149         dsp_unlock(azx_dev);
 150         return err;
 151 }
 152
 153 static int azx_pcm_prepare(struct snd_pcm_substream *substream)
 154 {
 155         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 156         struct azx *chip = apcm->chip;
 157         struct azx_dev *azx_dev = get_azx_dev(substream);
 158         struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
 159         struct snd_pcm_runtime *runtime = substream->runtime;
 160         unsigned int bufsize, period_bytes, format_val, stream_tag;
 161         int err;
 162         struct hda_spdif_out *spdif =
 163                 snd_hda_spdif_out_of_nid(apcm->codec, hinfo->nid);
 164         unsigned short ctls = spdif ? spdif->ctls : 0;
 165
 166         dsp_lock(azx_dev);
 167         if (dsp_is_locked(azx_dev)) {
 168                 err = -EBUSY;
 169                 goto unlock;
 170         }
 171
 172         snd_hdac_stream_reset(azx_stream(azx_dev));
 173         format_val = snd_hdac_calc_stream_format(runtime->rate,
 174                                                 runtime->channels,
 175                                                 runtime->format,
 176                                                 hinfo->maxbps,
 177                                                 ctls);
 178         if (!format_val) {
 179                 dev_err(chip->card->dev,
 180                         "invalid format_val, rate=%d, ch=%d, format=%d\n",
 181                         runtime->rate, runtime->channels, runtime->format);
 182                 err = -EINVAL;
 183                 goto unlock;
 184         }
 185
 186         bufsize = snd_pcm_lib_buffer_bytes(substream);
 187         period_bytes = snd_pcm_lib_period_bytes(substream);
 188
 189         dev_dbg(chip->card->dev, "azx_pcm_prepare: bufsize=0x%x, format=0x%x\n",
 190                 bufsize, format_val);
 191
 192         if (bufsize != azx_dev->core.bufsize ||
 193             period_bytes != azx_dev->core.period_bytes ||
 194             format_val != azx_dev->core.format_val ||
 195             runtime->no_period_wakeup != azx_dev->core.no_period_wakeup) {
 196                 azx_dev->core.bufsize = bufsize;
 197                 azx_dev->core.period_bytes = period_bytes;
 198                 azx_dev->core.format_val = format_val;
 199                 azx_dev->core.no_period_wakeup = runtime->no_period_wakeup;
 200                 err = snd_hdac_stream_setup_periods(azx_stream(azx_dev));
 201                 if (err < 0)
 202                         goto unlock;
 203         }
 204
 205         snd_hdac_stream_setup(azx_stream(azx_dev));
 206
 207         stream_tag = azx_dev->core.stream_tag;
 208         /* CA-IBG chips need the playback stream starting from 1 */
 209         if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) &&
 210             stream_tag > chip->capture_streams)
 211                 stream_tag -= chip->capture_streams;
 212         err = snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag,
 213                                      azx_dev->core.format_val, substream);
 214
 215  unlock:
 216         if (!err)
 217                 azx_dev->prepared = 1;
 218         dsp_unlock(azx_dev);
 219         return err;
 220 }
 221
 222 static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
 223 {
 224         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 225         struct azx *chip = apcm->chip;
 226         struct hdac_bus *bus = azx_bus(chip);
 227         struct azx_dev *azx_dev;
 228         struct snd_pcm_substream *s;
 229         struct hdac_stream *hstr;
 230         bool start;
 231         int sbits = 0;
 232         int sync_reg;
 233
 234         azx_dev = get_azx_dev(substream);
 235         trace_azx_pcm_trigger(chip, azx_dev, cmd);
 236
 237         hstr = azx_stream(azx_dev);
 238         if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC)
 239                 sync_reg = AZX_REG_OLD_SSYNC;
 240         else
 241                 sync_reg = AZX_REG_SSYNC;
 242
 243         if (dsp_is_locked(azx_dev) || !azx_dev->prepared)
 244                 return -EPIPE;
 245
 246         switch (cmd) {
 247         case SNDRV_PCM_TRIGGER_START:
 248         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 249         case SNDRV_PCM_TRIGGER_RESUME:
 250                 start = true;
 251                 break;
 252         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 253         case SNDRV_PCM_TRIGGER_SUSPEND:
 254         case SNDRV_PCM_TRIGGER_STOP:
 255                 start = false;
 256                 break;
 257         default:
 258                 return -EINVAL;
 259         }
 260
 261         snd_pcm_group_for_each_entry(s, substream) {
 262                 if (s->pcm->card != substream->pcm->card)
 263                         continue;
 264                 azx_dev = get_azx_dev(s);
 265                 sbits |= 1 << azx_dev->core.index;
 266                 snd_pcm_trigger_done(s, substream);
 267         }
 268
 269         spin_lock(&bus->reg_lock);
 270
 271         /* first, set SYNC bits of corresponding streams */
 272         snd_hdac_stream_sync_trigger(hstr, true, sbits, sync_reg);
 273
 274         snd_pcm_group_for_each_entry(s, substream) {
 275                 if (s->pcm->card != substream->pcm->card)
 276                         continue;
 277                 azx_dev = get_azx_dev(s);
 278                 if (start) {
 279                         azx_dev->insufficient = 1;
 280                         snd_hdac_stream_start(azx_stream(azx_dev), true);
 281                 } else {
 282                         snd_hdac_stream_stop(azx_stream(azx_dev));
 283                 }
 284         }
 285         spin_unlock(&bus->reg_lock);
 286
 287         snd_hdac_stream_sync(hstr, start, sbits);
 288
 289         spin_lock(&bus->reg_lock);
 290         /* reset SYNC bits */
 291         snd_hdac_stream_sync_trigger(hstr, false, sbits, sync_reg);
 292         if (start)
 293                 snd_hdac_stream_timecounter_init(hstr, sbits);
 294         spin_unlock(&bus->reg_lock);
 295         return 0;
 296 }
 297
 298 unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev)
 299 {
 300         return snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
 301 }
 302 EXPORT_SYMBOL_GPL(azx_get_pos_lpib);
 303
 304 unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev)
 305 {
 306         return snd_hdac_stream_get_pos_posbuf(azx_stream(azx_dev));
 307 }
 308 EXPORT_SYMBOL_GPL(azx_get_pos_posbuf);
 309
 310 unsigned int azx_get_position(struct azx *chip,
 311                               struct azx_dev *azx_dev)
 312 {
 313         struct snd_pcm_substream *substream = azx_dev->core.substream;
 314         unsigned int pos;
 315         int stream = substream->stream;
 316         int delay = 0;
 317
 318         if (chip->get_position[stream])
 319                 pos = chip->get_position[stream](chip, azx_dev);
 320         else /* use the position buffer as default */
 321                 pos = azx_get_pos_posbuf(chip, azx_dev);
 322
 323         if (pos >= azx_dev->core.bufsize)
 324                 pos = 0;
 325
 326         if (substream->runtime) {
 327                 struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 328                 struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
 329
 330                 if (chip->get_delay[stream])
 331                         delay += chip->get_delay[stream](chip, azx_dev, pos);
 332                 if (hinfo->ops.get_delay)
 333                         delay += hinfo->ops.get_delay(hinfo, apcm->codec,
 334                                                       substream);
 335                 substream->runtime->delay = delay;
 336         }
 337
 338         trace_azx_get_position(chip, azx_dev, pos, delay);
 339         return pos;
 340 }
 341 EXPORT_SYMBOL_GPL(azx_get_position);
 342
 343 static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream)
 344 {
 345         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 346         struct azx *chip = apcm->chip;
 347         struct azx_dev *azx_dev = get_azx_dev(substream);
 348         return bytes_to_frames(substream->runtime,
 349                                azx_get_position(chip, azx_dev));
 350 }
 351
 352 static int azx_get_time_info(struct snd_pcm_substream *substream,
 353                         struct timespec *system_ts, struct timespec *audio_ts,
 354                         struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
 355                         struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
 356 {
 357         struct azx_dev *azx_dev = get_azx_dev(substream);
 358         u64 nsec;
 359
 360         if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
 361                 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
 362
 363                 snd_pcm_gettime(substream->runtime, system_ts);
 364
 365                 nsec = timecounter_read(&azx_dev->core.tc);
 366                 nsec = div_u64(nsec, 3); /* can be optimized */
 367                 if (audio_tstamp_config->report_delay)
 368                         nsec = azx_adjust_codec_delay(substream, nsec);
 369
 370                 *audio_ts = ns_to_timespec(nsec);
 371
 372                 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
 373                 audio_tstamp_report->accuracy_report = 1; /* rest of structure is valid */
 374                 audio_tstamp_report->accuracy = 42; /* 24 MHz WallClock == 42ns resolution */
 375
 376         } else
 377                 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
 378
 379         return 0;
 380 }
 381
 382 static struct snd_pcm_hardware azx_pcm_hw = {
 383         .info =                 (SNDRV_PCM_INFO_MMAP |
 384                                  SNDRV_PCM_INFO_INTERLEAVED |
 385                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
 386                                  SNDRV_PCM_INFO_MMAP_VALID |
 387                                  /* No full-resume yet implemented */
 388                                  /* SNDRV_PCM_INFO_RESUME |*/
 389                                  SNDRV_PCM_INFO_PAUSE |
 390                                  SNDRV_PCM_INFO_SYNC_START |
 391                                  SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
 392                                  SNDRV_PCM_INFO_HAS_LINK_ATIME |
 393                                  SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
 394         .formats =              SNDRV_PCM_FMTBIT_S16_LE,
 395         .rates =                SNDRV_PCM_RATE_48000,
 396         .rate_min =             48000,
 397         .rate_max =             48000,
 398         .channels_min =         2,
 399         .channels_max =         2,
 400         .buffer_bytes_max =     AZX_MAX_BUF_SIZE,
 401         .period_bytes_min =     128,
 402         .period_bytes_max =     AZX_MAX_BUF_SIZE / 2,
 403         .periods_min =          2,
 404         .periods_max =          AZX_MAX_FRAG,
 405         .fifo_size =            0,
 406 };
 407
 408 static int azx_pcm_open(struct snd_pcm_substream *substream)
 409 {
 410         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 411         struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream);
 412         struct azx *chip = apcm->chip;
 413         struct azx_dev *azx_dev;
 414         struct snd_pcm_runtime *runtime = substream->runtime;
 415         int err;
 416         int buff_step;
 417
 418         snd_hda_codec_pcm_get(apcm->info);
 419         mutex_lock(&chip->open_mutex);
 420         azx_dev = azx_assign_device(chip, substream);
 421         if (azx_dev == NULL) {
 422                 err = -EBUSY;
 423                 goto unlock;
 424         }
 425         runtime->private_data = azx_dev;
 426         runtime->hw = azx_pcm_hw;
 427         runtime->hw.channels_min = hinfo->channels_min;
 428         runtime->hw.channels_max = hinfo->channels_max;
 429         runtime->hw.formats = hinfo->formats;
 430         runtime->hw.rates = hinfo->rates;
 431         snd_pcm_limit_hw_rates(runtime);
 432         snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 433
 434         /* avoid wrap-around with wall-clock */
 435         snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
 436                                      20,
 437                                      178000000);
 438
 439         if (chip->align_buffer_size)
 440                 /* constrain buffer sizes to be multiple of 128
 441                    bytes. This is more efficient in terms of memory
 442                    access but isn't required by the HDA spec and
 443                    prevents users from specifying exact period/buffer
 444                    sizes. For example for 44.1kHz, a period size set
 445                    to 20ms will be rounded to 19.59ms. */
 446                 buff_step = 128;
 447         else
 448                 /* Don't enforce steps on buffer sizes, still need to
 449                    be multiple of 4 bytes (HDA spec). Tested on Intel
 450                    HDA controllers, may not work on all devices where
 451                    option needs to be disabled */
 452                 buff_step = 4;
 453
 454         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 455                                    buff_step);
 456         snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 457                                    buff_step);
 458         snd_hda_power_up(apcm->codec);
 459         if (hinfo->ops.open)
 460                 err = hinfo->ops.open(hinfo, apcm->codec, substream);
 461         else
 462                 err = -ENODEV;
 463         if (err < 0) {
 464                 azx_release_device(azx_dev);
 465                 goto powerdown;
 466         }
 467         snd_pcm_limit_hw_rates(runtime);
 468         /* sanity check */
 469         if (snd_BUG_ON(!runtime->hw.channels_min) ||
 470             snd_BUG_ON(!runtime->hw.channels_max) ||
 471             snd_BUG_ON(!runtime->hw.formats) ||
 472             snd_BUG_ON(!runtime->hw.rates)) {
 473                 azx_release_device(azx_dev);
 474                 if (hinfo->ops.close)
 475                         hinfo->ops.close(hinfo, apcm->codec, substream);
 476                 err = -EINVAL;
 477                 goto powerdown;
 478         }
 479
 480         /* disable LINK_ATIME timestamps for capture streams
 481            until we figure out how to handle digital inputs */
 482         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
 483                 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
 484                 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
 485         }
 486
 487         snd_pcm_set_sync(substream);
 488         mutex_unlock(&chip->open_mutex);
 489         return 0;
 490
 491  powerdown:
 492         snd_hda_power_down(apcm->codec);
 493  unlock:
 494         mutex_unlock(&chip->open_mutex);
 495         snd_hda_codec_pcm_put(apcm->info);
 496         return err;
 497 }
 498
 499 static int azx_pcm_mmap(struct snd_pcm_substream *substream,
 500                         struct vm_area_struct *area)
 501 {
 502         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
 503         struct azx *chip = apcm->chip;
 504         if (chip->ops->pcm_mmap_prepare)
 505                 chip->ops->pcm_mmap_prepare(substream, area);
 506         return snd_pcm_lib_default_mmap(substream, area);
 507 }
 508
 509 static struct snd_pcm_ops azx_pcm_ops = {
 510         .open = azx_pcm_open,
 511         .close = azx_pcm_close,
 512         .ioctl = snd_pcm_lib_ioctl,
 513         .hw_params = azx_pcm_hw_params,
 514         .hw_free = azx_pcm_hw_free,
 515         .prepare = azx_pcm_prepare,
 516         .trigger = azx_pcm_trigger,
 517         .pointer = azx_pcm_pointer,
 518         .get_time_info =  azx_get_time_info,
 519         .mmap = azx_pcm_mmap,
 520         .page = snd_pcm_sgbuf_ops_page,
 521 };
 522
 523 static void azx_pcm_free(struct snd_pcm *pcm)
 524 {
 525         struct azx_pcm *apcm = pcm->private_data;
 526         if (apcm) {
 527                 list_del(&apcm->list);
 528                 apcm->info->pcm = NULL;
 529                 kfree(apcm);
 530         }
 531 }
 532
 533 #define MAX_PREALLOC_SIZE       (32 * 1024 * 1024)
 534
 535 int snd_hda_attach_pcm_stream(struct hda_bus *_bus, struct hda_codec *codec,
 536                               struct hda_pcm *cpcm)
 537 {
 538         struct hdac_bus *bus = &_bus->core;
 539         struct azx *chip = bus_to_azx(bus);
 540         struct snd_pcm *pcm;
 541         struct azx_pcm *apcm;
 542         int pcm_dev = cpcm->device;
 543         unsigned int size;
 544         int s, err;
 545
 546         list_for_each_entry(apcm, &chip->pcm_list, list) {
 547                 if (apcm->pcm->device == pcm_dev) {
 548                         dev_err(chip->card->dev, "PCM %d already exists\n",
 549                                 pcm_dev);
 550                         return -EBUSY;
 551                 }
 552         }
 553         err = snd_pcm_new(chip->card, cpcm->name, pcm_dev,
 554                           cpcm->stream[SNDRV_PCM_STREAM_PLAYBACK].substreams,
 555                           cpcm->stream[SNDRV_PCM_STREAM_CAPTURE].substreams,
 556                           &pcm);
 557         if (err < 0)
 558                 return err;
 559         strlcpy(pcm->name, cpcm->name, sizeof(pcm->name));
 560         apcm = kzalloc(sizeof(*apcm), GFP_KERNEL);
 561         if (apcm == NULL)
 562                 return -ENOMEM;
 563         apcm->chip = chip;
 564         apcm->pcm = pcm;
 565         apcm->codec = codec;
 566         apcm->info = cpcm;
 567         pcm->private_data = apcm;
 568         pcm->private_free = azx_pcm_free;
 569         if (cpcm->pcm_type == HDA_PCM_TYPE_MODEM)
 570                 pcm->dev_class = SNDRV_PCM_CLASS_MODEM;
 571         list_add_tail(&apcm->list, &chip->pcm_list);
 572         cpcm->pcm = pcm;
 573         for (s = 0; s < 2; s++) {
 574                 if (cpcm->stream[s].substreams)
 575                         snd_pcm_set_ops(pcm, s, &azx_pcm_ops);
 576         }
 577         /* buffer pre-allocation */
 578         size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
 579         if (size > MAX_PREALLOC_SIZE)
 580                 size = MAX_PREALLOC_SIZE;
 581         snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
 582                                               chip->card->dev,
 583                                               size, MAX_PREALLOC_SIZE);
 584         return 0;
 585 }
 586
 587 static unsigned int azx_command_addr(u32 cmd)
 588 {
 589         unsigned int addr = cmd >> 28;
 590
 591         if (addr >= AZX_MAX_CODECS) {
 592                 snd_BUG();
 593                 addr = 0;
 594         }
 595
 596         return addr;
 597 }
 598
 599 /* receive a response */
 600 static int azx_rirb_get_response(struct hdac_bus *bus, unsigned int addr,
 601                                  unsigned int *res)
 602 {
 603         struct azx *chip = bus_to_azx(bus);
 604         struct hda_bus *hbus = &chip->bus;
 605         unsigned long timeout;
 606         unsigned long loopcounter;
 607         int do_poll = 0;
 608
 609  again:
 610         timeout = jiffies + msecs_to_jiffies(1000);
 611
 612         for (loopcounter = 0;; loopcounter++) {
 613                 spin_lock_irq(&bus->reg_lock);
 614                 if (chip->polling_mode || do_poll)
 615                         snd_hdac_bus_update_rirb(bus);
 616                 if (!bus->rirb.cmds[addr]) {
 617                         if (!do_poll)
 618                                 chip->poll_count = 0;
 619                         if (res)
 620                                 *res = bus->rirb.res[addr]; /* the last value */
 621                         spin_unlock_irq(&bus->reg_lock);
 622                         return 0;
 623                 }
 624                 spin_unlock_irq(&bus->reg_lock);
 625                 if (time_after(jiffies, timeout))
 626                         break;
 627                 if (hbus->needs_damn_long_delay || loopcounter > 3000)
 628                         msleep(2); /* temporary workaround */
 629                 else {
 630                         udelay(10);
 631                         cond_resched();
 632                 }
 633         }
 634
 635         if (hbus->no_response_fallback)
 636                 return -EIO;
 637
 638         if (!chip->polling_mode && chip->poll_count < 2) {
 639                 dev_dbg(chip->card->dev,
 640                         "azx_get_response timeout, polling the codec once: last cmd=0x%08x\n",
 641                         bus->last_cmd[addr]);
 642                 do_poll = 1;
 643                 chip->poll_count++;
 644                 goto again;
 645         }
 646
 647
 648         if (!chip->polling_mode) {
 649                 dev_warn(chip->card->dev,
 650                          "azx_get_response timeout, switching to polling mode: last cmd=0x%08x\n",
 651                          bus->last_cmd[addr]);
 652                 chip->polling_mode = 1;
 653                 goto again;
 654         }
 655
 656         if (chip->msi) {
 657                 dev_warn(chip->card->dev,
 658                          "No response from codec, disabling MSI: last cmd=0x%08x\n",
 659                          bus->last_cmd[addr]);
 660                 if (chip->ops->disable_msi_reset_irq &&
 661                     chip->ops->disable_msi_reset_irq(chip) < 0)
 662                         return -EIO;
 663                 goto again;
 664         }
 665
 666         if (chip->probing) {
 667                 /* If this critical timeout happens during the codec probing
 668                  * phase, this is likely an access to a non-existing codec
 669                  * slot.  Better to return an error and reset the system.
 670                  */
 671                 return -EIO;
 672         }
 673
 674         /* a fatal communication error; need either to reset or to fallback
 675          * to the single_cmd mode
 676          */
 677         if (hbus->allow_bus_reset && !hbus->response_reset && !hbus->in_reset) {
 678                 hbus->response_reset = 1;
 679                 return -EAGAIN; /* give a chance to retry */
 680         }
 681
 682         dev_err(chip->card->dev,
 683                 "azx_get_response timeout, switching to single_cmd mode: last cmd=0x%08x\n",
 684                 bus->last_cmd[addr]);
 685         chip->single_cmd = 1;
 686         hbus->response_reset = 0;
 687         snd_hdac_bus_stop_cmd_io(bus);
 688         return -EIO;
 689 }
 690
 691 /*
 692  * Use the single immediate command instead of CORB/RIRB for simplicity
 693  *
 694  * Note: according to Intel, this is not preferred use.  The command was
 695  *       intended for the BIOS only, and may get confused with unsolicited
 696  *       responses.  So, we shouldn't use it for normal operation from the
 697  *       driver.
 698  *       I left the codes, however, for debugging/testing purposes.
 699  */
 700
 701 /* receive a response */
 702 static int azx_single_wait_for_response(struct azx *chip, unsigned int addr)
 703 {
 704         int timeout = 50;
 705
 706         while (timeout--) {
 707                 /* check IRV busy bit */
 708                 if (azx_readw(chip, IRS) & AZX_IRS_VALID) {
 709                         /* reuse rirb.res as the response return value */
 710                         azx_bus(chip)->rirb.res[addr] = azx_readl(chip, IR);
 711                         return 0;
 712                 }
 713                 udelay(1);
 714         }
 715         if (printk_ratelimit())
 716                 dev_dbg(chip->card->dev, "get_response timeout: IRS=0x%x\n",
 717                         azx_readw(chip, IRS));
 718         azx_bus(chip)->rirb.res[addr] = -1;
 719         return -EIO;
 720 }
 721
 722 /* send a command */
 723 static int azx_single_send_cmd(struct hdac_bus *bus, u32 val)
 724 {
 725         struct azx *chip = bus_to_azx(bus);
 726         unsigned int addr = azx_command_addr(val);
 727         int timeout = 50;
 728
 729         bus->last_cmd[azx_command_addr(val)] = val;
 730         while (timeout--) {
 731                 /* check ICB busy bit */
 732                 if (!((azx_readw(chip, IRS) & AZX_IRS_BUSY))) {
 733                         /* Clear IRV valid bit */
 734                         azx_writew(chip, IRS, azx_readw(chip, IRS) |
 735                                    AZX_IRS_VALID);
 736                         azx_writel(chip, IC, val);
 737                         azx_writew(chip, IRS, azx_readw(chip, IRS) |
 738                                    AZX_IRS_BUSY);
 739                         return azx_single_wait_for_response(chip, addr);
 740                 }
 741                 udelay(1);
 742         }
 743         if (printk_ratelimit())
 744                 dev_dbg(chip->card->dev,
 745                         "send_cmd timeout: IRS=0x%x, val=0x%x\n",
 746                         azx_readw(chip, IRS), val);
 747         return -EIO;
 748 }
 749
 750 /* receive a response */
 751 static int azx_single_get_response(struct hdac_bus *bus, unsigned int addr,
 752                                    unsigned int *res)
 753 {
 754         if (res)
 755                 *res = bus->rirb.res[addr];
 756         return 0;
 757 }
 758
 759 /*
 760  * The below are the main callbacks from hda_codec.
 761  *
 762  * They are just the skeleton to call sub-callbacks according to the
 763  * current setting of chip->single_cmd.
 764  */
 765
 766 /* send a command */
 767 static int azx_send_cmd(struct hdac_bus *bus, unsigned int val)
 768 {
 769         struct azx *chip = bus_to_azx(bus);
 770
 771         if (chip->disabled)
 772                 return 0;
 773         if (chip->single_cmd)
 774                 return azx_single_send_cmd(bus, val);
 775         else
 776                 return snd_hdac_bus_send_cmd(bus, val);
 777 }
 778
 779 /* get a response */
 780 static int azx_get_response(struct hdac_bus *bus, unsigned int addr,
 781                             unsigned int *res)
 782 {
 783         struct azx *chip = bus_to_azx(bus);
 784
 785         if (chip->disabled)
 786                 return 0;
 787         if (chip->single_cmd)
 788                 return azx_single_get_response(bus, addr, res);
 789         else
 790                 return azx_rirb_get_response(bus, addr, res);
 791 }
 792
 793 static const struct hdac_bus_ops bus_core_ops = {
 794         .command = azx_send_cmd,
 795         .get_response = azx_get_response,
 796 };
 797
 798 #ifdef CONFIG_SND_HDA_DSP_LOADER
 799 /*
 800  * DSP loading code (e.g. for CA0132)
 801  */
 802
 803 /* use the first stream for loading DSP */
 804 static struct azx_dev *
 805 azx_get_dsp_loader_dev(struct azx *chip)
 806 {
 807         struct hdac_bus *bus = azx_bus(chip);
 808         struct hdac_stream *s;
 809
 810         list_for_each_entry(s, &bus->stream_list, list)
 811                 if (s->index == chip->playback_index_offset)
 812                         return stream_to_azx_dev(s);
 813
 814         return NULL;
 815 }
 816
 817 int snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
 818                                    unsigned int byte_size,
 819                                    struct snd_dma_buffer *bufp)
 820 {
 821         struct hdac_bus *bus = &codec->bus->core;
 822         struct azx *chip = bus_to_azx(bus);
 823         struct azx_dev *azx_dev;
 824         struct hdac_stream *hstr;
 825         bool saved = false;
 826         int err;
 827
 828         azx_dev = azx_get_dsp_loader_dev(chip);
 829         hstr = azx_stream(azx_dev);
 830         spin_lock_irq(&bus->reg_lock);
 831         if (hstr->opened) {
 832                 chip->saved_azx_dev = *azx_dev;
 833                 saved = true;
 834         }
 835         spin_unlock_irq(&bus->reg_lock);
 836
 837         err = snd_hdac_dsp_prepare(hstr, format, byte_size, bufp);
 838         if (err < 0) {
 839                 spin_lock_irq(&bus->reg_lock);
 840                 if (saved)
 841                         *azx_dev = chip->saved_azx_dev;
 842                 spin_unlock_irq(&bus->reg_lock);
 843                 return err;
 844         }
 845
 846         azx_dev->prepared = 0;
 847         return err;
 848 }
 849 EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_prepare);
 850
 851 void snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start)
 852 {
 853         struct hdac_bus *bus = &codec->bus->core;
 854         struct azx *chip = bus_to_azx(bus);
 855         struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);
 856
 857         snd_hdac_dsp_trigger(azx_stream(azx_dev), start);
 858 }
 859 EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_trigger);
 860
 861 void snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
 862                                     struct snd_dma_buffer *dmab)
 863 {
 864         struct hdac_bus *bus = &codec->bus->core;
 865         struct azx *chip = bus_to_azx(bus);
 866         struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip);
 867         struct hdac_stream *hstr = azx_stream(azx_dev);
 868
 869         if (!dmab->area || !hstr->locked)
 870                 return;
 871
 872         snd_hdac_dsp_cleanup(hstr, dmab);
 873         spin_lock_irq(&bus->reg_lock);
 874         if (hstr->opened)
 875                 *azx_dev = chip->saved_azx_dev;
 876         hstr->locked = false;
 877         spin_unlock_irq(&bus->reg_lock);
 878 }
 879 EXPORT_SYMBOL_GPL(snd_hda_codec_load_dsp_cleanup);
 880 #endif /* CONFIG_SND_HDA_DSP_LOADER */
 881
 882 /*
 883  * reset and start the controller registers
 884  */
 885 void azx_init_chip(struct azx *chip, bool full_reset)
 886 {
 887         if (snd_hdac_bus_init_chip(azx_bus(chip), full_reset)) {
 888                 /* correct RINTCNT for CXT */
 889                 if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND)
 890                         azx_writew(chip, RINTCNT, 0xc0);
 891         }
 892 }
 893 EXPORT_SYMBOL_GPL(azx_init_chip);
 894
 895 void azx_stop_all_streams(struct azx *chip)
 896 {
 897         struct hdac_bus *bus = azx_bus(chip);
 898         struct hdac_stream *s;
 899
 900         list_for_each_entry(s, &bus->stream_list, list)
 901                 snd_hdac_stream_stop(s);
 902 }
 903 EXPORT_SYMBOL_GPL(azx_stop_all_streams);
 904
 905 void azx_stop_chip(struct azx *chip)
 906 {
 907         snd_hdac_bus_stop_chip(azx_bus(chip));
 908 }
 909 EXPORT_SYMBOL_GPL(azx_stop_chip);
 910
 911 /*
 912  * interrupt handler
 913  */
 914 static void stream_update(struct hdac_bus *bus, struct hdac_stream *s)
 915 {
 916         struct azx *chip = bus_to_azx(bus);
 917         struct azx_dev *azx_dev = stream_to_azx_dev(s);
 918
 919         /* check whether this IRQ is really acceptable */
 920         if (!chip->ops->position_check ||
 921             chip->ops->position_check(chip, azx_dev)) {
 922                 spin_unlock(&bus->reg_lock);
 923                 snd_pcm_period_elapsed(azx_stream(azx_dev)->substream);
 924                 spin_lock(&bus->reg_lock);
 925         }
 926 }
 927
 928 irqreturn_t azx_interrupt(int irq, void *dev_id)
 929 {
 930         struct azx *chip = dev_id;
 931         struct hdac_bus *bus = azx_bus(chip);
 932         u32 status;
 933
 934 #ifdef CONFIG_PM
 935         if (azx_has_pm_runtime(chip))
 936                 if (!pm_runtime_active(chip->card->dev))
 937                         return IRQ_NONE;
 938 #endif
 939
 940         spin_lock(&bus->reg_lock);
 941
 942         if (chip->disabled) {
 943                 spin_unlock(&bus->reg_lock);
 944                 return IRQ_NONE;
 945         }
 946
 947         status = azx_readl(chip, INTSTS);
 948         if (status == 0 || status == 0xffffffff) {
 949                 spin_unlock(&bus->reg_lock);
 950                 return IRQ_NONE;
 951         }
 952
 953         snd_hdac_bus_handle_stream_irq(bus, status, stream_update);
 954
 955         /* clear rirb int */
 956         status = azx_readb(chip, RIRBSTS);
 957         if (status & RIRB_INT_MASK) {
 958                 if (status & RIRB_INT_RESPONSE) {
 959                         if (chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY)
 960                                 udelay(80);
 961                         snd_hdac_bus_update_rirb(bus);
 962                 }
 963                 azx_writeb(chip, RIRBSTS, RIRB_INT_MASK);
 964         }
 965
 966         spin_unlock(&bus->reg_lock);
 967
 968         return IRQ_HANDLED;
 969 }
 970 EXPORT_SYMBOL_GPL(azx_interrupt);
 971
 972 /*
 973  * Codec initerface
 974  */
 975
 976 /*
 977  * Probe the given codec address
 978  */
 979 static int probe_codec(struct azx *chip, int addr)
 980 {
 981         unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
 982                 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
 983         struct hdac_bus *bus = azx_bus(chip);
 984         int err;
 985         unsigned int res = -1;
 986
 987         mutex_lock(&bus->cmd_mutex);
 988         chip->probing = 1;
 989         azx_send_cmd(bus, cmd);
 990         err = azx_get_response(bus, addr, &res);
 991         chip->probing = 0;
 992         mutex_unlock(&bus->cmd_mutex);
 993         if (err < 0 || res == -1)
 994                 return -EIO;
 995         dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr);
 996         return 0;
 997 }
 998
 999 void snd_hda_bus_reset(struct hda_bus *bus)
1000 {
1001         struct azx *chip = bus_to_azx(&bus->core);
1002
1003         bus->in_reset = 1;
1004         azx_stop_chip(chip);
1005         azx_init_chip(chip, true);
1006         if (bus->core.chip_init)
1007                 snd_hda_bus_reset_codecs(bus);
1008         bus->in_reset = 0;
1009 }
1010
1011 static int get_jackpoll_interval(struct azx *chip)
1012 {
1013         int i;
1014         unsigned int j;
1015
1016         if (!chip->jackpoll_ms)
1017                 return 0;
1018
1019         i = chip->jackpoll_ms[chip->dev_index];
1020         if (i == 0)
1021                 return 0;
1022         if (i < 50 || i > 60000)
1023                 j = 0;
1024         else
1025                 j = msecs_to_jiffies(i);
1026         if (j == 0)
1027                 dev_warn(chip->card->dev,
1028                          "jackpoll_ms value out of range: %d\n", i);
1029         return j;
1030 }
1031
1032 /* HD-audio bus initialization */
1033 int azx_bus_init(struct azx *chip, const char *model,
1034                  const struct hdac_io_ops *io_ops)
1035 {
1036         struct hda_bus *bus = &chip->bus;
1037         int err;
1038
1039         err = snd_hdac_bus_init(&bus->core, chip->card->dev, &bus_core_ops,
1040                                 io_ops);
1041         if (err < 0)
1042                 return err;
1043
1044         bus->card = chip->card;
1045         mutex_init(&bus->prepare_mutex);
1046         bus->pci = chip->pci;
1047         bus->modelname = model;
1048         bus->core.snoop = azx_snoop(chip);
1049         if (chip->get_position[0] != azx_get_pos_lpib ||
1050             chip->get_position[1] != azx_get_pos_lpib)
1051                 bus->core.use_posbuf = true;
1052         if (chip->bdl_pos_adj)
1053                 bus->core.bdl_pos_adj = chip->bdl_pos_adj[chip->dev_index];
1054         if (chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)
1055                 bus->core.corbrp_self_clear = true;
1056
1057         if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) {
1058                 dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
1059                 bus->needs_damn_long_delay = 1;
1060         }
1061
1062         /* AMD chipsets often cause the communication stalls upon certain
1063          * sequence like the pin-detection.  It seems that forcing the synced
1064          * access works around the stall.  Grrr...
1065          */
1066         if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) {
1067                 dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n");
1068                 bus->core.sync_write = 1;
1069                 bus->allow_bus_reset = 1;
1070         }
1071
1072         return 0;
1073 }
1074 EXPORT_SYMBOL_GPL(azx_bus_init);
1075
1076 /* Probe codecs */
1077 int azx_probe_codecs(struct azx *chip, unsigned int max_slots)
1078 {
1079         struct hdac_bus *bus = azx_bus(chip);
1080         int c, codecs, err;
1081
1082         codecs = 0;
1083         if (!max_slots)
1084                 max_slots = AZX_DEFAULT_CODECS;
1085
1086         /* First try to probe all given codec slots */
1087         for (c = 0; c < max_slots; c++) {
1088                 if ((bus->codec_mask & (1 << c)) & chip->codec_probe_mask) {
1089                         if (probe_codec(chip, c) < 0) {
1090                                 /* Some BIOSen give you wrong codec addresses
1091                                  * that don't exist
1092                                  */
1093                                 dev_warn(chip->card->dev,
1094                                          "Codec #%d probe error; disabling it...\n", c);
1095                                 bus->codec_mask &= ~(1 << c);
1096                                 /* More badly, accessing to a non-existing
1097                                  * codec often screws up the controller chip,
1098                                  * and disturbs the further communications.
1099                                  * Thus if an error occurs during probing,
1100                                  * better to reset the controller chip to
1101                                  * get back to the sanity state.
1102                                  */
1103                                 azx_stop_chip(chip);
1104                                 azx_init_chip(chip, true);
1105                         }
1106                 }
1107         }
1108
1109         /* Then create codec instances */
1110         for (c = 0; c < max_slots; c++) {
1111                 if ((bus->codec_mask & (1 << c)) & chip->codec_probe_mask) {
1112                         struct hda_codec *codec;
1113                         err = snd_hda_codec_new(&chip->bus, chip->card, c, &codec);
1114                         if (err < 0)
1115                                 continue;
1116                         codec->jackpoll_interval = get_jackpoll_interval(chip);
1117                         codec->beep_mode = chip->beep_mode;
1118                         codecs++;
1119                 }
1120         }
1121         if (!codecs) {
1122                 dev_err(chip->card->dev, "no codecs initialized\n");
1123                 return -ENXIO;
1124         }
1125         return 0;
1126 }
1127 EXPORT_SYMBOL_GPL(azx_probe_codecs);
1128
1129 /* configure each codec instance */
1130 int azx_codec_configure(struct azx *chip)
1131 {
1132         struct hda_codec *codec;
1133         list_for_each_codec(codec, &chip->bus) {
1134                 snd_hda_codec_configure(codec);
1135         }
1136         return 0;
1137 }
1138 EXPORT_SYMBOL_GPL(azx_codec_configure);
1139
1140 static int stream_direction(struct azx *chip, unsigned char index)
1141 {
1142         if (index >= chip->capture_index_offset &&
1143             index < chip->capture_index_offset + chip->capture_streams)
1144                 return SNDRV_PCM_STREAM_CAPTURE;
1145         return SNDRV_PCM_STREAM_PLAYBACK;
1146 }
1147
1148 /* initialize SD streams */
1149 int azx_init_streams(struct azx *chip)
1150 {
1151         int i;
1152         int stream_tags[2] = { 0, 0 };
1153
1154         /* initialize each stream (aka device)
1155          * assign the starting bdl address to each stream (device)
1156          * and initialize
1157          */
1158         for (i = 0; i < chip->num_streams; i++) {
1159                 struct azx_dev *azx_dev = kzalloc(sizeof(*azx_dev), GFP_KERNEL);
1160                 int dir, tag;
1161
1162                 if (!azx_dev)
1163                         return -ENOMEM;
1164
1165                 dir = stream_direction(chip, i);
1166                 /* stream tag must be unique throughout
1167                  * the stream direction group,
1168                  * valid values 1...15
1169                  * use separate stream tag if the flag
1170                  * AZX_DCAPS_SEPARATE_STREAM_TAG is used
1171                  */
1172                 if (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG)
1173                         tag = ++stream_tags[dir];
1174                 else
1175                         tag = i + 1;
1176                 snd_hdac_stream_init(azx_bus(chip), azx_stream(azx_dev),
1177                                      i, dir, tag);
1178         }
1179
1180         return 0;
1181 }
1182 EXPORT_SYMBOL_GPL(azx_init_streams);
1183
1184 void azx_free_streams(struct azx *chip)
1185 {
1186         struct hdac_bus *bus = azx_bus(chip);
1187         struct hdac_stream *s;
1188
1189         while (!list_empty(&bus->stream_list)) {
1190                 s = list_first_entry(&bus->stream_list, struct hdac_stream, list);
1191                 list_del(&s->list);
1192                 kfree(stream_to_azx_dev(s));
1193         }
1194 }
1195 EXPORT_SYMBOL_GPL(azx_free_streams);