1 //===-- XCoreFrameLowering.cpp - Frame info for XCore Target --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains XCore frame information that doesn't fit anywhere else
13 //===----------------------------------------------------------------------===//
15 #include "XCoreFrameLowering.h"
17 #include "XCoreInstrInfo.h"
18 #include "XCoreMachineFunctionInfo.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/CodeGen/RegisterScavenging.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/Support/ErrorHandling.h"
28 #include "llvm/Target/TargetOptions.h"
32 // helper functions. FIXME: Eliminate.
33 static inline bool isImmUs(unsigned val) {
37 static inline bool isImmU6(unsigned val) {
38 return val < (1 << 6);
41 static inline bool isImmU16(unsigned val) {
42 return val < (1 << 16);
45 static void loadFromStack(MachineBasicBlock &MBB,
46 MachineBasicBlock::iterator I,
47 unsigned DstReg, int Offset, DebugLoc dl,
48 const TargetInstrInfo &TII) {
49 assert(Offset%4 == 0 && "Misaligned stack offset");
51 bool isU6 = isImmU6(Offset);
52 if (!isU6 && !isImmU16(Offset))
53 report_fatal_error("loadFromStack offset too big " + Twine(Offset));
54 int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6;
55 BuildMI(MBB, I, dl, TII.get(Opcode), DstReg)
60 static void storeToStack(MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator I,
62 unsigned SrcReg, int Offset, DebugLoc dl,
63 const TargetInstrInfo &TII) {
64 assert(Offset%4 == 0 && "Misaligned stack offset");
66 bool isU6 = isImmU6(Offset);
67 if (!isU6 && !isImmU16(Offset))
68 report_fatal_error("storeToStack offset too big " + Twine(Offset));
69 int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
70 BuildMI(MBB, I, dl, TII.get(Opcode))
76 //===----------------------------------------------------------------------===//
77 // XCoreFrameLowering:
78 //===----------------------------------------------------------------------===//
80 XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
81 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
85 bool XCoreFrameLowering::hasFP(const MachineFunction &MF) const {
86 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
87 MF.getFrameInfo()->hasVarSizedObjects();
90 void XCoreFrameLowering::emitPrologue(MachineFunction &MF) const {
91 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
92 MachineBasicBlock::iterator MBBI = MBB.begin();
93 MachineFrameInfo *MFI = MF.getFrameInfo();
94 MachineModuleInfo *MMI = &MF.getMMI();
95 const XCoreInstrInfo &TII =
96 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
97 XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
98 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
101 const AttributeSet &PAL = MF.getFunction()->getAttributes();
103 if (PAL.hasAttrSomewhere(Attribute::Nest))
104 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
106 // Work out frame sizes.
107 int FrameSize = MFI->getStackSize();
108 assert(FrameSize%4 == 0 && "Misaligned frame size");
111 bool isU6 = isImmU6(FrameSize);
113 if (!isU6 && !isImmU16(FrameSize)) {
114 // FIXME could emit multiple instructions.
115 report_fatal_error("emitPrologue Frame size too big: " + Twine(FrameSize));
117 bool emitFrameMoves = XCoreRegisterInfo::needsFrameMoves(MF);
119 bool saveLR = XFI->getUsesLR();
120 // Do we need to allocate space on the stack?
122 bool LRSavedOnEntry = false;
124 if (saveLR && (MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0)) {
125 Opcode = (isU6) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6;
126 MBB.addLiveIn(XCore::LR);
128 LRSavedOnEntry = true;
130 Opcode = (isU6) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
132 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
134 if (emitFrameMoves) {
136 // Show update of SP.
137 MCSymbol *FrameLabel = MMI->getContext().CreateTempSymbol();
138 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
140 MachineLocation SPDst(MachineLocation::VirtualFP);
141 MachineLocation SPSrc(MachineLocation::VirtualFP, -FrameSize * 4);
142 MMI->addFrameMove(FrameLabel, SPDst, SPSrc);
144 if (LRSavedOnEntry) {
145 MachineLocation CSDst(MachineLocation::VirtualFP, 0);
146 MachineLocation CSSrc(XCore::LR);
147 MMI->addFrameMove(FrameLabel, CSDst, CSSrc);
152 int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
153 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII);
154 MBB.addLiveIn(XCore::LR);
156 if (emitFrameMoves) {
157 MCSymbol *SaveLRLabel = MMI->getContext().CreateTempSymbol();
158 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel);
159 MachineLocation CSDst(MachineLocation::VirtualFP, LRSpillOffset);
160 MachineLocation CSSrc(XCore::LR);
161 MMI->addFrameMove(SaveLRLabel, CSDst, CSSrc);
166 // Save R10 to the stack.
167 int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
168 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII);
169 // R10 is live-in. It is killed at the spill.
170 MBB.addLiveIn(XCore::R10);
171 if (emitFrameMoves) {
172 MCSymbol *SaveR10Label = MMI->getContext().CreateTempSymbol();
173 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveR10Label);
174 MachineLocation CSDst(MachineLocation::VirtualFP, FPSpillOffset);
175 MachineLocation CSSrc(XCore::R10);
176 MMI->addFrameMove(SaveR10Label, CSDst, CSSrc);
178 // Set the FP from the SP.
179 unsigned FramePtr = XCore::R10;
180 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr)
182 if (emitFrameMoves) {
183 // Show FP is now valid.
184 MCSymbol *FrameLabel = MMI->getContext().CreateTempSymbol();
185 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel);
186 MachineLocation SPDst(FramePtr);
187 MachineLocation SPSrc(MachineLocation::VirtualFP);
188 MMI->addFrameMove(FrameLabel, SPDst, SPSrc);
192 if (emitFrameMoves) {
193 // Frame moves for callee saved.
194 std::vector<std::pair<MCSymbol*, CalleeSavedInfo> >&SpillLabels =
195 XFI->getSpillLabels();
196 for (unsigned I = 0, E = SpillLabels.size(); I != E; ++I) {
197 MCSymbol *SpillLabel = SpillLabels[I].first;
198 CalleeSavedInfo &CSI = SpillLabels[I].second;
199 int Offset = MFI->getObjectOffset(CSI.getFrameIdx());
200 unsigned Reg = CSI.getReg();
201 MachineLocation CSDst(MachineLocation::VirtualFP, Offset);
202 MachineLocation CSSrc(Reg);
203 MMI->addFrameMove(SpillLabel, CSDst, CSSrc);
208 void XCoreFrameLowering::emitEpilogue(MachineFunction &MF,
209 MachineBasicBlock &MBB) const {
210 MachineFrameInfo *MFI = MF.getFrameInfo();
211 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
212 const XCoreInstrInfo &TII =
213 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
214 XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
215 DebugLoc dl = MBBI->getDebugLoc();
219 // Restore the stack pointer.
220 unsigned FramePtr = XCore::R10;
221 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r))
225 // Work out frame sizes.
226 int FrameSize = MFI->getStackSize();
228 assert(FrameSize%4 == 0 && "Misaligned frame size");
232 bool isU6 = isImmU6(FrameSize);
234 if (!isU6 && !isImmU16(FrameSize)) {
235 // FIXME could emit multiple instructions.
236 report_fatal_error("emitEpilogue Frame size too big: " + Twine(FrameSize));
241 int FPSpillOffset = MFI->getObjectOffset(XFI->getFPSpillSlot());
242 FPSpillOffset += FrameSize*4;
243 loadFromStack(MBB, MBBI, XCore::R10, FPSpillOffset, dl, TII);
246 bool restoreLR = XFI->getUsesLR();
248 (FrameSize == 0 || MFI->getObjectOffset(XFI->getLRSpillSlot()) != 0)) {
249 int LRSpillOffset = MFI->getObjectOffset(XFI->getLRSpillSlot());
250 LRSpillOffset += FrameSize*4;
251 loadFromStack(MBB, MBBI, XCore::LR, LRSpillOffset, dl, TII);
257 // Fold prologue into return instruction
258 assert(MFI->getObjectOffset(XFI->getLRSpillSlot()) == 0);
259 assert(MBBI->getOpcode() == XCore::RETSP_u6
260 || MBBI->getOpcode() == XCore::RETSP_lu6);
261 int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6;
262 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize);
265 int Opcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
266 BuildMI(MBB, MBBI, dl, TII.get(Opcode), XCore::SP).addImm(FrameSize);
271 bool XCoreFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
272 MachineBasicBlock::iterator MI,
273 const std::vector<CalleeSavedInfo> &CSI,
274 const TargetRegisterInfo *TRI) const {
278 MachineFunction *MF = MBB.getParent();
279 const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
281 XCoreFunctionInfo *XFI = MF->getInfo<XCoreFunctionInfo>();
282 bool emitFrameMoves = XCoreRegisterInfo::needsFrameMoves(*MF);
285 if (MI != MBB.end()) DL = MI->getDebugLoc();
287 for (std::vector<CalleeSavedInfo>::const_iterator it = CSI.begin();
288 it != CSI.end(); ++it) {
289 // Add the callee-saved register as live-in. It's killed at the spill.
290 MBB.addLiveIn(it->getReg());
292 unsigned Reg = it->getReg();
293 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
294 TII.storeRegToStackSlot(MBB, MI, Reg, true,
295 it->getFrameIdx(), RC, TRI);
296 if (emitFrameMoves) {
297 MCSymbol *SaveLabel = MF->getContext().CreateTempSymbol();
298 BuildMI(MBB, MI, DL, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLabel);
299 XFI->getSpillLabels().push_back(std::make_pair(SaveLabel, *it));
305 bool XCoreFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
306 MachineBasicBlock::iterator MI,
307 const std::vector<CalleeSavedInfo> &CSI,
308 const TargetRegisterInfo *TRI) const{
309 MachineFunction *MF = MBB.getParent();
310 const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
312 bool AtStart = MI == MBB.begin();
313 MachineBasicBlock::iterator BeforeI = MI;
316 for (std::vector<CalleeSavedInfo>::const_iterator it = CSI.begin();
317 it != CSI.end(); ++it) {
318 unsigned Reg = it->getReg();
319 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
320 TII.loadRegFromStackSlot(MBB, MI, it->getReg(), it->getFrameIdx(),
322 assert(MI != MBB.begin() &&
323 "loadRegFromStackSlot didn't insert any code!");
324 // Insert in reverse order. loadRegFromStackSlot can insert multiple
336 // This function eliminates ADJCALLSTACKDOWN,
337 // ADJCALLSTACKUP pseudo instructions
338 void XCoreFrameLowering::
339 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
340 MachineBasicBlock::iterator I) const {
341 const XCoreInstrInfo &TII =
342 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
343 if (!hasReservedCallFrame(MF)) {
344 // Turn the adjcallstackdown instruction into 'extsp <amt>' and the
345 // adjcallstackup instruction into 'ldaw sp, sp[<amt>]'
346 MachineInstr *Old = I;
347 uint64_t Amount = Old->getOperand(0).getImm();
349 // We need to keep the stack aligned properly. To do this, we round the
350 // amount of space needed for the outgoing arguments up to the next
351 // alignment boundary.
352 unsigned Align = getStackAlignment();
353 Amount = (Amount+Align-1)/Align*Align;
355 assert(Amount%4 == 0);
358 bool isU6 = isImmU6(Amount);
359 if (!isU6 && !isImmU16(Amount)) {
360 // FIX could emit multiple instructions in this case.
362 errs() << "eliminateCallFramePseudoInstr size too big: "
369 if (Old->getOpcode() == XCore::ADJCALLSTACKDOWN) {
370 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6;
371 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode))
374 assert(Old->getOpcode() == XCore::ADJCALLSTACKUP);
375 int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6;
376 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Opcode), XCore::SP)
380 // Replace the pseudo instruction with a new instruction...
389 XCoreFrameLowering::processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
390 RegScavenger *RS) const {
391 MachineFrameInfo *MFI = MF.getFrameInfo();
392 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
393 bool LRUsed = MF.getRegInfo().isPhysRegUsed(XCore::LR);
394 const TargetRegisterClass *RC = &XCore::GRRegsRegClass;
395 XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>();
397 MF.getRegInfo().setPhysRegUnused(XCore::LR);
399 bool isVarArg = MF.getFunction()->isVarArg();
402 // A fixed offset of 0 allows us to save / restore LR using entsp / retsp.
403 FrameIdx = MFI->CreateFixedObject(RC->getSize(), 0, true);
405 FrameIdx = MFI->CreateStackObject(RC->getSize(), RC->getAlignment(),
408 XFI->setUsesLR(FrameIdx);
409 XFI->setLRSpillSlot(FrameIdx);
411 if (RegInfo->requiresRegisterScavenging(MF)) {
412 // Reserve a slot close to SP or frame pointer.
413 RS->addScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
418 // A callee save register is used to hold the FP.
419 // This needs saving / restoring in the epilogue / prologue.
420 XFI->setFPSpillSlot(MFI->CreateStackObject(RC->getSize(),