1 //===------- X86ExpandPseudo.cpp - Expand pseudo instructions -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that expands pseudo instructions into target
11 // instructions to allow proper scheduling, if-conversion, other late
12 // optimizations, or simply the encoding of the instructions.
14 //===----------------------------------------------------------------------===//
17 #include "X86FrameLowering.h"
18 #include "X86InstrBuilder.h"
19 #include "X86InstrInfo.h"
20 #include "X86MachineFunctionInfo.h"
21 #include "X86Subtarget.h"
22 #include "llvm/CodeGen/Passes.h" // For IDs of passes that are preserved.
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/IR/GlobalValue.h"
28 #define DEBUG_TYPE "x86-pseudo"
31 class X86ExpandPseudo : public MachineFunctionPass {
34 X86ExpandPseudo() : MachineFunctionPass(ID) {}
36 void getAnalysisUsage(AnalysisUsage &AU) const override {
38 AU.addPreservedID(MachineLoopInfoID);
39 AU.addPreservedID(MachineDominatorsID);
40 MachineFunctionPass::getAnalysisUsage(AU);
43 const X86Subtarget *STI;
44 const X86InstrInfo *TII;
45 const X86RegisterInfo *TRI;
46 const X86FrameLowering *X86FL;
48 bool runOnMachineFunction(MachineFunction &Fn) override;
50 const char *getPassName() const override {
51 return "X86 pseudo instruction expansion pass";
55 bool ExpandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
56 bool ExpandMBB(MachineBasicBlock &MBB);
58 char X86ExpandPseudo::ID = 0;
59 } // End anonymous namespace.
61 /// If \p MBBI is a pseudo instruction, this method expands
62 /// it to the corresponding (sequence of) actual instruction(s).
63 /// \returns true if \p MBBI has been expanded.
64 bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
65 MachineBasicBlock::iterator MBBI) {
66 MachineInstr &MI = *MBBI;
67 unsigned Opcode = MI.getOpcode();
68 DebugLoc DL = MBBI->getDebugLoc();
75 case X86::TCRETURNdi64:
76 case X86::TCRETURNri64:
77 case X86::TCRETURNmi64: {
78 bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;
79 MachineOperand &JumpTarget = MBBI->getOperand(0);
80 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
81 assert(StackAdjust.isImm() && "Expecting immediate value.");
83 // Adjust stack pointer.
84 int StackAdj = StackAdjust.getImm();
87 bool Is64Bit = STI->is64Bit();
88 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
89 const bool Uses64BitFramePtr =
90 STI->isTarget64BitLP64() || STI->isTargetNaCl64();
91 // Check if we should use LEA for SP.
92 const X86FrameLowering *TFI = STI->getFrameLowering();
93 bool UseLEAForSP = STI->useLeaForSP() &&
94 X86FL->canUseLEAForSPInEpilogue(*MBB.getParent());
95 unsigned StackPtr = TRI->getStackRegister();
96 // Check for possible merge with preceding ADD instruction.
97 StackAdj += TFI->mergeSPUpdates(MBB, MBBI, StackPtr, true);
98 TFI->emitSPUpdate(MBB, MBBI, StackPtr, StackAdj, Is64Bit,
99 Uses64BitFramePtr, UseLEAForSP, *TII, *TRI);
102 // Jump to label or value in register.
103 bool IsWin64 = STI->isTargetWin64();
104 if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) {
105 unsigned Op = (Opcode == X86::TCRETURNdi)
107 : (IsWin64 ? X86::TAILJMPd64_REX : X86::TAILJMPd64);
108 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
109 if (JumpTarget.isGlobal())
110 MIB.addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset(),
111 JumpTarget.getTargetFlags());
113 assert(JumpTarget.isSymbol());
114 MIB.addExternalSymbol(JumpTarget.getSymbolName(),
115 JumpTarget.getTargetFlags());
117 } else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) {
118 unsigned Op = (Opcode == X86::TCRETURNmi)
120 : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);
121 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
122 for (unsigned i = 0; i != 5; ++i)
123 MIB.addOperand(MBBI->getOperand(i));
124 } else if (Opcode == X86::TCRETURNri64) {
125 BuildMI(MBB, MBBI, DL,
126 TII->get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))
127 .addReg(JumpTarget.getReg(), RegState::Kill);
129 BuildMI(MBB, MBBI, DL, TII->get(X86::TAILJMPr))
130 .addReg(JumpTarget.getReg(), RegState::Kill);
133 MachineInstr *NewMI = std::prev(MBBI);
134 NewMI->copyImplicitOps(*MBBI->getParent()->getParent(), MBBI);
136 // Delete the pseudo instruction TCRETURN.
142 case X86::EH_RETURN64: {
143 MachineOperand &DestAddr = MBBI->getOperand(0);
144 assert(DestAddr.isReg() && "Offset should be in register!");
145 const bool Uses64BitFramePtr =
146 STI->isTarget64BitLP64() || STI->isTargetNaCl64();
147 unsigned StackPtr = TRI->getStackRegister();
148 BuildMI(MBB, MBBI, DL,
149 TII->get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), StackPtr)
150 .addReg(DestAddr.getReg());
151 // The EH_RETURN pseudo is really removed during the MC Lowering.
155 llvm_unreachable("Previous switch has a fallthrough?");
158 /// Expand all pseudo instructions contained in \p MBB.
159 /// \returns true if any expansion occurred for \p MBB.
160 bool X86ExpandPseudo::ExpandMBB(MachineBasicBlock &MBB) {
161 bool Modified = false;
163 // MBBI may be invalidated by the expansion.
164 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
166 MachineBasicBlock::iterator NMBBI = std::next(MBBI);
167 Modified |= ExpandMI(MBB, MBBI);
174 bool X86ExpandPseudo::runOnMachineFunction(MachineFunction &MF) {
175 STI = &static_cast<const X86Subtarget &>(MF.getSubtarget());
176 TII = STI->getInstrInfo();
177 TRI = STI->getRegisterInfo();
178 X86FL = STI->getFrameLowering();
180 bool Modified = false;
181 for (MachineBasicBlock &MBB : MF)
182 Modified |= ExpandMBB(MBB);
186 /// Returns an instance of the pseudo instruction expansion pass.
187 FunctionPass *llvm::createX86ExpandPseudoPass() {
188 return new X86ExpandPseudo();