1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "X86FixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCObjectWriter.h"
17 #include "llvm/MC/MCSectionELF.h"
18 #include "llvm/MC/MCSectionMachO.h"
19 #include "llvm/MC/MachObjectWriter.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetRegistry.h"
23 #include "llvm/Target/TargetAsmBackend.h"
28 static unsigned getFixupKindLog2Size(unsigned Kind) {
30 default: assert(0 && "invalid fixup kind!");
31 case X86::reloc_pcrel_1byte:
32 case FK_Data_1: return 0;
33 case FK_Data_2: return 1;
34 case X86::reloc_pcrel_4byte:
35 case X86::reloc_riprel_4byte:
36 case X86::reloc_riprel_4byte_movq_load:
37 case FK_Data_4: return 2;
38 case FK_Data_8: return 3;
42 class X86AsmBackend : public TargetAsmBackend {
44 X86AsmBackend(const Target &T)
45 : TargetAsmBackend(T) {}
47 void ApplyFixup(const MCAsmFixup &Fixup, MCDataFragment &DF,
48 uint64_t Value) const {
49 unsigned Size = 1 << getFixupKindLog2Size(Fixup.Kind);
51 assert(Fixup.Offset + Size <= DF.getContents().size() &&
52 "Invalid fixup offset!");
53 for (unsigned i = 0; i != Size; ++i)
54 DF.getContents()[Fixup.Offset + i] = uint8_t(Value >> (i * 8));
57 bool MayNeedRelaxation(const MCInst &Inst,
58 const SmallVectorImpl<MCAsmFixup> &Fixups) const;
60 void RelaxInstruction(const MCInstFragment *IF, MCInst &Res) const;
62 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
65 static unsigned getRelaxedOpcode(unsigned Op) {
70 case X86::JAE_1: return X86::JAE_4;
71 case X86::JA_1: return X86::JA_4;
72 case X86::JBE_1: return X86::JBE_4;
73 case X86::JB_1: return X86::JB_4;
74 case X86::JE_1: return X86::JE_4;
75 case X86::JGE_1: return X86::JGE_4;
76 case X86::JG_1: return X86::JG_4;
77 case X86::JLE_1: return X86::JLE_4;
78 case X86::JL_1: return X86::JL_4;
80 case X86::JMP_1: return X86::JMP_4;
81 case X86::JNE_1: return X86::JNE_4;
82 case X86::JNO_1: return X86::JNO_4;
83 case X86::JNP_1: return X86::JNP_4;
84 case X86::JNS_1: return X86::JNS_4;
85 case X86::JO_1: return X86::JO_4;
86 case X86::JP_1: return X86::JP_4;
87 case X86::JS_1: return X86::JS_4;
91 bool X86AsmBackend::MayNeedRelaxation(const MCInst &Inst,
92 const SmallVectorImpl<MCAsmFixup> &Fixups) const {
93 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
94 // We don't support relaxing anything else currently. Make sure we error out
95 // if we see a non-constant 1 or 2 byte fixup.
97 // FIXME: We should need to check this here, this is better checked in the
98 // object writer which should be verifying that any final relocations match
99 // the expected fixup. However, that code is more complicated and hasn't
100 // been written yet. See the FIXMEs in MachObjectWriter.cpp.
101 if ((Fixups[i].Kind == FK_Data_1 || Fixups[i].Kind == FK_Data_2) &&
102 !isa<MCConstantExpr>(Fixups[i].Value))
103 report_fatal_error("unexpected small fixup with a non-constant operand!");
105 // Check for a 1byte pcrel fixup, and enforce that we would know how to
106 // relax this instruction.
107 if (unsigned(Fixups[i].Kind) == X86::reloc_pcrel_1byte) {
108 assert(getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode());
116 // FIXME: Can tblgen help at all here to verify there aren't other instructions
118 void X86AsmBackend::RelaxInstruction(const MCInstFragment *IF,
120 // The only relaxations X86 does is from a 1byte pcrel to a 4byte pcrel.
121 unsigned RelaxedOp = getRelaxedOpcode(IF->getInst().getOpcode());
123 if (RelaxedOp == IF->getInst().getOpcode()) {
124 SmallString<256> Tmp;
125 raw_svector_ostream OS(Tmp);
126 IF->getInst().dump_pretty(OS);
127 report_fatal_error("unexpected instruction to relax: " + OS.str());
131 Res.setOpcode(RelaxedOp);
134 /// WriteNopData - Write optimal nops to the output file for the \arg Count
135 /// bytes. This returns the number of bytes written. It may return 0 if
136 /// the \arg Count is more than the maximum optimal nops.
138 /// FIXME this is X86 32-bit specific and should move to a better place.
139 bool X86AsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
140 static const uint8_t Nops[16][16] = {
148 {0x0f, 0x1f, 0x40, 0x00},
149 // nopl 0(%[re]ax,%[re]ax,1)
150 {0x0f, 0x1f, 0x44, 0x00, 0x00},
151 // nopw 0(%[re]ax,%[re]ax,1)
152 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
154 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
155 // nopl 0L(%[re]ax,%[re]ax,1)
156 {0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
157 // nopw 0L(%[re]ax,%[re]ax,1)
158 {0x66, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
159 // nopw %cs:0L(%[re]ax,%[re]ax,1)
160 {0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
161 // nopl 0(%[re]ax,%[re]ax,1)
162 // nopw 0(%[re]ax,%[re]ax,1)
163 {0x0f, 0x1f, 0x44, 0x00, 0x00,
164 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
165 // nopw 0(%[re]ax,%[re]ax,1)
166 // nopw 0(%[re]ax,%[re]ax,1)
167 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
168 0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00},
169 // nopw 0(%[re]ax,%[re]ax,1)
170 // nopl 0L(%[re]ax) */
171 {0x66, 0x0f, 0x1f, 0x44, 0x00, 0x00,
172 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
175 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
176 0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00},
178 // nopl 0L(%[re]ax,%[re]ax,1)
179 {0x0f, 0x1f, 0x80, 0x00, 0x00, 0x00, 0x00,
180 0x0f, 0x1f, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00}
183 // Write an optimal sequence for the first 15 bytes.
184 uint64_t OptimalCount = (Count < 16) ? Count : 15;
185 for (uint64_t i = 0, e = OptimalCount; i != e; i++)
186 OW->Write8(Nops[OptimalCount - 1][i]);
188 // Finish with single byte nops.
189 for (uint64_t i = OptimalCount, e = Count; i != e; ++i)
197 class ELFX86AsmBackend : public X86AsmBackend {
199 ELFX86AsmBackend(const Target &T)
201 HasAbsolutizedSet = true;
202 HasScatteredSymbols = true;
205 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
209 bool isVirtualSection(const MCSection &Section) const {
210 const MCSectionELF &SE = static_cast<const MCSectionELF&>(Section);
211 return SE.getType() == MCSectionELF::SHT_NOBITS;;
215 class ELFX86_32AsmBackend : public ELFX86AsmBackend {
217 ELFX86_32AsmBackend(const Target &T)
218 : ELFX86AsmBackend(T) {}
221 class ELFX86_64AsmBackend : public ELFX86AsmBackend {
223 ELFX86_64AsmBackend(const Target &T)
224 : ELFX86AsmBackend(T) {}
227 class DarwinX86AsmBackend : public X86AsmBackend {
229 DarwinX86AsmBackend(const Target &T)
231 HasAbsolutizedSet = true;
232 HasScatteredSymbols = true;
235 bool isVirtualSection(const MCSection &Section) const {
236 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
237 return (SMO.getType() == MCSectionMachO::S_ZEROFILL ||
238 SMO.getType() == MCSectionMachO::S_GB_ZEROFILL ||
239 SMO.getType() == MCSectionMachO::S_THREAD_LOCAL_ZEROFILL);
243 class DarwinX86_32AsmBackend : public DarwinX86AsmBackend {
245 DarwinX86_32AsmBackend(const Target &T)
246 : DarwinX86AsmBackend(T) {}
248 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
249 return new MachObjectWriter(OS, /*Is64Bit=*/false);
253 class DarwinX86_64AsmBackend : public DarwinX86AsmBackend {
255 DarwinX86_64AsmBackend(const Target &T)
256 : DarwinX86AsmBackend(T) {
257 HasReliableSymbolDifference = true;
260 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
261 return new MachObjectWriter(OS, /*Is64Bit=*/true);
264 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
265 // Temporary labels in the string literals sections require symbols. The
266 // issue is that the x86_64 relocation format does not allow symbol +
267 // offset, and so the linker does not have enough information to resolve the
268 // access to the appropriate atom unless an external relocation is used. For
269 // non-cstring sections, we expect the compiler to use a non-temporary label
270 // for anything that could have an addend pointing outside the symbol.
272 // See <rdar://problem/4765733>.
273 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
274 return SMO.getType() == MCSectionMachO::S_CSTRING_LITERALS;
277 virtual bool isSectionAtomizable(const MCSection &Section) const {
278 const MCSectionMachO &SMO = static_cast<const MCSectionMachO&>(Section);
279 // Fixed sized data sections are uniqued, they cannot be diced into atoms.
280 switch (SMO.getType()) {
284 case MCSectionMachO::S_4BYTE_LITERALS:
285 case MCSectionMachO::S_8BYTE_LITERALS:
286 case MCSectionMachO::S_16BYTE_LITERALS:
287 case MCSectionMachO::S_LITERAL_POINTERS:
288 case MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS:
289 case MCSectionMachO::S_LAZY_SYMBOL_POINTERS:
290 case MCSectionMachO::S_MOD_INIT_FUNC_POINTERS:
291 case MCSectionMachO::S_MOD_TERM_FUNC_POINTERS:
292 case MCSectionMachO::S_INTERPOSING:
300 TargetAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
301 const std::string &TT) {
302 switch (Triple(TT).getOS()) {
304 return new DarwinX86_32AsmBackend(T);
306 return new ELFX86_32AsmBackend(T);
310 TargetAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
311 const std::string &TT) {
312 switch (Triple(TT).getOS()) {
314 return new DarwinX86_64AsmBackend(T);
316 return new ELFX86_64AsmBackend(T);