1 //===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file includes code for rendering MCInst instances as AT&T-style
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
16 #include "X86ATTInstPrinter.h"
17 #include "X86InstComments.h"
18 #include "X86Subtarget.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCAsmInfo.h"
21 #include "llvm/MC/MCExpr.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/Format.h"
24 #include "llvm/Support/FormattedStream.h"
25 #include "X86GenInstrNames.inc"
29 // Include the auto-generated portion of the assembly writer.
30 #define GET_REGINFO_ENUM
31 #include "X86GenRegisterInfo.inc"
32 #define GET_INSTRUCTION_NAME
33 #define PRINT_ALIAS_INSTR
34 #include "X86GenAsmWriter.inc"
36 X86ATTInstPrinter::X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
37 : MCInstPrinter(MAI) {
38 // Initialize the set of available features.
39 setAvailableFeatures(ComputeAvailableFeatures(
40 &TM.getSubtarget<X86Subtarget>()));
43 void X86ATTInstPrinter::printRegName(raw_ostream &OS,
44 unsigned RegNo) const {
45 OS << '%' << getRegisterName(RegNo);
48 void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
49 // Try to print any aliases first.
50 if (!printAliasInstr(MI, OS))
51 printInstruction(MI, OS);
53 // If verbose assembly is enabled, we can print some informative comments.
55 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
58 StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const {
59 return getInstructionName(Opcode);
62 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
64 switch (MI->getOperand(Op).getImm()) {
65 default: assert(0 && "Invalid ssecc argument!");
66 case 0: O << "eq"; break;
67 case 1: O << "lt"; break;
68 case 2: O << "le"; break;
69 case 3: O << "unord"; break;
70 case 4: O << "neq"; break;
71 case 5: O << "nlt"; break;
72 case 6: O << "nle"; break;
73 case 7: O << "ord"; break;
77 /// print_pcrel_imm - This is used to print an immediate value that ends up
78 /// being encoded as a pc-relative value (e.g. for jumps and calls). These
79 /// print slightly differently than normal immediates. For example, a $ is not
81 void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo,
83 const MCOperand &Op = MI->getOperand(OpNo);
85 // Print this as a signed 32-bit value.
86 O << (int)Op.getImm();
88 assert(Op.isExpr() && "unknown pcrel immediate operand");
93 void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
95 const MCOperand &Op = MI->getOperand(OpNo);
97 O << '%' << getRegisterName(Op.getReg());
98 } else if (Op.isImm()) {
99 O << '$' << Op.getImm();
101 if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
102 *CommentStream << format("imm = 0x%llX\n", (long long)Op.getImm());
105 assert(Op.isExpr() && "unknown operand kind in printOperand");
106 O << '$' << *Op.getExpr();
110 void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
112 const MCOperand &BaseReg = MI->getOperand(Op);
113 const MCOperand &IndexReg = MI->getOperand(Op+2);
114 const MCOperand &DispSpec = MI->getOperand(Op+3);
115 const MCOperand &SegReg = MI->getOperand(Op+4);
117 // If this has a segment register, print it.
118 if (SegReg.getReg()) {
119 printOperand(MI, Op+4, O);
123 if (DispSpec.isImm()) {
124 int64_t DispVal = DispSpec.getImm();
125 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
128 assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
129 O << *DispSpec.getExpr();
132 if (IndexReg.getReg() || BaseReg.getReg()) {
134 if (BaseReg.getReg())
135 printOperand(MI, Op, O);
137 if (IndexReg.getReg()) {
139 printOperand(MI, Op+2, O);
140 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
142 O << ',' << ScaleVal;