1 //===-- X86AsmParser.cpp - Parse X86 assembly to MCInst instructions ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "llvm/ADT/SmallVector.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/MC/MCAsmLexer.h"
14 #include "llvm/MC/MCAsmParser.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCInst.h"
17 #include "llvm/Support/SourceMgr.h"
18 #include "llvm/Target/TargetRegistry.h"
19 #include "llvm/Target/TargetAsmParser.h"
25 class X86ATTAsmParser : public TargetAsmParser {
29 MCAsmParser &getParser() const { return Parser; }
31 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
33 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
35 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
37 bool ParseRegister(X86Operand &Op);
39 bool ParseOperand(X86Operand &Op);
41 bool ParseMemOperand(X86Operand &Op);
43 /// @name Auto-generated Match Functions
46 bool MatchInstruction(SmallVectorImpl<X86Operand> &Operands,
49 /// MatchRegisterName - Match the given string to a register name, or 0 if
50 /// there is no match.
51 unsigned MatchRegisterName(const StringRef &Name);
56 X86ATTAsmParser(const Target &T, MCAsmParser &_Parser)
57 : TargetAsmParser(T), Parser(_Parser) {}
59 virtual bool ParseInstruction(const StringRef &Name, MCInst &Inst);
62 } // end anonymous namespace
67 /// X86Operand - Instances of this class represent a parsed X86 machine
100 StringRef getToken() const {
101 assert(Kind == Token && "Invalid access!");
102 return StringRef(Tok.Data, Tok.Length);
105 unsigned getReg() const {
106 assert(Kind == Register && "Invalid access!");
110 const MCExpr *getImm() const {
111 assert(Kind == Immediate && "Invalid access!");
115 const MCExpr *getMemDisp() const {
116 assert(Kind == Memory && "Invalid access!");
119 unsigned getMemSegReg() const {
120 assert(Kind == Memory && "Invalid access!");
123 unsigned getMemBaseReg() const {
124 assert(Kind == Memory && "Invalid access!");
127 unsigned getMemIndexReg() const {
128 assert(Kind == Memory && "Invalid access!");
131 unsigned getMemScale() const {
132 assert(Kind == Memory && "Invalid access!");
136 bool isToken() const {return Kind == Token; }
138 bool isImm() const { return Kind == Immediate; }
140 bool isImmSExt8() const {
141 // Accept immediates which fit in 8 bits when sign extended, and
142 // non-absolute immediates.
146 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm())) {
147 int64_t Value = CE->getValue();
148 return Value == (int64_t) (int8_t) Value;
154 bool isMem() const { return Kind == Memory; }
156 bool isReg() const { return Kind == Register; }
158 void addRegOperands(MCInst &Inst, unsigned N) const {
159 assert(N == 1 && "Invalid number of operands!");
160 Inst.addOperand(MCOperand::CreateReg(getReg()));
163 void addImmOperands(MCInst &Inst, unsigned N) const {
164 assert(N == 1 && "Invalid number of operands!");
165 Inst.addOperand(MCOperand::CreateExpr(getImm()));
168 void addImmSExt8Operands(MCInst &Inst, unsigned N) const {
169 // FIXME: Support user customization of the render method.
170 assert(N == 1 && "Invalid number of operands!");
171 Inst.addOperand(MCOperand::CreateExpr(getImm()));
174 void addMemOperands(MCInst &Inst, unsigned N) const {
175 assert((N == 4 || N == 5) && "Invalid number of operands!");
177 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
178 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
179 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
180 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
182 // FIXME: What a hack.
184 Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
187 static X86Operand CreateToken(StringRef Str) {
190 Res.Tok.Data = Str.data();
191 Res.Tok.Length = Str.size();
195 static X86Operand CreateReg(unsigned RegNo) {
198 Res.Reg.RegNo = RegNo;
202 static X86Operand CreateImm(const MCExpr *Val) {
204 Res.Kind = Immediate;
209 static X86Operand CreateMem(unsigned SegReg, const MCExpr *Disp,
210 unsigned BaseReg, unsigned IndexReg,
212 // We should never just have a displacement, that would be an immediate.
213 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
215 // The scale should always be one of {1,2,4,8}.
216 assert(((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) &&
220 Res.Mem.SegReg = SegReg;
222 Res.Mem.BaseReg = BaseReg;
223 Res.Mem.IndexReg = IndexReg;
224 Res.Mem.Scale = Scale;
229 } // end anonymous namespace.
232 bool X86ATTAsmParser::ParseRegister(X86Operand &Op) {
233 const AsmToken &TokPercent = getLexer().getTok();
234 assert(TokPercent.is(AsmToken::Percent) && "Invalid token kind!");
235 getLexer().Lex(); // Eat percent token.
237 const AsmToken &Tok = getLexer().getTok();
238 assert(TokPercent.is(AsmToken::Identifier) && "Invalid token kind!");
240 // FIXME: Validate register for the current architecture; we have to do
241 // validation later, so maybe there is no need for this here.
244 RegNo = MatchRegisterName(Tok.getString());
246 return Error(Tok.getLoc(), "invalid register name");
248 Op = X86Operand::CreateReg(RegNo);
249 getLexer().Lex(); // Eat identifier token.
254 bool X86ATTAsmParser::ParseOperand(X86Operand &Op) {
255 switch (getLexer().getKind()) {
257 return ParseMemOperand(Op);
258 case AsmToken::Percent:
259 // FIXME: if a segment register, this could either be just the seg reg, or
260 // the start of a memory operand.
261 return ParseRegister(Op);
262 case AsmToken::Dollar: {
266 if (getParser().ParseExpression(Val))
268 Op = X86Operand::CreateImm(Val);
274 /// ParseMemOperand: segment: disp(basereg, indexreg, scale)
275 bool X86ATTAsmParser::ParseMemOperand(X86Operand &Op) {
276 // FIXME: If SegReg ':' (e.g. %gs:), eat and remember.
279 // We have to disambiguate a parenthesized expression "(4+5)" from the start
280 // of a memory operand with a missing displacement "(%ebx)" or "(,%eax)". The
281 // only way to do this without lookahead is to eat the ( and see what is after
283 const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext());
284 if (getLexer().isNot(AsmToken::LParen)) {
285 if (getParser().ParseExpression(Disp)) return true;
287 // After parsing the base expression we could either have a parenthesized
288 // memory address or not. If not, return now. If so, eat the (.
289 if (getLexer().isNot(AsmToken::LParen)) {
290 // Unless we have a segment register, treat this as an immediate.
292 Op = X86Operand::CreateMem(SegReg, Disp, 0, 0, 1);
294 Op = X86Operand::CreateImm(Disp);
301 // Okay, we have a '('. We don't know if this is an expression or not, but
302 // so we have to eat the ( to see beyond it.
303 getLexer().Lex(); // Eat the '('.
305 if (getLexer().is(AsmToken::Percent) || getLexer().is(AsmToken::Comma)) {
306 // Nothing to do here, fall into the code below with the '(' part of the
307 // memory operand consumed.
309 // It must be an parenthesized expression, parse it now.
310 if (getParser().ParseParenExpression(Disp))
313 // After parsing the base expression we could either have a parenthesized
314 // memory address or not. If not, return now. If so, eat the (.
315 if (getLexer().isNot(AsmToken::LParen)) {
316 // Unless we have a segment register, treat this as an immediate.
318 Op = X86Operand::CreateMem(SegReg, Disp, 0, 0, 1);
320 Op = X86Operand::CreateImm(Disp);
329 // If we reached here, then we just ate the ( of the memory operand. Process
330 // the rest of the memory operand.
331 unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
333 if (getLexer().is(AsmToken::Percent)) {
334 if (ParseRegister(Op))
336 BaseReg = Op.getReg();
339 if (getLexer().is(AsmToken::Comma)) {
340 getLexer().Lex(); // Eat the comma.
342 // Following the comma we should have either an index register, or a scale
343 // value. We don't support the later form, but we want to parse it
346 // Not that even though it would be completely consistent to support syntax
347 // like "1(%eax,,1)", the assembler doesn't.
348 if (getLexer().is(AsmToken::Percent)) {
349 if (ParseRegister(Op))
351 IndexReg = Op.getReg();
353 if (getLexer().isNot(AsmToken::RParen)) {
354 // Parse the scale amount:
355 // ::= ',' [scale-expression]
356 if (getLexer().isNot(AsmToken::Comma))
358 getLexer().Lex(); // Eat the comma.
360 if (getLexer().isNot(AsmToken::RParen)) {
361 SMLoc Loc = getLexer().getTok().getLoc();
364 if (getParser().ParseAbsoluteExpression(ScaleVal))
367 // Validate the scale amount.
368 if (ScaleVal != 1 && ScaleVal != 2 && ScaleVal != 4 && ScaleVal != 8)
369 return Error(Loc, "scale factor in address must be 1, 2, 4 or 8");
370 Scale = (unsigned)ScaleVal;
373 } else if (getLexer().isNot(AsmToken::RParen)) {
374 // Otherwise we have the unsupported form of a scale amount without an
376 SMLoc Loc = getLexer().getTok().getLoc();
379 if (getParser().ParseAbsoluteExpression(Value))
382 return Error(Loc, "cannot have scale factor without index register");
386 // Ok, we've eaten the memory operand, verify we have a ')' and eat it too.
387 if (getLexer().isNot(AsmToken::RParen))
388 return Error(getLexer().getTok().getLoc(),
389 "unexpected token in memory operand");
390 getLexer().Lex(); // Eat the ')'.
392 Op = X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale);
396 bool X86ATTAsmParser::ParseInstruction(const StringRef &Name, MCInst &Inst) {
397 SmallVector<X86Operand, 8> Operands;
399 Operands.push_back(X86Operand::CreateToken(Name));
401 SMLoc Loc = getLexer().getTok().getLoc();
402 if (getLexer().isNot(AsmToken::EndOfStatement)) {
404 // Parse '*' modifier.
405 if (getLexer().is(AsmToken::Star)) {
406 getLexer().Lex(); // Eat the star.
407 Operands.push_back(X86Operand::CreateToken("*"));
410 // Read the first operand.
411 Operands.push_back(X86Operand());
412 if (ParseOperand(Operands.back()))
415 while (getLexer().is(AsmToken::Comma)) {
416 getLexer().Lex(); // Eat the comma.
418 // Parse and remember the operand.
419 Operands.push_back(X86Operand());
420 if (ParseOperand(Operands.back()))
425 if (!MatchInstruction(Operands, Inst))
428 // FIXME: We should give nicer diagnostics about the exact failure.
430 Error(Loc, "unrecognized instruction");
434 // Force static initialization.
435 extern "C" void LLVMInitializeX86AsmParser() {
436 RegisterAsmParser<X86ATTAsmParser> X(TheX86_32Target);
437 RegisterAsmParser<X86ATTAsmParser> Y(TheX86_64Target);
440 #include "X86GenAsmMatcher.inc"