1 //===-- X86AsmParser.cpp - Parse X86 assembly to MCInst instructions ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmParser.h"
12 #include "llvm/ADT/SmallVector.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/MCStreamer.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCInst.h"
17 #include "llvm/MC/MCParser/MCAsmLexer.h"
18 #include "llvm/MC/MCParser/MCAsmParser.h"
19 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
20 #include "llvm/Support/SourceMgr.h"
21 #include "llvm/Target/TargetRegistry.h"
22 #include "llvm/Target/TargetAsmParser.h"
28 class X86ATTAsmParser : public TargetAsmParser {
32 MCAsmParser &getParser() const { return Parser; }
34 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
36 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
38 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
40 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
42 X86Operand *ParseOperand();
43 X86Operand *ParseMemOperand();
45 bool ParseDirectiveWord(unsigned Size, SMLoc L);
47 /// @name Auto-generated Match Functions
50 bool MatchInstruction(const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
56 X86ATTAsmParser(const Target &T, MCAsmParser &_Parser)
57 : TargetAsmParser(T), Parser(_Parser) {}
59 virtual bool ParseInstruction(const StringRef &Name, SMLoc NameLoc,
60 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
62 virtual bool ParseDirective(AsmToken DirectiveID);
65 } // end anonymous namespace
67 /// @name Auto-generated Match Functions
70 static unsigned MatchRegisterName(const StringRef &Name);
76 /// X86Operand - Instances of this class represent a parsed X86 machine
78 struct X86Operand : public MCParsedAsmOperand {
86 SMLoc StartLoc, EndLoc;
111 X86Operand(KindTy K, SMLoc Start, SMLoc End)
112 : Kind(K), StartLoc(Start), EndLoc(End) {}
114 /// getStartLoc - Get the location of the first token of this operand.
115 SMLoc getStartLoc() const { return StartLoc; }
116 /// getEndLoc - Get the location of the last token of this operand.
117 SMLoc getEndLoc() const { return EndLoc; }
119 StringRef getToken() const {
120 assert(Kind == Token && "Invalid access!");
121 return StringRef(Tok.Data, Tok.Length);
124 unsigned getReg() const {
125 assert(Kind == Register && "Invalid access!");
129 const MCExpr *getImm() const {
130 assert(Kind == Immediate && "Invalid access!");
134 const MCExpr *getMemDisp() const {
135 assert(Kind == Memory && "Invalid access!");
138 unsigned getMemSegReg() const {
139 assert(Kind == Memory && "Invalid access!");
142 unsigned getMemBaseReg() const {
143 assert(Kind == Memory && "Invalid access!");
146 unsigned getMemIndexReg() const {
147 assert(Kind == Memory && "Invalid access!");
150 unsigned getMemScale() const {
151 assert(Kind == Memory && "Invalid access!");
155 bool isToken() const {return Kind == Token; }
157 bool isImm() const { return Kind == Immediate; }
159 bool isImmSExt8() const {
160 // Accept immediates which fit in 8 bits when sign extended, and
161 // non-absolute immediates.
165 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm())) {
166 int64_t Value = CE->getValue();
167 return Value == (int64_t) (int8_t) Value;
173 bool isMem() const { return Kind == Memory; }
175 bool isAbsMem() const {
176 return Kind == Memory && !getMemSegReg() && !getMemBaseReg() &&
177 !getMemIndexReg() && !getMemScale();
180 bool isNoSegMem() const {
181 return Kind == Memory && !getMemSegReg();
184 bool isReg() const { return Kind == Register; }
186 void addRegOperands(MCInst &Inst, unsigned N) const {
187 assert(N == 1 && "Invalid number of operands!");
188 Inst.addOperand(MCOperand::CreateReg(getReg()));
191 void addImmOperands(MCInst &Inst, unsigned N) const {
192 assert(N == 1 && "Invalid number of operands!");
193 Inst.addOperand(MCOperand::CreateExpr(getImm()));
196 void addImmSExt8Operands(MCInst &Inst, unsigned N) const {
197 // FIXME: Support user customization of the render method.
198 assert(N == 1 && "Invalid number of operands!");
199 Inst.addOperand(MCOperand::CreateExpr(getImm()));
202 void addMemOperands(MCInst &Inst, unsigned N) const {
203 assert((N == 5) && "Invalid number of operands!");
204 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
205 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
206 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
207 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
208 Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
211 void addAbsMemOperands(MCInst &Inst, unsigned N) const {
212 assert((N == 1) && "Invalid number of operands!");
213 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
216 void addNoSegMemOperands(MCInst &Inst, unsigned N) const {
217 assert((N == 4) && "Invalid number of operands!");
218 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
219 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
220 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
221 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
224 static X86Operand *CreateToken(StringRef Str, SMLoc Loc) {
225 X86Operand *Res = new X86Operand(Token, Loc, Loc);
226 Res->Tok.Data = Str.data();
227 Res->Tok.Length = Str.size();
231 static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc) {
232 X86Operand *Res = new X86Operand(Register, StartLoc, EndLoc);
233 Res->Reg.RegNo = RegNo;
237 static X86Operand *CreateImm(const MCExpr *Val, SMLoc StartLoc, SMLoc EndLoc){
238 X86Operand *Res = new X86Operand(Immediate, StartLoc, EndLoc);
243 /// Create an absolute memory operand.
244 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc,
246 X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
248 Res->Mem.Disp = Disp;
249 Res->Mem.BaseReg = 0;
250 Res->Mem.IndexReg = 0;
255 /// Create a generalized memory operand.
256 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp,
257 unsigned BaseReg, unsigned IndexReg,
258 unsigned Scale, SMLoc StartLoc, SMLoc EndLoc) {
259 // We should never just have a displacement, that should be parsed as an
260 // absolute memory operand.
261 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
263 // The scale should always be one of {1,2,4,8}.
264 assert(((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) &&
266 X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
267 Res->Mem.SegReg = SegReg;
268 Res->Mem.Disp = Disp;
269 Res->Mem.BaseReg = BaseReg;
270 Res->Mem.IndexReg = IndexReg;
271 Res->Mem.Scale = Scale;
276 } // end anonymous namespace.
279 bool X86ATTAsmParser::ParseRegister(unsigned &RegNo,
280 SMLoc &StartLoc, SMLoc &EndLoc) {
282 const AsmToken &TokPercent = Parser.getTok();
283 assert(TokPercent.is(AsmToken::Percent) && "Invalid token kind!");
284 StartLoc = TokPercent.getLoc();
285 Parser.Lex(); // Eat percent token.
287 const AsmToken &Tok = Parser.getTok();
288 if (Tok.isNot(AsmToken::Identifier))
289 return Error(Tok.getLoc(), "invalid register name");
291 // FIXME: Validate register for the current architecture; we have to do
292 // validation later, so maybe there is no need for this here.
293 RegNo = MatchRegisterName(Tok.getString());
295 return Error(Tok.getLoc(), "invalid register name");
297 EndLoc = Tok.getLoc();
298 Parser.Lex(); // Eat identifier token.
302 X86Operand *X86ATTAsmParser::ParseOperand() {
303 switch (getLexer().getKind()) {
305 return ParseMemOperand();
306 case AsmToken::Percent: {
307 // FIXME: if a segment register, this could either be just the seg reg, or
308 // the start of a memory operand.
311 if (ParseRegister(RegNo, Start, End)) return 0;
312 return X86Operand::CreateReg(RegNo, Start, End);
314 case AsmToken::Dollar: {
316 SMLoc Start = Parser.getTok().getLoc(), End;
319 if (getParser().ParseExpression(Val, End))
321 return X86Operand::CreateImm(Val, Start, End);
326 /// ParseMemOperand: segment: disp(basereg, indexreg, scale)
327 X86Operand *X86ATTAsmParser::ParseMemOperand() {
328 SMLoc MemStart = Parser.getTok().getLoc();
330 // FIXME: If SegReg ':' (e.g. %gs:), eat and remember.
333 // We have to disambiguate a parenthesized expression "(4+5)" from the start
334 // of a memory operand with a missing displacement "(%ebx)" or "(,%eax)". The
335 // only way to do this without lookahead is to eat the '(' and see what is
337 const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext());
338 if (getLexer().isNot(AsmToken::LParen)) {
340 if (getParser().ParseExpression(Disp, ExprEnd)) return 0;
342 // After parsing the base expression we could either have a parenthesized
343 // memory address or not. If not, return now. If so, eat the (.
344 if (getLexer().isNot(AsmToken::LParen)) {
345 // Unless we have a segment register, treat this as an immediate.
347 return X86Operand::CreateMem(Disp, MemStart, ExprEnd);
348 return X86Operand::CreateMem(SegReg, Disp, 0, 0, 1, MemStart, ExprEnd);
354 // Okay, we have a '('. We don't know if this is an expression or not, but
355 // so we have to eat the ( to see beyond it.
356 SMLoc LParenLoc = Parser.getTok().getLoc();
357 Parser.Lex(); // Eat the '('.
359 if (getLexer().is(AsmToken::Percent) || getLexer().is(AsmToken::Comma)) {
360 // Nothing to do here, fall into the code below with the '(' part of the
361 // memory operand consumed.
365 // It must be an parenthesized expression, parse it now.
366 if (getParser().ParseParenExpression(Disp, ExprEnd))
369 // After parsing the base expression we could either have a parenthesized
370 // memory address or not. If not, return now. If so, eat the (.
371 if (getLexer().isNot(AsmToken::LParen)) {
372 // Unless we have a segment register, treat this as an immediate.
374 return X86Operand::CreateMem(Disp, LParenLoc, ExprEnd);
375 return X86Operand::CreateMem(SegReg, Disp, 0, 0, 1, MemStart, ExprEnd);
383 // If we reached here, then we just ate the ( of the memory operand. Process
384 // the rest of the memory operand.
385 unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
387 if (getLexer().is(AsmToken::Percent)) {
389 if (ParseRegister(BaseReg, L, L)) return 0;
392 if (getLexer().is(AsmToken::Comma)) {
393 Parser.Lex(); // Eat the comma.
395 // Following the comma we should have either an index register, or a scale
396 // value. We don't support the later form, but we want to parse it
399 // Not that even though it would be completely consistent to support syntax
400 // like "1(%eax,,1)", the assembler doesn't.
401 if (getLexer().is(AsmToken::Percent)) {
403 if (ParseRegister(IndexReg, L, L)) return 0;
405 if (getLexer().isNot(AsmToken::RParen)) {
406 // Parse the scale amount:
407 // ::= ',' [scale-expression]
408 if (getLexer().isNot(AsmToken::Comma)) {
409 Error(Parser.getTok().getLoc(),
410 "expected comma in scale expression");
413 Parser.Lex(); // Eat the comma.
415 if (getLexer().isNot(AsmToken::RParen)) {
416 SMLoc Loc = Parser.getTok().getLoc();
419 if (getParser().ParseAbsoluteExpression(ScaleVal))
422 // Validate the scale amount.
423 if (ScaleVal != 1 && ScaleVal != 2 && ScaleVal != 4 && ScaleVal != 8){
424 Error(Loc, "scale factor in address must be 1, 2, 4 or 8");
427 Scale = (unsigned)ScaleVal;
430 } else if (getLexer().isNot(AsmToken::RParen)) {
431 // Otherwise we have the unsupported form of a scale amount without an
433 SMLoc Loc = Parser.getTok().getLoc();
436 if (getParser().ParseAbsoluteExpression(Value))
439 Error(Loc, "cannot have scale factor without index register");
444 // Ok, we've eaten the memory operand, verify we have a ')' and eat it too.
445 if (getLexer().isNot(AsmToken::RParen)) {
446 Error(Parser.getTok().getLoc(), "unexpected token in memory operand");
449 SMLoc MemEnd = Parser.getTok().getLoc();
450 Parser.Lex(); // Eat the ')'.
452 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale,
456 bool X86ATTAsmParser::
457 ParseInstruction(const StringRef &Name, SMLoc NameLoc,
458 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
460 Operands.push_back(X86Operand::CreateToken(Name, NameLoc));
462 if (getLexer().isNot(AsmToken::EndOfStatement)) {
464 // Parse '*' modifier.
465 if (getLexer().is(AsmToken::Star)) {
466 SMLoc Loc = Parser.getTok().getLoc();
467 Operands.push_back(X86Operand::CreateToken("*", Loc));
468 Parser.Lex(); // Eat the star.
471 // Read the first operand.
472 if (X86Operand *Op = ParseOperand())
473 Operands.push_back(Op);
477 while (getLexer().is(AsmToken::Comma)) {
478 Parser.Lex(); // Eat the comma.
480 // Parse and remember the operand.
481 if (X86Operand *Op = ParseOperand())
482 Operands.push_back(Op);
491 bool X86ATTAsmParser::ParseDirective(AsmToken DirectiveID) {
492 StringRef IDVal = DirectiveID.getIdentifier();
493 if (IDVal == ".word")
494 return ParseDirectiveWord(2, DirectiveID.getLoc());
498 /// ParseDirectiveWord
499 /// ::= .word [ expression (, expression)* ]
500 bool X86ATTAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
501 if (getLexer().isNot(AsmToken::EndOfStatement)) {
504 if (getParser().ParseExpression(Value))
507 getParser().getStreamer().EmitValue(Value, Size, 0 /*addrspace*/);
509 if (getLexer().is(AsmToken::EndOfStatement))
512 // FIXME: Improve diagnostic.
513 if (getLexer().isNot(AsmToken::Comma))
514 return Error(L, "unexpected token in directive");
523 extern "C" void LLVMInitializeX86AsmLexer();
525 // Force static initialization.
526 extern "C" void LLVMInitializeX86AsmParser() {
527 RegisterAsmParser<X86ATTAsmParser> X(TheX86_32Target);
528 RegisterAsmParser<X86ATTAsmParser> Y(TheX86_64Target);
529 LLVMInitializeX86AsmLexer();
532 #include "X86GenAsmMatcher.inc"