1 //===- SystemZRegisterInfo.cpp - SystemZ Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SystemZ implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "SystemZInstrInfo.h"
16 #include "SystemZMachineFunctionInfo.h"
17 #include "SystemZRegisterInfo.h"
18 #include "SystemZSubtarget.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/Target/TargetFrameLowering.h"
24 #include "llvm/Target/TargetInstrInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/ADT/BitVector.h"
30 SystemZRegisterInfo::SystemZRegisterInfo(SystemZTargetMachine &tm,
31 const SystemZInstrInfo &tii)
32 : SystemZGenRegisterInfo(SystemZ::ADJCALLSTACKUP, SystemZ::ADJCALLSTACKDOWN),
37 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
38 static const unsigned CalleeSavedRegs[] = {
39 SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D,
40 SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D,
41 SystemZ::R14D, SystemZ::R15D,
42 SystemZ::F8L, SystemZ::F9L, SystemZ::F10L, SystemZ::F11L,
43 SystemZ::F12L, SystemZ::F13L, SystemZ::F14L, SystemZ::F15L,
47 return CalleeSavedRegs;
50 BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
51 BitVector Reserved(getNumRegs());
52 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
55 // R11D is the frame pointer. Reserve all aliases.
56 Reserved.set(SystemZ::R11D);
57 Reserved.set(SystemZ::R11W);
58 Reserved.set(SystemZ::R10P);
59 Reserved.set(SystemZ::R10Q);
62 Reserved.set(SystemZ::R14D);
63 Reserved.set(SystemZ::R15D);
64 Reserved.set(SystemZ::R14W);
65 Reserved.set(SystemZ::R15W);
66 Reserved.set(SystemZ::R14P);
67 Reserved.set(SystemZ::R14Q);
71 const TargetRegisterClass*
72 SystemZRegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
73 const TargetRegisterClass *B,
76 // Exact sub-classes don't exist for the other sub-register indexes.
78 case SystemZ::subreg_32bit:
79 if (B == SystemZ::ADDR32RegisterClass)
80 return A->getSize() == 8 ? SystemZ::ADDR64RegisterClass : 0;
85 void SystemZRegisterInfo::
86 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
87 MachineBasicBlock::iterator I) const {
92 SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
93 int SPAdj, RegScavenger *RS) const {
94 assert(SPAdj == 0 && "Unxpected");
97 MachineInstr &MI = *II;
98 MachineFunction &MF = *MI.getParent()->getParent();
99 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
101 while (!MI.getOperand(i).isFI()) {
103 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
106 int FrameIndex = MI.getOperand(i).getIndex();
108 unsigned BasePtr = (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D);
110 // This must be part of a rri or ri operand memory reference. Replace the
111 // FrameIndex with base register with BasePtr. Add an offset to the
112 // displacement field.
113 MI.getOperand(i).ChangeToRegister(BasePtr, false);
115 // Offset is a either 12-bit unsigned or 20-bit signed integer.
116 // FIXME: handle "too long" displacements.
118 TFI->getFrameIndexOffset(MF, FrameIndex) + MI.getOperand(i+1).getImm();
120 // Check whether displacement is too long to fit into 12 bit zext field.
121 MI.setDesc(TII.getMemoryInstr(MI.getOpcode(), Offset));
123 MI.getOperand(i+1).ChangeToImmediate(Offset);
126 unsigned SystemZRegisterInfo::getRARegister() const {
127 assert(0 && "What is the return address register");
132 SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
133 assert(0 && "What is the frame register");
137 unsigned SystemZRegisterInfo::getEHExceptionRegister() const {
138 assert(0 && "What is the exception register");
142 unsigned SystemZRegisterInfo::getEHHandlerRegister() const {
143 assert(0 && "What is the exception handler register");
147 int SystemZRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
148 assert(0 && "What is the dwarf register number");
152 int SystemZRegisterInfo::getLLVMRegNum(unsigned DwarfRegNo, bool isEH) const {
153 assert(0 && "What is the dwarf register number");
158 #include "SystemZGenRegisterInfo.inc"