1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the code for the Sparc Target that does not fit in any of
11 // the other files in this directory.
13 //===----------------------------------------------------------------------===//
15 #include "SparcInternals.h"
16 #include "MappingInfo.h"
17 #include "llvm/Function.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Assembly/PrintModulePass.h"
20 #include "llvm/Transforms/Scalar.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineFunctionInfo.h"
23 #include "llvm/CodeGen/InstrSelection.h"
24 #include "llvm/CodeGen/InstrScheduling.h"
25 #include "llvm/CodeGen/MachineCodeForInstruction.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/Target/TargetMachineImpls.h"
28 #include "Support/CommandLine.h"
30 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
31 // Build the MachineInstruction Description Array...
32 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
33 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
34 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
35 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
36 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
37 ImplicitRegUseList, ImplicitRegUseList },
38 #include "SparcInstr.def"
41 //---------------------------------------------------------------------------
42 // Command line options to control choice of code generation passes.
43 //---------------------------------------------------------------------------
45 static cl::opt<bool> DisablePreOpt("disable-preopt",
46 cl::desc("Disable optimizations prior to instruction selection"));
48 static cl::opt<bool> DisableSched("disable-sched",
49 cl::desc("Disable local scheduling pass"));
51 static cl::opt<bool> DisablePeephole("disable-peephole",
52 cl::desc("Disable peephole optimization pass"));
54 static cl::opt<bool> EmitMappingInfo("enable-maps",
55 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
57 static cl::opt<bool> DisableStrip("disable-strip",
58 cl::desc("Do not strip the LLVM bytecode included in executable"));
60 static cl::opt<bool> DumpInput("dump-input",
61 cl::desc("Print bytecode before native code generation"),
64 //----------------------------------------------------------------------------
65 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
66 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
67 //----------------------------------------------------------------------------
69 TargetMachine *allocateSparcTargetMachine(const Module &M) {
70 return new UltraSparc();
73 //---------------------------------------------------------------------------
74 // class UltraSparcFrameInfo
76 // Interface to stack frame layout info for the UltraSPARC.
77 // Starting offsets for each area of the stack frame are aligned at
78 // a multiple of getStackFrameSizeAlignment().
79 //---------------------------------------------------------------------------
82 UltraSparcFrameInfo::getFirstAutomaticVarOffset(MachineFunction& ,
85 pos = false; // static stack area grows downwards
86 return StaticAreaOffsetFromFP;
90 UltraSparcFrameInfo::getRegSpillAreaOffset(MachineFunction& mcInfo,
93 // ensure no more auto vars are added
94 mcInfo.getInfo()->freezeAutomaticVarsArea();
96 pos = false; // static stack area grows downwards
97 unsigned autoVarsSize = mcInfo.getInfo()->getAutomaticVarsSize();
98 return StaticAreaOffsetFromFP - autoVarsSize;
102 UltraSparcFrameInfo::getTmpAreaOffset(MachineFunction& mcInfo,
105 MachineFunctionInfo *MFI = mcInfo.getInfo();
106 MFI->freezeAutomaticVarsArea(); // ensure no more auto vars are added
107 MFI->freezeSpillsArea(); // ensure no more spill slots are added
109 pos = false; // static stack area grows downwards
110 unsigned autoVarsSize = MFI->getAutomaticVarsSize();
111 unsigned spillAreaSize = MFI->getRegSpillsSize();
112 int offset = autoVarsSize + spillAreaSize;
113 return StaticAreaOffsetFromFP - offset;
117 UltraSparcFrameInfo::getDynamicAreaOffset(MachineFunction& mcInfo,
120 // Dynamic stack area grows downwards starting at top of opt-args area.
121 // The opt-args, required-args, and register-save areas are empty except
122 // during calls and traps, so they are shifted downwards on each
123 // dynamic-size alloca.
125 unsigned optArgsSize = mcInfo.getInfo()->getMaxOptionalArgsSize();
126 if (int extra = optArgsSize % getStackFrameSizeAlignment())
127 optArgsSize += (getStackFrameSizeAlignment() - extra);
128 int offset = optArgsSize + FirstOptionalOutgoingArgOffsetFromSP;
129 assert((offset - OFFSET) % getStackFrameSizeAlignment() == 0);
133 //---------------------------------------------------------------------------
134 // class UltraSparcMachine
137 // Primary interface to machine description for the UltraSPARC.
138 // Primarily just initializes machine-dependent parameters in
139 // class TargetMachine, and creates machine-dependent subclasses
140 // for classes such as TargetInstrInfo.
142 //---------------------------------------------------------------------------
144 UltraSparc::UltraSparc()
145 : TargetMachine("UltraSparc-Native", false),
152 // addPassesToEmitAssembly - This method controls the entire code generation
153 // process for the ultra sparc.
155 bool UltraSparc::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
157 // The following 3 passes used to be inserted specially by llc.
158 // Replace malloc and free instructions with library calls.
159 PM.add(createLowerAllocationsPass());
161 // Strip all of the symbols from the bytecode so that it will be smaller...
163 PM.add(createSymbolStrippingPass());
165 // FIXME: implement the switch instruction in the instruction selector.
166 PM.add(createLowerSwitchPass());
168 // FIXME: implement the invoke/unwind instructions!
169 PM.add(createLowerInvokePass());
171 // decompose multi-dimensional array references into single-dim refs
172 PM.add(createDecomposeMultiDimRefsPass());
174 // Construct and initialize the MachineFunction object for this fn.
175 PM.add(createMachineCodeConstructionPass(*this));
177 //Insert empty stackslots in the stack frame of each function
178 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
179 PM.add(createStackSlotsPass(*this));
181 if (!DisablePreOpt) {
182 // Specialize LLVM code for this target machine
183 PM.add(createPreSelectionPass(*this));
184 // Run basic dataflow optimizations on LLVM code
185 PM.add(createReassociatePass());
186 PM.add(createLICMPass());
187 PM.add(createGCSEPass());
190 // If LLVM dumping after transformations is requested, add it to the pipeline
192 PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
195 PM.add(createInstructionSelectionPass(*this));
198 PM.add(createInstructionSchedulingWithSSAPass(*this));
200 PM.add(getRegisterAllocator(*this));
202 PM.add(getPrologEpilogInsertionPass());
204 if (!DisablePeephole)
205 PM.add(createPeepholeOptsPass(*this));
208 PM.add(getMappingInfoAsmPrinterPass(Out));
210 // Output assembly language to the .s file. Assembly emission is split into
211 // two parts: Function output and Global value output. This is because
212 // function output is pipelined with all of the rest of code generation stuff,
213 // allowing machine code representations for functions to be free'd after the
214 // function has been emitted.
216 PM.add(getFunctionAsmPrinterPass(Out));
217 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
219 // Emit Module level assembly after all of the functions have been processed.
220 PM.add(getModuleAsmPrinterPass(Out));
222 // Emit bytecode to the assembly file into its special section next
224 PM.add(getBytecodeAsmPrinterPass(Out));
229 // addPassesToJITCompile - This method controls the JIT method of code
230 // generation for the UltraSparc.
232 bool UltraSparc::addPassesToJITCompile(FunctionPassManager &PM) {
233 const TargetData &TD = getTargetData();
235 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
236 TD.getPointerAlignment(), TD.getDoubleAlignment()));
238 // Replace malloc and free instructions with library calls.
239 // Do this after tracing until lli implements these lib calls.
240 // For now, it will emulate malloc and free internally.
241 PM.add(createLowerAllocationsPass());
243 // FIXME: implement the switch instruction in the instruction selector.
244 PM.add(createLowerSwitchPass());
246 // FIXME: implement the invoke/unwind instructions!
247 PM.add(createLowerInvokePass());
249 // decompose multi-dimensional array references into single-dim refs
250 PM.add(createDecomposeMultiDimRefsPass());
252 // Construct and initialize the MachineFunction object for this fn.
253 PM.add(createMachineCodeConstructionPass(*this));
255 PM.add(createInstructionSelectionPass(*this));
257 // new pass: convert Value* in MachineOperand to an unsigned register
258 // this brings it in line with what the X86 JIT's RegisterAllocator expects
259 //PM.add(createAddRegNumToValuesPass());
261 PM.add(getRegisterAllocator(*this));
262 PM.add(getPrologEpilogInsertionPass());
264 if (!DisablePeephole)
265 PM.add(createPeepholeOptsPass(*this));
267 return false; // success!