1 //===-- PhyRegAlloc.h - Graph Coloring Register Allocator -------*- c++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is the main entry point for register allocation.
13 // * RegisterClasses: Each RegClass accepts a
14 // TargetRegClass which contains machine specific info about that register
15 // class. The code in the RegClass is machine independent and they use
16 // access functions in the TargetRegClass object passed into it to get
17 // machine specific info.
19 // * Machine dependent work: All parts of the register coloring algorithm
20 // except coloring of an individual node are machine independent.
22 //===----------------------------------------------------------------------===//
27 #include "LiveRangeInfo.h"
28 #include "llvm/Pass.h"
29 #include "llvm/CodeGen/MachineBasicBlock.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetRegInfo.h"
34 class MachineFunction;
35 class FunctionLiveVarInfo;
41 //----------------------------------------------------------------------------
42 // Class AddedInstrns:
43 // When register allocator inserts new instructions in to the existing
44 // instruction stream, it does NOT directly modify the instruction stream.
45 // Rather, it creates an object of AddedInstrns and stick it in the
46 // AddedInstrMap for an existing instruction. This class contains two vectors
47 // to store such instructions added before and after an existing instruction.
48 //----------------------------------------------------------------------------
51 std::vector<MachineInstr*> InstrnsBefore;//Insts added BEFORE an existing inst
52 std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
53 inline void clear () { InstrnsBefore.clear (); InstrnsAfter.clear (); }
56 //----------------------------------------------------------------------------
58 // Main class the register allocator. Call runOnFunction() to allocate
59 // registers for a Function.
60 //----------------------------------------------------------------------------
62 class PhyRegAlloc : public FunctionPass {
63 std::vector<RegClass *> RegClassList; // vector of register classes
64 const TargetMachine &TM; // target machine
65 const Function *Fn; // name of the function we work on
66 MachineFunction *MF; // descriptor for method's native code
67 FunctionLiveVarInfo *LVI; // LV information for this method
68 // (already computed for BBs)
69 LiveRangeInfo *LRI; // LR info (will be computed)
70 const TargetRegInfo &MRI; // Machine Register information
71 const unsigned NumOfRegClasses; // recorded here for efficiency
73 // Map to indicate whether operands of each MachineInstr have been
74 // updated according to their assigned colors. This is only used in
75 // assertion checking (debug builds).
76 std::map<const MachineInstr *, bool> OperandsColoredMap;
78 // AddedInstrMap - Used to store instrns added in this phase
79 std::map<const MachineInstr *, AddedInstrns> AddedInstrMap;
81 // ScratchRegsUsed - Contains scratch register uses for a particular MI.
82 typedef std::multimap<const MachineInstr*, int> ScratchRegsUsedTy;
83 ScratchRegsUsedTy ScratchRegsUsed;
85 AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
86 const LoopInfo *LoopDepthCalc; // to calculate loop depths
88 std::map<const Function *, std::vector<AllocInfo> > FnAllocState;
90 PhyRegAlloc(const PhyRegAlloc&); // DO NOT IMPLEMENT
91 void operator=(const PhyRegAlloc&); // DO NOT IMPLEMENT
93 inline PhyRegAlloc (const TargetMachine &TM_) :
94 TM (TM_), MRI (TM.getRegInfo ()),
95 NumOfRegClasses (MRI.getNumOfRegClasses ()) { }
96 virtual ~PhyRegAlloc() { }
98 /// runOnFunction - Main method called for allocating registers.
100 virtual bool runOnFunction (Function &F);
102 virtual bool doFinalization (Module &M);
104 virtual void getAnalysisUsage (AnalysisUsage &AU) const;
106 const char *getPassName () const {
107 return "Traditional graph-coloring reg. allocator";
110 inline const RegClass* getRegClassByID(unsigned id) const {
111 return RegClassList[id];
113 inline RegClass *getRegClassByID(unsigned id) { return RegClassList[id]; }
116 void addInterference(const Value *Def, const ValueSet *LVSet,
118 bool markAllocatedRegs(MachineInstr* MInst);
120 void addInterferencesForArgs();
121 void createIGNodeListsAndIGs();
122 void buildInterferenceGraphs();
124 void verifySavedState();
126 void setCallInterferences(const MachineInstr *MI,
127 const ValueSet *LVSetAft);
129 void move2DelayedInstr(const MachineInstr *OrigMI,
130 const MachineInstr *DelayedMI);
132 void markUnusableSugColors();
133 void allocateStackSpace4SpilledLRs();
135 void insertCode4SpilledLR(const LiveRange *LR,
136 MachineBasicBlock::iterator& MII,
137 MachineBasicBlock &MBB, unsigned OpNum);
139 /// Method for inserting caller saving code. The caller must save all the
140 /// volatile registers live across a call.
142 void insertCallerSavingCode(std::vector<MachineInstr*>& instrnsBefore,
143 std::vector<MachineInstr*>& instrnsAfter,
144 MachineInstr *CallMI,
145 const BasicBlock *BB);
147 void colorIncomingArgs();
148 void colorCallRetArgs();
149 void updateMachineCode();
150 void updateInstruction(MachineBasicBlock::iterator& MII,
151 MachineBasicBlock &MBB);
153 int getUsableUniRegAtMI(int RegType, const ValueSet *LVSetBef,
155 std::vector<MachineInstr*>& MIBef,
156 std::vector<MachineInstr*>& MIAft);
158 /// Callback method used to find unused registers.
159 /// LVSetBef is the live variable set to search for an unused register.
160 /// If it is not specified, the LV set before the current MI is used.
161 /// This is sufficient as long as no new copy instructions are generated
162 /// to copy the free register to memory.
164 int getUnusedUniRegAtMI(RegClass *RC, int RegType,
165 const MachineInstr *MI,
166 const ValueSet *LVSetBef = 0);
168 void setRelRegsUsedByThisInst(RegClass *RC, int RegType,
169 const MachineInstr *MI);
171 int getUniRegNotUsedByThisInst(RegClass *RC, int RegType,
172 const MachineInstr *MI);
174 void addInterf4PseudoInstr(const MachineInstr *MI);