1 //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcTargetMachine.h"
15 #include "llvm/Assembly/PrintModulePass.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
23 #include "llvm/Support/CommandLine.h"
28 // Register the target.
29 RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
32 /// SparcTargetMachine ctor - Create an ILP32 architecture model
34 SparcTargetMachine::SparcTargetMachine(const Module &M, IntrinsicLowering *IL,
35 const std::string &FS)
36 : TargetMachine("Sparc", IL, false, 4, 4),
37 Subtarget(M, FS), InstrInfo(Subtarget),
38 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
41 unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
42 std::string TT = M.getTargetTriple();
43 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
46 if (M.getEndianness() == Module::BigEndian &&
47 M.getPointerSize() == Module::Pointer32)
49 return 20; // BE/32 ==> Prefer sparc on sparc
51 return 5; // BE/32 ==> Prefer ppc elsewhere
53 else if (M.getEndianness() != Module::AnyEndianness ||
54 M.getPointerSize() != Module::AnyPointerSize)
55 return 0; // Match for some other target
60 /// addPassesToEmitFile - Add passes to the specified pass manager
61 /// to implement a static compiler for this target.
63 bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
64 CodeGenFileType FileType,
66 if (FileType != TargetMachine::AssemblyFile) return true;
68 // FIXME: Implement efficient support for garbage collection intrinsics.
69 PM.add(createLowerGCPass());
71 // FIXME: implement the invoke/unwind instructions!
72 PM.add(createLowerInvokePass());
74 // FIXME: implement the switch instruction in the instruction selector.
75 PM.add(createLowerSwitchPass());
77 // Print LLVM code input to instruction selector:
79 PM.add(new PrintFunctionPass());
81 // Make sure that no unreachable blocks are instruction selected.
82 PM.add(createUnreachableBlockEliminationPass());
84 PM.add(createSparcISelDag(*this));
86 // Print machine instructions as they were initially generated.
88 PM.add(createMachineFunctionPrinterPass(&std::cerr));
90 PM.add(createRegisterAllocator());
91 PM.add(createPrologEpilogCodeInserter());
93 // Print machine instructions after register allocation and prolog/epilog
96 PM.add(createMachineFunctionPrinterPass(&std::cerr));
98 PM.add(createSparcFPMoverPass(*this));
100 PM.add(createSparcDelaySlotFillerPass(*this));
102 // Print machine instructions after filling delay slots.
103 if (PrintMachineCode)
104 PM.add(createMachineFunctionPrinterPass(&std::cerr));
106 // Output assembly language.
107 PM.add(createSparcCodePrinterPass(Out, *this));
109 // Delete the MachineInstrs we generated, since they're no longer needed.
110 PM.add(createMachineCodeDeleter());