1 //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Sparc specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "SparcMCTargetDesc.h"
15 #include "InstPrinter/SparcInstPrinter.h"
16 #include "SparcMCAsmInfo.h"
17 #include "SparcTargetStreamer.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/TargetRegistry.h"
27 #define GET_INSTRINFO_MC_DESC
28 #include "SparcGenInstrInfo.inc"
30 #define GET_SUBTARGETINFO_MC_DESC
31 #include "SparcGenSubtargetInfo.inc"
33 #define GET_REGINFO_MC_DESC
34 #include "SparcGenRegisterInfo.inc"
36 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
38 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
39 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
40 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
41 MAI->addInitialFrameState(Inst);
45 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
47 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
48 unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
49 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
50 MAI->addInitialFrameState(Inst);
54 static MCInstrInfo *createSparcMCInstrInfo() {
55 MCInstrInfo *X = new MCInstrInfo();
56 InitSparcMCInstrInfo(X);
60 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
61 MCRegisterInfo *X = new MCRegisterInfo();
62 InitSparcMCRegisterInfo(X, SP::O7);
66 static MCSubtargetInfo *createSparcMCSubtargetInfo(StringRef TT, StringRef CPU,
68 MCSubtargetInfo *X = new MCSubtargetInfo();
71 CPU = (TheTriple.getArch() == Triple::sparcv9) ? "v9" : "v8";
72 InitSparcMCSubtargetInfo(X, TT, CPU, FS);
76 // Code models. Some only make sense for 64-bit code.
78 // SunCC Reloc CodeModel Constraints
79 // abs32 Static Small text+data+bss linked below 2^32 bytes
80 // abs44 Static Medium text+data+bss linked below 2^44 bytes
81 // abs64 Static Large text smaller than 2^31 bytes
82 // pic13 PIC_ Small GOT < 2^13 bytes
83 // pic32 PIC_ Medium GOT < 2^32 bytes
85 // All code models require that the text segment is smaller than 2GB.
87 static MCCodeGenInfo *createSparcMCCodeGenInfo(StringRef TT, Reloc::Model RM,
89 CodeGenOpt::Level OL) {
90 MCCodeGenInfo *X = new MCCodeGenInfo();
92 // The default 32-bit code model is abs32/pic32 and the default 32-bit
93 // code model for JIT is abs32.
96 case CodeModel::Default:
97 case CodeModel::JITDefault: CM = CodeModel::Small; break;
100 X->InitMCCodeGenInfo(RM, CM, OL);
104 static MCCodeGenInfo *createSparcV9MCCodeGenInfo(StringRef TT, Reloc::Model RM,
106 CodeGenOpt::Level OL) {
107 MCCodeGenInfo *X = new MCCodeGenInfo();
109 // The default 64-bit code model is abs44/pic32 and the default 64-bit
110 // code model for JIT is abs64.
113 case CodeModel::Default:
114 CM = RM == Reloc::PIC_ ? CodeModel::Small : CodeModel::Medium;
116 case CodeModel::JITDefault:
117 CM = CodeModel::Large;
121 X->InitMCCodeGenInfo(RM, CM, OL);
125 static MCTargetStreamer *
126 createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
127 return new SparcTargetELFStreamer(S);
130 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
131 formatted_raw_ostream &OS,
132 MCInstPrinter *InstPrint,
134 return new SparcTargetAsmStreamer(S, OS);
137 static MCInstPrinter *createSparcMCInstPrinter(const Target &T,
138 unsigned SyntaxVariant,
139 const MCAsmInfo &MAI,
140 const MCInstrInfo &MII,
141 const MCRegisterInfo &MRI,
142 const MCSubtargetInfo &STI) {
143 return new SparcInstPrinter(MAI, MII, MRI, STI);
146 extern "C" void LLVMInitializeSparcTargetMC() {
147 // Register the MC asm info.
148 RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
149 RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
151 for (Target *T : {&TheSparcTarget, &TheSparcV9Target}) {
152 // Register the MC instruction info.
153 TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo);
155 // Register the MC register info.
156 TargetRegistry::RegisterMCRegInfo(*T, createSparcMCRegisterInfo);
158 // Register the MC subtarget info.
159 TargetRegistry::RegisterMCSubtargetInfo(*T, createSparcMCSubtargetInfo);
161 // Register the MC Code Emitter.
162 TargetRegistry::RegisterMCCodeEmitter(*T, createSparcMCCodeEmitter);
164 // Register the asm backend.
165 TargetRegistry::RegisterMCAsmBackend(*T, createSparcAsmBackend);
167 // Register the object target streamer.
168 TargetRegistry::RegisterObjectTargetStreamer(*T,
169 createObjectTargetStreamer);
171 // Register the asm streamer.
172 TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
174 // Register the MCInstPrinter
175 TargetRegistry::RegisterMCInstPrinter(*T, createSparcMCInstPrinter);
178 // Register the MC codegen info.
179 TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
180 createSparcMCCodeGenInfo);
181 TargetRegistry::RegisterMCCodeGenInfo(TheSparcV9Target,
182 createSparcV9MCCodeGenInfo);