1 //===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format SPARC assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "SparcInstrInfo.h"
18 #include "SparcTargetMachine.h"
19 #include "llvm/CodeGen/AsmPrinter.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/MC/MCAsmInfo.h"
22 #include "llvm/MC/MCStreamer.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Target/Mangler.h"
25 #include "llvm/Target/TargetRegistry.h"
26 #include "llvm/ADT/StringExtras.h"
27 #include "llvm/Support/FormattedStream.h"
31 class SparcAsmPrinter : public AsmPrinter {
33 explicit SparcAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
35 : AsmPrinter(O, TM, Streamer) {}
37 virtual const char *getPassName() const {
38 return "Sparc Assembly Printer";
41 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
42 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
43 const char *Modifier = 0);
44 void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
46 virtual void EmitInstruction(const MachineInstr *MI) {
47 printInstruction(MI, O);
48 OutStreamer.AddBlankLine();
50 void printInstruction(const MachineInstr *MI, raw_ostream &OS);// autogen'd.
51 static const char *getRegisterName(unsigned RegNo);
53 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
54 unsigned AsmVariant, const char *ExtraCode,
56 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
57 unsigned AsmVariant, const char *ExtraCode,
60 bool printGetPCX(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS);
62 virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
65 } // end of anonymous namespace
67 #include "SparcGenAsmWriter.inc"
69 void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
71 const MachineOperand &MO = MI->getOperand (opNum);
72 bool CloseParen = false;
73 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
76 } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
77 !MO.isReg() && !MO.isImm()) {
81 switch (MO.getType()) {
82 case MachineOperand::MO_Register:
83 O << "%" << LowercaseString(getRegisterName(MO.getReg()));
86 case MachineOperand::MO_Immediate:
87 O << (int)MO.getImm();
89 case MachineOperand::MO_MachineBasicBlock:
90 O << *MO.getMBB()->getSymbol();
92 case MachineOperand::MO_GlobalAddress:
93 O << *Mang->getSymbol(MO.getGlobal());
95 case MachineOperand::MO_ExternalSymbol:
96 O << MO.getSymbolName();
98 case MachineOperand::MO_ConstantPoolIndex:
99 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
103 llvm_unreachable("<unknown operand type>");
105 if (CloseParen) O << ")";
108 void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
109 raw_ostream &O, const char *Modifier) {
110 printOperand(MI, opNum, O);
112 // If this is an ADD operand, emit it like normal operands.
113 if (Modifier && !strcmp(Modifier, "arith")) {
115 printOperand(MI, opNum+1, O);
119 if (MI->getOperand(opNum+1).isReg() &&
120 MI->getOperand(opNum+1).getReg() == SP::G0)
121 return; // don't print "+%g0"
122 if (MI->getOperand(opNum+1).isImm() &&
123 MI->getOperand(opNum+1).getImm() == 0)
124 return; // don't print "+0"
127 if (MI->getOperand(opNum+1).isGlobal() ||
128 MI->getOperand(opNum+1).isCPI()) {
130 printOperand(MI, opNum+1, O);
133 printOperand(MI, opNum+1, O);
137 bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
139 std::string operand = "";
140 const MachineOperand &MO = MI->getOperand(opNum);
141 switch (MO.getType()) {
142 default: assert(0 && "Operand is not a register ");
143 case MachineOperand::MO_Register:
144 assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
145 "Operand is not a physical register ");
146 operand = "%" + LowercaseString(getRegisterName(MO.getReg()));
150 unsigned mfNum = MI->getParent()->getParent()->getFunctionNumber();
151 unsigned bbNum = MI->getParent()->getNumber();
153 O << '\n' << ".LLGETPCH" << mfNum << '_' << bbNum << ":\n";
154 O << "\tcall\t.LLGETPC" << mfNum << '_' << bbNum << '\n' ;
157 << "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum << ")), "
160 O << ".LLGETPC" << mfNum << '_' << bbNum << ":\n" ;
161 O << "\tor\t" << operand
162 << ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
163 << ")), " << operand << '\n';
164 O << "\tadd\t" << operand << ", %o7, " << operand << '\n';
169 void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum,
171 int CC = (int)MI->getOperand(opNum).getImm();
172 O << SPARCCondCodeToString((SPCC::CondCodes)CC);
175 /// PrintAsmOperand - Print out an operand for an inline asm expression.
177 bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
179 const char *ExtraCode,
181 if (ExtraCode && ExtraCode[0]) {
182 if (ExtraCode[1] != 0) return true; // Unknown modifier.
184 switch (ExtraCode[0]) {
185 default: return true; // Unknown modifier.
191 printOperand(MI, OpNo, O);
196 bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
197 unsigned OpNo, unsigned AsmVariant,
198 const char *ExtraCode,
200 if (ExtraCode && ExtraCode[0])
201 return true; // Unknown modifier
204 printMemOperand(MI, OpNo, O);
210 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
211 /// exactly one predecessor and the control transfer mechanism between
212 /// the predecessor and this block is a fall-through.
214 /// This overrides AsmPrinter's implementation to handle delay slots.
215 bool SparcAsmPrinter::
216 isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
217 // If this is a landing pad, it isn't a fall through. If it has no preds,
218 // then nothing falls through to it.
219 if (MBB->isLandingPad() || MBB->pred_empty())
222 // If there isn't exactly one predecessor, it can't be a fall through.
223 MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
225 if (PI2 != MBB->pred_end())
228 // The predecessor has to be immediately before this block.
229 const MachineBasicBlock *Pred = *PI;
231 if (!Pred->isLayoutSuccessor(MBB))
234 // Check if the last terminator is an unconditional branch.
235 MachineBasicBlock::const_iterator I = Pred->end();
236 while (I != Pred->begin() && !(--I)->getDesc().isTerminator())
238 return I == Pred->end() || !I->getDesc().isBarrier();
243 // Force static initialization.
244 extern "C" void LLVMInitializeSparcAsmPrinter() {
245 RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
246 RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);