1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
16 AMDILCFGStructurizer.cpp
19 AMDILEvergreenDevice.cpp
20 AMDILIntrinsicInfo.cpp
26 AMDGPUFrameLowering.cpp
27 AMDGPUIndirectAddressing.cpp
29 AMDGPUMachineFunction.cpp
31 AMDGPUStructurizeCFG.cpp
32 AMDGPUTargetMachine.cpp
33 AMDGPUISelLowering.cpp
34 AMDGPUConvertToISA.cpp
36 AMDGPURegisterInfo.cpp
37 R600ControlFlowFinalizer.cpp
38 R600EmitClauseMarkers.cpp
39 R600ExpandSpecialInstrs.cpp
42 R600MachineFunctionInfo.cpp
43 R600MachineScheduler.cpp
44 R600OptimizeVectorRegisters.cpp
47 R600TextureIntrinsicsReplacer.cpp
48 SIAnnotateControlFlow.cpp
52 SILowerControlFlow.cpp
53 SIMachineFunctionInfo.cpp
57 add_dependencies(LLVMR600CodeGen intrinsics_gen)
59 add_subdirectory(InstPrinter)
60 add_subdirectory(TargetInfo)
61 add_subdirectory(MCTargetDesc)