1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #include "PPCTargetMachine.h"
15 #include "PPCTargetObjectFile.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/IR/Function.h"
19 #include "llvm/MC/MCStreamer.h"
20 #include "llvm/PassManager.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Target/TargetOptions.h"
28 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
29 cl::desc("Disable CTR loops for PPC"));
32 VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
33 cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
35 extern "C" void LLVMInitializePowerPCTarget() {
36 // Register the targets
37 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
38 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
39 RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
42 static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, StringRef TT) {
43 std::string FullFS = FS;
44 Triple TargetTriple(TT);
46 // Make sure 64-bit features are available when CPUname is generic
47 if (TargetTriple.getArch() == Triple::ppc64 ||
48 TargetTriple.getArch() == Triple::ppc64le) {
50 FullFS = "+64bit," + FullFS;
55 if (OL >= CodeGenOpt::Default) {
57 FullFS = "+crbits," + FullFS;
64 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
65 // If it isn't a Mach-O file then it's going to be a linux ELF
68 return make_unique<TargetLoweringObjectFileMachO>();
70 return make_unique<PPC64LinuxTargetObjectFile>();
73 // The FeatureString here is a little subtle. We are modifying the feature string
74 // with what are (currently) non-function specific overrides as it goes into the
75 // LLVMTargetMachine constructor and then using the stored value in the
76 // Subtarget constructor below it.
77 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
78 StringRef FS, const TargetOptions &Options,
79 Reloc::Model RM, CodeModel::Model CM,
81 : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,
83 TLOF(createTLOF(Triple(getTargetTriple()))),
84 Subtarget(TT, CPU, TargetFS, *this) {
88 void PPC32TargetMachine::anchor() { }
90 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
91 StringRef CPU, StringRef FS,
92 const TargetOptions &Options,
93 Reloc::Model RM, CodeModel::Model CM,
95 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
98 void PPC64TargetMachine::anchor() { }
100 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
101 StringRef CPU, StringRef FS,
102 const TargetOptions &Options,
103 Reloc::Model RM, CodeModel::Model CM,
104 CodeGenOpt::Level OL)
105 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
109 PPCTargetMachine::getSubtargetImpl(const Function &F) const {
110 AttributeSet FnAttrs = F.getAttributes();
112 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
114 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
116 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
117 ? CPUAttr.getValueAsString().str()
119 std::string FS = !FSAttr.hasAttribute(Attribute::None)
120 ? FSAttr.getValueAsString().str()
123 auto &I = SubtargetMap[CPU + FS];
125 // This needs to be done before we create a new subtarget since any
126 // creation will depend on the TM and the code generation flags on the
127 // function that reside in TargetOptions.
128 resetTargetOptions(F);
129 I = llvm::make_unique<PPCSubtarget>(TargetTriple, CPU, FS, *this);
134 //===----------------------------------------------------------------------===//
135 // Pass Pipeline Configuration
136 //===----------------------------------------------------------------------===//
139 /// PPC Code Generator Pass Configuration Options.
140 class PPCPassConfig : public TargetPassConfig {
142 PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
143 : TargetPassConfig(TM, PM) {}
145 PPCTargetMachine &getPPCTargetMachine() const {
146 return getTM<PPCTargetMachine>();
149 const PPCSubtarget &getPPCSubtarget() const {
150 return *getPPCTargetMachine().getSubtargetImpl();
153 void addIRPasses() override;
154 bool addPreISel() override;
155 bool addILPOpts() override;
156 bool addInstSelector() override;
157 bool addPreRegAlloc() override;
158 bool addPreSched2() override;
159 bool addPreEmitPass() override;
163 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
164 return new PPCPassConfig(this, PM);
167 void PPCPassConfig::addIRPasses() {
168 addPass(createAtomicExpandPass(&getPPCTargetMachine()));
169 TargetPassConfig::addIRPasses();
172 bool PPCPassConfig::addPreISel() {
173 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
174 addPass(createPPCCTRLoops(getPPCTargetMachine()));
179 bool PPCPassConfig::addILPOpts() {
180 addPass(&EarlyIfConverterID);
184 bool PPCPassConfig::addInstSelector() {
185 // Install an instruction selector.
186 addPass(createPPCISelDag(getPPCTargetMachine()));
189 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
190 addPass(createPPCCTRLoopsVerify());
193 addPass(createPPCVSXCopyPass());
197 bool PPCPassConfig::addPreRegAlloc() {
198 initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
199 insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
204 bool PPCPassConfig::addPreSched2() {
205 addPass(createPPCVSXCopyCleanupPass());
207 if (getOptLevel() != CodeGenOpt::None)
208 addPass(&IfConverterID);
213 bool PPCPassConfig::addPreEmitPass() {
214 if (getOptLevel() != CodeGenOpt::None)
215 addPass(createPPCEarlyReturnPass());
216 // Must run branch selection immediately preceding the asm printer.
217 addPass(createPPCBranchSelectionPass());
221 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
222 // Add first the target-independent BasicTTI pass, then our PPC pass. This
223 // allows the PPC pass to delegate to the target independent layer when
225 PM.add(createBasicTargetTransformInfoPass(this));
226 PM.add(createPPCTargetTransformInfoPass(this));