1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
15 #define LLVM_LIB_TARGET_POWERPC_PPCSUBTARGET_H
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/IR/DataLayout.h"
22 #include "llvm/MC/MCInstrItineraries.h"
23 #include "llvm/Target/TargetSelectionDAGInfo.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
27 #define GET_SUBTARGETINFO_HEADER
28 #include "PPCGenSubtargetInfo.inc"
30 // GCC #defines PPC on Linux but we use it as our namespace name
37 // -m directive values.
66 class PPCSubtarget : public PPCGenSubtargetInfo {
68 /// TargetTriple - What processor and OS we're targeting.
71 /// stackAlignment - The minimum alignment known to hold of the stack frame on
72 /// entry to the function and which must be maintained by every function.
73 unsigned StackAlignment;
75 /// Selected instruction itineraries (one entry per itinerary class.)
76 InstrItineraryData InstrItins;
78 /// Which cpu directive was used.
79 unsigned DarwinDirective;
81 /// Used by the ISel to turn in optimizations for POWER4-derived architectures
97 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
116 bool HasLazyResolverStubs;
119 bool HasInvariantFunctionDescriptors;
120 bool HasPartwordAtomics;
125 /// When targeting QPX running a stock PPC64 Linux kernel where the stack
126 /// alignment has not been changed, we need to keep the 16-byte alignment
128 bool IsQPXStackUnaligned;
130 const PPCTargetMachine &TM;
131 PPCFrameLowering FrameLowering;
132 PPCInstrInfo InstrInfo;
133 PPCTargetLowering TLInfo;
134 TargetSelectionDAGInfo TSInfo;
137 /// This constructor initializes the data members to match that
138 /// of the specified triple.
140 PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
141 const PPCTargetMachine &TM);
143 /// ParseSubtargetFeatures - Parses features string setting specified
144 /// subtarget options. Definition of function is auto generated by tblgen.
145 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
147 /// getStackAlignment - Returns the minimum alignment known to hold of the
148 /// stack frame on entry to the function and which must be maintained by every
149 /// function for this subtarget.
150 unsigned getStackAlignment() const { return StackAlignment; }
152 /// getDarwinDirective - Returns the -m directive specified for the cpu.
154 unsigned getDarwinDirective() const { return DarwinDirective; }
156 /// getInstrItins - Return the instruction itineraries based on subtarget
158 const InstrItineraryData *getInstrItineraryData() const override {
162 const PPCFrameLowering *getFrameLowering() const override {
163 return &FrameLowering;
165 const PPCInstrInfo *getInstrInfo() const override { return &InstrInfo; }
166 const PPCTargetLowering *getTargetLowering() const override {
169 const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
172 const PPCRegisterInfo *getRegisterInfo() const override {
173 return &getInstrInfo()->getRegisterInfo();
175 const PPCTargetMachine &getTargetMachine() const { return TM; }
177 /// initializeSubtargetDependencies - Initializes using a CPU and feature string
178 /// so that we can use initializer lists for subtarget initialization.
179 PPCSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
182 void initializeEnvironment();
183 void initSubtargetFeatures(StringRef CPU, StringRef FS);
186 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
188 bool isPPC64() const;
190 /// has64BitSupport - Return true if the selected CPU supports 64-bit
191 /// instructions, regardless of whether we are in 32-bit or 64-bit mode.
192 bool has64BitSupport() const { return Has64BitSupport; }
193 // useSoftFloat - Return true if soft-float option is turned on.
194 bool useSoftFloat() const { return UseSoftFloat; }
196 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
197 /// registers in 32-bit mode when possible. This can only true if
198 /// has64BitSupport() returns true.
199 bool use64BitRegs() const { return Use64BitRegs; }
201 /// useCRBits - Return true if we should store and manipulate i1 values in
202 /// the individual condition register bits.
203 bool useCRBits() const { return UseCRBits; }
205 /// hasLazyResolverStub - Return true if accesses to the specified global have
206 /// to go through a dyld lazy resolution stub. This means that an extra load
207 /// is required to get the address of the global.
208 bool hasLazyResolverStub(const GlobalValue *GV) const;
210 // isLittleEndian - True if generating little-endian code
211 bool isLittleEndian() const { return IsLittleEndian; }
213 // Specific obvious features.
214 bool hasFCPSGN() const { return HasFCPSGN; }
215 bool hasFSQRT() const { return HasFSQRT; }
216 bool hasFRE() const { return HasFRE; }
217 bool hasFRES() const { return HasFRES; }
218 bool hasFRSQRTE() const { return HasFRSQRTE; }
219 bool hasFRSQRTES() const { return HasFRSQRTES; }
220 bool hasRecipPrec() const { return HasRecipPrec; }
221 bool hasSTFIWX() const { return HasSTFIWX; }
222 bool hasLFIWAX() const { return HasLFIWAX; }
223 bool hasFPRND() const { return HasFPRND; }
224 bool hasFPCVT() const { return HasFPCVT; }
225 bool hasAltivec() const { return HasAltivec; }
226 bool hasSPE() const { return HasSPE; }
227 bool hasQPX() const { return HasQPX; }
228 bool hasVSX() const { return HasVSX; }
229 bool hasP8Vector() const { return HasP8Vector; }
230 bool hasP8Altivec() const { return HasP8Altivec; }
231 bool hasP8Crypto() const { return HasP8Crypto; }
232 bool hasMFOCRF() const { return HasMFOCRF; }
233 bool hasISEL() const { return HasISEL; }
234 bool hasPOPCNTD() const { return HasPOPCNTD; }
235 bool hasBPERMD() const { return HasBPERMD; }
236 bool hasExtDiv() const { return HasExtDiv; }
237 bool hasCMPB() const { return HasCMPB; }
238 bool hasLDBRX() const { return HasLDBRX; }
239 bool isBookE() const { return IsBookE; }
240 bool hasOnlyMSYNC() const { return HasOnlyMSYNC; }
241 bool isPPC4xx() const { return IsPPC4xx; }
242 bool isPPC6xx() const { return IsPPC6xx; }
243 bool isE500() const { return IsE500; }
244 bool isFeatureMFTB() const { return FeatureMFTB; }
245 bool isDeprecatedDST() const { return DeprecatedDST; }
246 bool hasICBT() const { return HasICBT; }
247 bool hasInvariantFunctionDescriptors() const {
248 return HasInvariantFunctionDescriptors;
250 bool hasPartwordAtomics() const { return HasPartwordAtomics; }
251 bool hasDirectMove() const { return HasDirectMove; }
253 bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
254 unsigned getPlatformStackAlignment() const {
255 if ((hasQPX() || isBGQ()) && !isQPXStackUnaligned())
260 bool hasHTM() const { return HasHTM; }
261 bool hasFusion() const { return HasFusion; }
263 const Triple &getTargetTriple() const { return TargetTriple; }
265 /// isDarwin - True if this is any darwin platform.
266 bool isDarwin() const { return TargetTriple.isMacOSX(); }
267 /// isBGQ - True if this is a BG/Q platform.
268 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
270 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
271 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
273 bool isDarwinABI() const { return isTargetMachO() || isDarwin(); }
274 bool isSVR4ABI() const { return !isDarwinABI(); }
275 bool isELFv2ABI() const;
277 bool enableEarlyIfConversion() const override { return hasISEL(); }
279 // Scheduling customization.
280 bool enableMachineScheduler() const override;
281 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
282 bool enablePostRAScheduler() const override;
283 AntiDepBreakMode getAntiDepBreakMode() const override;
284 void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override;
286 void overrideSchedPolicy(MachineSchedPolicy &Policy,
289 unsigned NumRegionInstrs) const override;
290 bool useAA() const override;
292 bool enableSubRegLiveness() const override;
294 /// classifyGlobalReference - Classify a global variable reference for the
295 /// current subtarget accourding to how we should reference it.
296 unsigned char classifyGlobalReference(const GlobalValue *GV) const;
298 } // End llvm namespace