1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/JITCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetOptions.h"
30 class PPCCodeEmitter : public MachineFunctionPass {
33 MachineModuleInfo *MMI;
35 void getAnalysisUsage(AnalysisUsage &AU) const {
36 AU.addRequired<MachineModuleInfo>();
37 MachineFunctionPass::getAnalysisUsage(AU);
42 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
43 /// its address in the function into this pointer.
44 void *MovePCtoLROffset;
47 PPCCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
48 : MachineFunctionPass(ID), TM(tm), MCE(mce) {}
50 /// getBinaryCodeForInstr - This function, generated by the
51 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
52 /// machine instructions.
53 unsigned getBinaryCodeForInstr(const MachineInstr &MI) const;
56 MachineRelocation GetRelocation(const MachineOperand &MO,
57 unsigned RelocID) const;
59 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
60 unsigned getMachineOpValue(const MachineInstr &MI,
61 const MachineOperand &MO) const;
63 unsigned get_crbitm_encoding(const MachineInstr &MI, unsigned OpNo) const;
64 unsigned getDirectBrEncoding(const MachineInstr &MI, unsigned OpNo) const;
65 unsigned getCondBrEncoding(const MachineInstr &MI, unsigned OpNo) const;
67 unsigned getHA16Encoding(const MachineInstr &MI, unsigned OpNo) const;
68 unsigned getLO16Encoding(const MachineInstr &MI, unsigned OpNo) const;
69 unsigned getLO14Encoding(const MachineInstr &MI, unsigned OpNo) const;
71 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
73 /// runOnMachineFunction - emits the given MachineFunction to memory
75 bool runOnMachineFunction(MachineFunction &MF);
77 /// emitBasicBlock - emits the given MachineBasicBlock to memory
79 void emitBasicBlock(MachineBasicBlock &MBB);
83 char PPCCodeEmitter::ID = 0;
85 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
86 /// to the specified MCE object.
87 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
88 JITCodeEmitter &JCE) {
89 return new PPCCodeEmitter(TM, JCE);
92 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
93 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
94 MF.getTarget().getRelocationModel() != Reloc::Static) &&
95 "JIT relocation model must be set to static or default!");
97 MMI = &getAnalysis<MachineModuleInfo>();
98 MCE.setModuleInfo(MMI);
100 MovePCtoLROffset = 0;
101 MCE.startFunction(MF);
102 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
104 } while (MCE.finishFunction(MF));
109 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
110 MCE.StartMachineBasicBlock(&MBB);
112 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
113 const MachineInstr &MI = *I;
114 MCE.processDebugLoc(MI.getDebugLoc(), true);
115 switch (MI.getOpcode()) {
117 MCE.emitWordBE(getBinaryCodeForInstr(MI));
119 case TargetOpcode::PROLOG_LABEL:
120 case TargetOpcode::EH_LABEL:
121 MCE.emitLabel(MI.getOperand(0).getMCSymbol());
123 case TargetOpcode::IMPLICIT_DEF:
124 case TargetOpcode::KILL:
125 break; // pseudo opcode, no side effects
126 case PPC::MovePCtoLR:
127 case PPC::MovePCtoLR8:
128 assert(TM.getRelocationModel() == Reloc::PIC_);
129 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
130 MCE.emitWordBE(0x48000005); // bl 1
133 MCE.processDebugLoc(MI.getDebugLoc(), false);
137 unsigned PPCCodeEmitter::get_crbitm_encoding(const MachineInstr &MI,
138 unsigned OpNo) const {
139 const MachineOperand &MO = MI.getOperand(OpNo);
140 assert((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
141 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
142 return 0x80 >> PPCRegisterInfo::getRegisterNumbering(MO.getReg());
145 MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO,
146 unsigned RelocID) const {
147 // If in PIC mode, we need to encode the negated address of the
148 // 'movepctolr' into the unrelocated field. After relocation, we'll have
149 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
150 // field, we get &gv. This doesn't happen for branch relocations, which are
151 // always implicitly pc relative.
153 if (TM.getRelocationModel() == Reloc::PIC_) {
154 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
155 Cst = -(intptr_t)MovePCtoLROffset - 4;
159 return MachineRelocation::getGV(MCE.getCurrentPCOffset(), RelocID,
160 const_cast<GlobalValue *>(MO.getGlobal()),
161 Cst, isa<Function>(MO.getGlobal()));
163 return MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
164 RelocID, MO.getSymbolName(), Cst);
166 return MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
167 RelocID, MO.getIndex(), Cst);
170 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
171 RelocID, MO.getMBB()));
174 return MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
175 RelocID, MO.getIndex(), Cst);
178 unsigned PPCCodeEmitter::getDirectBrEncoding(const MachineInstr &MI,
179 unsigned OpNo) const {
180 const MachineOperand &MO = MI.getOperand(OpNo);
181 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
183 MCE.addRelocation(GetRelocation(MO, PPC::reloc_pcrel_bx));
187 unsigned PPCCodeEmitter::getCondBrEncoding(const MachineInstr &MI,
188 unsigned OpNo) const {
189 const MachineOperand &MO = MI.getOperand(OpNo);
190 MCE.addRelocation(GetRelocation(MO, PPC::reloc_pcrel_bcx));
194 unsigned PPCCodeEmitter::getHA16Encoding(const MachineInstr &MI,
195 unsigned OpNo) const {
196 const MachineOperand &MO = MI.getOperand(OpNo);
197 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
199 MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_high));
203 unsigned PPCCodeEmitter::getLO16Encoding(const MachineInstr &MI,
204 unsigned OpNo) const {
205 const MachineOperand &MO = MI.getOperand(OpNo);
206 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
208 MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low));
212 unsigned PPCCodeEmitter::getLO14Encoding(const MachineInstr &MI,
213 unsigned OpNo) const {
214 const MachineOperand &MO = MI.getOperand(OpNo);
215 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
217 MCE.addRelocation(GetRelocation(MO, PPC::reloc_absolute_low_ix));
222 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
223 const MachineOperand &MO) const {
226 assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF);
227 return PPCRegisterInfo::getRegisterNumbering(MO.getReg());
233 if (MO.isGlobal() || MO.isSymbol() || MO.isCPI() || MO.isJTI()) {
235 assert((TM.getRelocationModel() != Reloc::PIC_ || MovePCtoLROffset) &&
236 "MovePCtoLR not seen yet?");
237 switch (MI.getOpcode()) {
238 default: MI.dump(); llvm_unreachable("Unknown instruction for relocation!");
260 Reloc = PPC::reloc_absolute_low;
267 Reloc = PPC::reloc_absolute_low_ix;
271 MCE.addRelocation(GetRelocation(MO, Reloc));
274 errs() << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
282 #include "PPCGenCodeEmitter.inc"