1 //===-- PowerPCBranchSelector.cpp - Emit long conditional branches-*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Nate Baegeman and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that scans a machine function to determine which
11 // conditional branches need more than 16 bits of displacement to reach their
12 // target basic block. It does this in two passes; a calculation of basic block
13 // positions pass, and a branch psuedo op to machine branch opcode pass. This
14 // pass should be run last, just before the assembly printer.
16 //===----------------------------------------------------------------------===//
18 #define DEBUG_TYPE "bsel"
20 #include "PowerPCInstrBuilder.h"
21 #include "PowerPCInstrInfo.h"
22 #include "PPC32InstrInfo.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/Support/Debug.h"
30 struct BSel : public MachineFunctionPass {
31 // OffsetMap - Mapping between BB and byte offset from start of function
32 std::map<MachineBasicBlock*, unsigned> OffsetMap;
34 /// bytesForOpcode - A convenience function for totalling up the number of
35 /// bytes in a basic block.
37 static unsigned bytesForOpcode(unsigned opcode) {
39 case PPC::COND_BRANCH:
40 // while this will be 4 most of the time, if we emit 12 it is just a
41 // minor pessimization that saves us from having to worry about
42 // keeping the offsets up to date later when we emit long branch glue.
45 // MovePCtoLR is actually a combination of a branch-and-link (bl)
46 // followed by a move from link register to dest reg (mflr)
49 case PPC::IMPLICIT_DEF: // no asm emitted
53 return 4; // PowerPC instructions are all 4 bytes
58 virtual bool runOnMachineFunction(MachineFunction &Fn) {
59 // Running total of instructions encountered since beginning of function
60 unsigned ByteCount = 0;
62 // For each MBB, add its offset to the offset map, and count up its
64 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
66 MachineBasicBlock *MBB = MFI;
67 OffsetMap[MBB] = ByteCount;
69 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
71 ByteCount += bytesForOpcode(MBBI->getOpcode());
74 // We're about to run over the MBB's again, so reset the ByteCount
77 // For each MBB, find the conditional branch pseudo instructions, and
78 // calculate the difference between the target MBB and the current ICount
79 // to decide whether or not to emit a short or long branch.
87 // b .L_FALLTHROUGH_MBB
89 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
91 MachineBasicBlock *MBB = MFI;
93 for (MachineBasicBlock::iterator MBBI = MBB->begin(), EE = MBB->end();
95 if (MBBI->getOpcode() == PPC::COND_BRANCH) {
96 // condbranch operands:
100 // 3. fallthrough MBB
101 MachineBasicBlock *trueMBB =
102 MBBI->getOperand(2).getMachineBasicBlock();
103 MachineBasicBlock *falseMBB =
104 MBBI->getOperand(3).getMachineBasicBlock();
106 int Displacement = OffsetMap[trueMBB] - ByteCount;
107 unsigned Opcode = MBBI->getOperand(1).getImmedValue();
108 unsigned Inverted = PPC32InstrInfo::invertPPCBranchOpcode(Opcode);
110 MachineInstr *MI = MBBI;
111 if (Displacement >= -32768 && Displacement <= 32767) {
112 BuildMI(*MBB, MBBI, Opcode, 2).addReg(PPC::CR0).addMBB(trueMBB);
114 BuildMI(*MBB, MBBI, Inverted, 2).addReg(PPC::CR0).addSImm(8);
115 BuildMI(*MBB, MBBI, PPC::B, 1).addMBB(trueMBB);
116 BuildMI(*MBB, MBBI, PPC::B, 1).addMBB(falseMBB);
120 ByteCount += bytesForOpcode(MBBI->getOpcode());
128 virtual const char *getPassName() const {
129 return "PowerPC Branch Selection";
134 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
137 FunctionPass *llvm::createPPCBranchSelectionPass() {