1 //===-- PTXTargetMachine.cpp - Define TargetMachine for PTX ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PTX target.
12 //===----------------------------------------------------------------------===//
14 #include "PTXTargetMachine.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/Analysis/Passes.h"
18 #include "llvm/Analysis/Verifier.h"
19 #include "llvm/Assembly/PrintModulePass.h"
20 #include "llvm/CodeGen/AsmPrinter.h"
21 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
22 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/MC/MCAsmInfo.h"
25 #include "llvm/MC/MCInstrInfo.h"
26 #include "llvm/MC/MCStreamer.h"
27 #include "llvm/MC/MCSubtargetInfo.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/TargetRegistry.h"
30 #include "llvm/Support/raw_ostream.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetLoweringObjectFile.h"
35 #include "llvm/Target/TargetMachine.h"
36 #include "llvm/Target/TargetOptions.h"
37 #include "llvm/Target/TargetRegisterInfo.h"
38 #include "llvm/Target/TargetSubtargetInfo.h"
39 #include "llvm/Transforms/Scalar.h"
45 MCStreamer *createPTXAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
46 bool isVerboseAsm, bool useLoc,
47 bool useCFI, bool useDwarfDirectory,
48 MCInstPrinter *InstPrint,
54 extern "C" void LLVMInitializePTXTarget() {
56 RegisterTargetMachine<PTX32TargetMachine> X(ThePTX32Target);
57 RegisterTargetMachine<PTX64TargetMachine> Y(ThePTX64Target);
59 TargetRegistry::RegisterAsmStreamer(ThePTX32Target, createPTXAsmStreamer);
60 TargetRegistry::RegisterAsmStreamer(ThePTX64Target, createPTXAsmStreamer);
64 const char* DataLayout32 =
65 "e-p:32:32-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
66 const char* DataLayout64 =
67 "e-p:64:64-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
70 // DataLayout and FrameLowering are filled with dummy data
71 PTXTargetMachine::PTXTargetMachine(const Target &T,
72 StringRef TT, StringRef CPU, StringRef FS,
73 const TargetOptions &Options,
74 Reloc::Model RM, CodeModel::Model CM,
77 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
78 DataLayout(is64Bit ? DataLayout64 : DataLayout32),
79 Subtarget(TT, CPU, FS, is64Bit),
80 FrameLowering(Subtarget),
86 void PTX32TargetMachine::anchor() { }
88 PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT,
89 StringRef CPU, StringRef FS,
90 const TargetOptions &Options,
91 Reloc::Model RM, CodeModel::Model CM,
93 : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
96 void PTX64TargetMachine::anchor() { }
98 PTX64TargetMachine::PTX64TargetMachine(const Target &T, StringRef TT,
99 StringRef CPU, StringRef FS,
100 const TargetOptions &Options,
101 Reloc::Model RM, CodeModel::Model CM,
102 CodeGenOpt::Level OL)
103 : PTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
107 /// PTX Code Generator Pass Configuration Options.
108 class PTXPassConfig : public TargetPassConfig {
110 PTXPassConfig(PTXTargetMachine *TM, PassManagerBase &PM)
111 : TargetPassConfig(TM, PM) {}
113 PTXTargetMachine &getPTXTargetMachine() const {
114 return getTM<PTXTargetMachine>();
117 bool addInstSelector();
118 FunctionPass *createTargetRegisterAllocator(bool);
119 void addOptimizedRegAlloc(FunctionPass *RegAllocPass);
120 bool addPostRegAlloc();
121 void addMachineLateOptimization();
122 bool addPreEmitPass();
126 TargetPassConfig *PTXTargetMachine::createPassConfig(PassManagerBase &PM) {
127 PTXPassConfig *PassConfig = new PTXPassConfig(this, PM);
128 PassConfig->disablePass(PrologEpilogCodeInserterID);
132 bool PTXPassConfig::addInstSelector() {
133 PM.add(createPTXISelDag(getPTXTargetMachine(), getOptLevel()));
137 FunctionPass *PTXPassConfig::createTargetRegisterAllocator(bool /*Optimized*/) {
138 return createPTXRegisterAllocator();
141 // Modify the optimized compilation path to bypass optimized register alloction.
142 void PTXPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
143 addFastRegAlloc(RegAllocPass);
146 bool PTXPassConfig::addPostRegAlloc() {
147 // PTXMFInfoExtract must after register allocation!
148 //PM.add(createPTXMFInfoExtract(getPTXTargetMachine()));
152 /// Add passes that optimize machine instructions after register allocation.
153 void PTXPassConfig::addMachineLateOptimization() {
154 if (addPass(BranchFolderPassID) != &NoPassID)
155 printAndVerify("After BranchFolding");
157 if (addPass(TailDuplicateID) != &NoPassID)
158 printAndVerify("After TailDuplicate");
161 bool PTXPassConfig::addPreEmitPass() {
162 PM.add(createPTXMFInfoExtract(getPTXTargetMachine(), getOptLevel()));
163 PM.add(createPTXFPRoundingModePass(getPTXTargetMachine(), getOptLevel()));