1 //===- MipsRegisterInfo.cpp - MIPS Register Information -== -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Bruno Cardoso Lopes and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MIPS implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-reg-info"
17 #include "MipsRegisterInfo.h"
18 #include "MipsMachineFunction.h"
19 #include "llvm/Constants.h"
20 #include "llvm/Type.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/ValueTypes.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineLocation.h"
27 #include "llvm/Target/TargetFrameInfo.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetOptions.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/ADT/BitVector.h"
34 #include "llvm/ADT/STLExtras.h"
35 //#include "MipsSubtarget.h"
39 // TODO: add subtarget support
40 MipsRegisterInfo::MipsRegisterInfo(const TargetInstrInfo &tii)
41 : MipsGenRegisterInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP),
44 /// getRegisterNumbering - Given the enum value for some register, e.g.
45 /// Mips::RA, return the number that it corresponds to (e.g. 31).
46 unsigned MipsRegisterInfo::
47 getRegisterNumbering(unsigned RegEnum)
50 case Mips::ZERO : return 0;
51 case Mips::AT : return 1;
52 case Mips::V0 : return 2;
53 case Mips::V1 : return 3;
54 case Mips::A0 : return 4;
55 case Mips::A1 : return 5;
56 case Mips::A2 : return 6;
57 case Mips::A3 : return 7;
58 case Mips::T0 : return 8;
59 case Mips::T1 : return 9;
60 case Mips::T2 : return 10;
61 case Mips::T3 : return 11;
62 case Mips::T4 : return 12;
63 case Mips::T5 : return 13;
64 case Mips::T6 : return 14;
65 case Mips::T7 : return 15;
66 case Mips::T8 : return 16;
67 case Mips::T9 : return 17;
68 case Mips::S0 : return 18;
69 case Mips::S1 : return 19;
70 case Mips::S2 : return 20;
71 case Mips::S3 : return 21;
72 case Mips::S4 : return 22;
73 case Mips::S5 : return 23;
74 case Mips::S6 : return 24;
75 case Mips::S7 : return 25;
76 case Mips::K0 : return 26;
77 case Mips::K1 : return 27;
78 case Mips::GP : return 28;
79 case Mips::SP : return 29;
80 case Mips::FP : return 30;
81 case Mips::RA : return 31;
82 default: assert(0 && "Unknown register number!");
86 void MipsRegisterInfo::
87 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
88 unsigned SrcReg, int FI,
89 const TargetRegisterClass *RC) const
91 if (RC == Mips::CPURegsRegisterClass)
92 BuildMI(MBB, I, TII.get(Mips::SW)).addReg(SrcReg, false, false, true)
93 .addImm(0).addFrameIndex(FI);
95 assert(0 && "Can't store this register to stack slot");
98 void MipsRegisterInfo::
99 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
100 unsigned DestReg, int FI,
101 const TargetRegisterClass *RC) const
103 if (RC == Mips::CPURegsRegisterClass)
104 BuildMI(MBB, I, TII.get(Mips::LW), DestReg).addImm(0).addFrameIndex(FI);
106 assert(0 && "Can't load this register from stack slot");
109 void MipsRegisterInfo::
110 copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
111 unsigned DestReg, unsigned SrcReg,
112 const TargetRegisterClass *RC) const
114 if (RC == Mips::CPURegsRegisterClass)
115 BuildMI(MBB, I, TII.get(Mips::ADDu), DestReg).addReg(Mips::ZERO)
118 assert (0 && "Can't copy this register");
121 void MipsRegisterInfo::reMaterialize(MachineBasicBlock &MBB,
122 MachineBasicBlock::iterator I,
124 const MachineInstr *Orig) const
126 MachineInstr *MI = Orig->clone();
127 MI->getOperand(0).setReg(DestReg);
131 MachineInstr *MipsRegisterInfo::
132 foldMemoryOperand(MachineInstr* MI, unsigned OpNum, int FI) const
134 MachineInstr *NewMI = NULL;
136 switch (MI->getOpcode())
139 if ((MI->getOperand(0).isRegister()) &&
140 (MI->getOperand(1).isRegister()) &&
141 (MI->getOperand(1).getReg() == Mips::ZERO) &&
142 (MI->getOperand(2).isRegister()))
144 if (OpNum == 0) // COPY -> STORE
145 NewMI = BuildMI(TII.get(Mips::SW)).addFrameIndex(FI)
146 .addImm(0).addReg(MI->getOperand(2).getReg());
148 NewMI = BuildMI(TII.get(Mips::LW), MI->getOperand(0)
149 .getReg()).addImm(0).addFrameIndex(FI);
155 NewMI->copyKillDeadInfo(MI);
159 //===----------------------------------------------------------------------===//
161 // Callee Saved Registers methods
163 //===----------------------------------------------------------------------===//
165 /// Mips Callee Saved Registers
166 const unsigned* MipsRegisterInfo::
167 getCalleeSavedRegs(const MachineFunction *MF) const
169 // Mips calle-save register range is $16-$26(s0-s7)
170 static const unsigned CalleeSavedRegs[] = {
171 Mips::S0, Mips::S1, Mips::S2, Mips::S3,
172 Mips::S4, Mips::S5, Mips::S6, Mips::S7, 0
174 return CalleeSavedRegs;
177 /// Mips Callee Saved Register Classes
178 const TargetRegisterClass* const*
179 MipsRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const
181 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
182 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
183 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
184 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass,
185 &Mips::CPURegsRegClass, &Mips::CPURegsRegClass, 0
187 return CalleeSavedRegClasses;
190 BitVector MipsRegisterInfo::
191 getReservedRegs(const MachineFunction &MF) const
193 BitVector Reserved(getNumRegs());
194 Reserved.set(Mips::ZERO);
195 Reserved.set(Mips::AT);
196 Reserved.set(Mips::K0);
197 Reserved.set(Mips::K1);
198 Reserved.set(Mips::GP);
199 Reserved.set(Mips::SP);
200 Reserved.set(Mips::FP);
201 Reserved.set(Mips::RA);
205 //===----------------------------------------------------------------------===//
207 // Stack Frame Processing methods
208 // +----------------------------+
210 // The stack is allocated decrementing the stack pointer on
211 // the first instruction of a function prologue. Once decremented,
212 // all stack referencesare are done thought a positive offset
213 // from the stack/frame pointer, so the stack is considering
214 // to grow up! Otherwise terrible hacks would have to be made
215 // to get this stack ABI compliant :)
217 // The stack frame required by the ABI:
222 // . saved $GP (used in PIC - not supported yet)
224 // . saved "Callee Saved" Registers
227 // StackSize -----------
229 // Offset - offset from sp after stack allocation on function prologue
231 // The sp is the stack pointer subtracted/added from the stack size
232 // at the Prologue/Epilogue
234 // References to the previous stack (to obtain arguments) are done
235 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
238 // - reference to the actual stack frame
239 // for any local area var there is smt like : FI >= 0, StackOffset: 4
242 // - reference to previous stack frame
243 // suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
244 // The emitted instruction will be something like:
245 // lw REGX, 16+StackSize(SP)
247 // Since the total stack size is unknown on LowerFORMAL_ARGUMENTS, all
248 // stack references (ObjectOffset) created to reference the function
249 // arguments, are negative numbers. This way, on eliminateFrameIndex it's
250 // possible to detect those references and the offsets are adjusted to
251 // their real location.
255 //===----------------------------------------------------------------------===//
257 // hasFP - Return true if the specified function should have a dedicated frame
258 // pointer register. This is true if the function has variable sized allocas or
259 // if frame pointer elimination is disabled.
260 bool MipsRegisterInfo::
261 hasFP(const MachineFunction &MF) const {
262 return (NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects());
265 // This function eliminate ADJCALLSTACKDOWN,
266 // ADJCALLSTACKUP pseudo instructions
267 void MipsRegisterInfo::
268 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
269 MachineBasicBlock::iterator I) const {
270 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
274 // FrameIndex represent objects inside a abstract stack.
275 // We must replace FrameIndex with an stack/frame pointer
277 void MipsRegisterInfo::
278 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
279 RegScavenger *RS) const
281 MachineInstr &MI = *II;
282 MachineFunction &MF = *MI.getParent()->getParent();
285 while (!MI.getOperand(i).isFrameIndex()) {
287 assert(i < MI.getNumOperands() &&
288 "Instr doesn't have FrameIndex operand!");
291 int FrameIndex = MI.getOperand(i).getFrameIndex();
292 int stackSize = MF.getFrameInfo()->getStackSize();
293 int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
296 DOUT << "\nFunction : " << MF.getFunction()->getName() << "\n";
297 DOUT << "<--------->\n";
299 DOUT << "FrameIndex : " << FrameIndex << "\n";
300 DOUT << "spOffset : " << spOffset << "\n";
301 DOUT << "stackSize : " << stackSize << "\n";
304 // as explained on LowerFORMAL_ARGUMENTS, detect negative offsets
305 // and adjust SPOffsets considering the final stack size.
306 int Offset = ((spOffset < 0) ? (stackSize + (-(spOffset+4))) : (spOffset));
307 Offset += MI.getOperand(i-1).getImm();
310 DOUT << "Offset : " << Offset << "\n";
311 DOUT << "<--------->\n";
314 MI.getOperand(i-1).ChangeToImmediate(Offset);
315 MI.getOperand(i).ChangeToRegister(getFrameRegister(MF),false);
318 void MipsRegisterInfo::
319 emitPrologue(MachineFunction &MF) const
321 MachineBasicBlock &MBB = MF.front();
322 MachineFrameInfo *MFI = MF.getFrameInfo();
323 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
324 MachineBasicBlock::iterator MBBI = MBB.begin();
326 // Replace the dummy '0' SPOffset by the negative offsets, as
327 // explained on LowerFORMAL_ARGUMENTS
328 MipsFI->adjustLoadArgsFI(MFI);
329 MipsFI->adjustStoreVarArgsFI(MFI);
331 // Get the number of bytes to allocate from the FrameInfo.
332 int NumBytes = (int) MFI->getStackSize();
335 DOUT << "\n<--- EMIT PROLOGUE --->\n";
336 DOUT << "Actual Stack size :" << NumBytes << "\n";
339 // No need to allocate space on the stack.
340 if (NumBytes == 0) return;
342 int FPOffset, RAOffset;
344 // Allocate space for saved RA and FP when needed
345 if ((hasFP(MF)) && (MFI->hasCalls())) {
347 RAOffset = (NumBytes+4);
349 } else if ((!hasFP(MF)) && (MFI->hasCalls())) {
353 } else if ((hasFP(MF)) && (!MFI->hasCalls())) {
359 MFI->setObjectOffset(MFI->CreateStackObject(4,4), FPOffset);
360 MFI->setObjectOffset(MFI->CreateStackObject(4,4), RAOffset);
361 MipsFI->setFPStackOffset(FPOffset);
362 MipsFI->setRAStackOffset(RAOffset);
365 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
366 NumBytes = ((NumBytes+Align-1)/Align*Align);
369 DOUT << "FPOffset :" << FPOffset << "\n";
370 DOUT << "RAOffset :" << RAOffset << "\n";
371 DOUT << "New stack size :" << NumBytes << "\n\n";
375 MFI->setStackSize(NumBytes);
377 // Adjust stack : addi sp, sp, (-imm)
378 BuildMI(MBB, MBBI, TII.get(Mips::ADDiu), Mips::SP)
379 .addReg(Mips::SP).addImm(-NumBytes);
381 // Save the return address only if the function isnt a leaf one.
382 // sw $ra, stack_loc($sp)
383 if (MFI->hasCalls()) {
384 BuildMI(MBB, MBBI, TII.get(Mips::SW))
385 .addReg(Mips::RA).addImm(RAOffset).addReg(Mips::SP);
388 // if framepointer enabled, save it and set it
389 // to point to the stack pointer
391 // sw $fp,stack_loc($sp)
392 BuildMI(MBB, MBBI, TII.get(Mips::SW))
393 .addReg(Mips::FP).addImm(FPOffset).addReg(Mips::SP);
396 BuildMI(MBB, MBBI, TII.get(Mips::ADDu), Mips::FP)
397 .addReg(Mips::SP).addReg(Mips::ZERO);
401 void MipsRegisterInfo::
402 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
404 MachineBasicBlock::iterator MBBI = prior(MBB.end());
405 MachineFrameInfo *MFI = MF.getFrameInfo();
406 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
408 // Get the number of bytes from FrameInfo
409 int NumBytes = (int) MFI->getStackSize();
411 // Get the FI's where RA and FP are saved.
412 int FPOffset = MipsFI->getFPStackOffset();
413 int RAOffset = MipsFI->getRAStackOffset();
415 // if framepointer enabled, restore it and restore the
419 BuildMI(MBB, MBBI, TII.get(Mips::ADDu), Mips::SP)
420 .addReg(Mips::FP).addReg(Mips::ZERO);
422 // lw $fp,stack_loc($sp)
423 BuildMI(MBB, MBBI, TII.get(Mips::LW))
424 .addReg(Mips::FP).addImm(FPOffset).addReg(Mips::SP);
427 // Restore the return address only if the function isnt a leaf one.
428 // lw $ra, stack_loc($sp)
429 if (MFI->hasCalls()) {
430 BuildMI(MBB, MBBI, TII.get(Mips::LW))
431 .addReg(Mips::RA).addImm(RAOffset).addReg(Mips::SP);
434 // adjust stack : insert addi sp, sp, (imm)
436 BuildMI(MBB, MBBI, TII.get(Mips::ADDiu), Mips::SP)
437 .addReg(Mips::SP).addImm(NumBytes);
441 void MipsRegisterInfo::
442 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
445 unsigned MipsRegisterInfo::
446 getRARegister() const {
450 unsigned MipsRegisterInfo::
451 getFrameRegister(MachineFunction &MF) const {
452 return hasFP(MF) ? Mips::FP : Mips::SP;
455 unsigned MipsRegisterInfo::
456 getEHExceptionRegister() const {
457 assert(0 && "What is the exception register");
461 unsigned MipsRegisterInfo::
462 getEHHandlerRegister() const {
463 assert(0 && "What is the exception handler register");
467 #include "MipsGenRegisterInfo.inc"