1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm2 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 def uimm3 : Operand<i32> {
69 let PrintMethod = "printUnsignedImm";
72 def uimm4 : Operand<i32> {
73 let PrintMethod = "printUnsignedImm";
76 def uimm8 : Operand<i32> {
77 let PrintMethod = "printUnsignedImm";
80 def simm5 : Operand<i32>;
82 def simm10 : Operand<i32>;
84 def vsplat_uimm1 : Operand<vAny> {
85 let PrintMethod = "printUnsignedImm8";
88 def vsplat_uimm2 : Operand<vAny> {
89 let PrintMethod = "printUnsignedImm8";
92 def vsplat_uimm3 : Operand<vAny> {
93 let PrintMethod = "printUnsignedImm";
96 def vsplat_uimm4 : Operand<vAny> {
97 let PrintMethod = "printUnsignedImm";
100 def vsplat_uimm5 : Operand<vAny> {
101 let PrintMethod = "printUnsignedImm";
104 def vsplat_uimm6 : Operand<vAny> {
105 let PrintMethod = "printUnsignedImm";
108 def vsplat_uimm8 : Operand<vAny> {
109 let PrintMethod = "printUnsignedImm";
112 def vsplat_simm5 : Operand<vAny>;
114 def vsplat_simm10 : Operand<vAny>;
116 def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>;
119 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
120 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
121 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
122 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
123 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
124 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
126 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
127 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
128 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
129 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
130 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
131 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
133 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
134 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
135 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
136 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
137 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
138 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
140 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
141 PatFrag<(ops node:$lhs, node:$rhs),
142 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
144 // ISD::SETFALSE cannot occur
145 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
146 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
147 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
148 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
149 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
150 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
151 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
152 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
153 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
154 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
155 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
156 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
157 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
158 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
159 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
160 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
161 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
162 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
163 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
164 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
165 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
166 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
167 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
168 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
169 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
170 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
171 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
172 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
173 // ISD::SETTRUE cannot occur
174 // ISD::SETFALSE2 cannot occur
175 // ISD::SETTRUE2 cannot occur
177 class vsetcc_type<ValueType ResTy, CondCode CC> :
178 PatFrag<(ops node:$lhs, node:$rhs),
179 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
181 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
182 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
183 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
184 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
185 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
186 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
187 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
188 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
189 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
190 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
191 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
192 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
193 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
194 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
195 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
196 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
197 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
198 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
199 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
200 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
202 def vsplati8 : PatFrag<(ops node:$e0),
203 (v16i8 (build_vector node:$e0, node:$e0,
210 node:$e0, node:$e0))>;
211 def vsplati16 : PatFrag<(ops node:$e0),
212 (v8i16 (build_vector node:$e0, node:$e0,
215 node:$e0, node:$e0))>;
216 def vsplati32 : PatFrag<(ops node:$e0),
217 (v4i32 (build_vector node:$e0, node:$e0,
218 node:$e0, node:$e0))>;
219 def vsplati64 : PatFrag<(ops node:$e0),
220 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
221 def vsplatf32 : PatFrag<(ops node:$e0),
222 (v4f32 (build_vector node:$e0, node:$e0,
223 node:$e0, node:$e0))>;
224 def vsplatf64 : PatFrag<(ops node:$e0),
225 (v2f64 (build_vector node:$e0, node:$e0))>;
227 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
228 SDNodeXForm xform = NOOP_SDNodeXForm>
229 : PatLeaf<frag, pred, xform> {
230 Operand OpClass = opclass;
233 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
234 list<SDNode> roots = [],
235 list<SDNodeProperty> props = []> :
236 ComplexPattern<ty, numops, fn, roots, props> {
237 Operand OpClass = opclass;
240 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
242 [build_vector, bitconvert]>;
244 def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1,
246 [build_vector, bitconvert]>;
248 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
250 [build_vector, bitconvert]>;
252 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
254 [build_vector, bitconvert]>;
256 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
258 [build_vector, bitconvert]>;
260 def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1,
262 [build_vector, bitconvert]>;
264 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
266 [build_vector, bitconvert]>;
268 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
270 [build_vector, bitconvert]>;
272 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
274 [build_vector, bitconvert]>;
276 def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1,
278 [build_vector, bitconvert]>;
280 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
282 [build_vector, bitconvert]>;
284 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
286 [build_vector, bitconvert]>;
288 def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1,
290 [build_vector, bitconvert]>;
292 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
294 [build_vector, bitconvert]>;
296 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
298 [build_vector, bitconvert]>;
300 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
302 [build_vector, bitconvert]>;
304 // Any build_vector that is a constant splat with a value that is an exact
306 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
307 [build_vector, bitconvert]>;
309 def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt),
310 (fsub node:$wd, (fmul node:$ws, node:$wt))>;
312 def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
313 (add node:$wd, (mul node:$ws, node:$wt))>;
315 def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt),
316 (sub node:$wd, (mul node:$ws, node:$wt))>;
319 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
320 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
322 // Instruction encoding.
323 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
324 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
325 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
326 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
328 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
329 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
330 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
331 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
333 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
334 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
335 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
336 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
338 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
339 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
340 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
341 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
343 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
344 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
345 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
346 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
348 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
349 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
350 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
351 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
353 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
355 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
357 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
358 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
359 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
360 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
362 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
363 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
364 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
365 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
367 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
368 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
369 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
370 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
372 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
373 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
374 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
375 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
377 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
378 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
379 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
380 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
382 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
383 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
384 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
385 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
387 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
388 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
389 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
390 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
392 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
393 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
394 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
395 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
397 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
398 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
399 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
400 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
402 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
403 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
404 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
405 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
407 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
408 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
409 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
410 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
412 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
413 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
414 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
415 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
417 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
419 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
421 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
423 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
425 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
426 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
427 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
428 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
430 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
431 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
432 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
433 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
435 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
436 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
437 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
438 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
440 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
442 class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>;
444 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
446 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
447 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
448 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
449 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
451 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
452 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
453 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
454 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
456 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
457 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
458 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
459 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
461 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
463 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
464 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
465 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
466 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
468 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
469 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
470 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
471 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
473 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
475 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
476 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
477 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
478 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
480 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
481 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
482 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
483 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
485 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
486 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
487 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
488 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
490 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
491 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
492 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
493 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
495 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
496 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
497 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
498 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
500 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
501 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
502 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
503 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
505 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
506 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
507 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
508 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
510 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
511 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
512 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
513 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
515 class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>;
516 class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>;
517 class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>;
519 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
520 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
521 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
523 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
525 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
526 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
527 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
528 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
530 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
531 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
532 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
533 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
535 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
536 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
537 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
539 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
540 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
541 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
543 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
544 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
545 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
547 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
548 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
549 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
551 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
552 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
553 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
555 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
556 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
557 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
559 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
560 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
562 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
563 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
565 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
566 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
568 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
569 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
571 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
572 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
574 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
575 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
577 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
578 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
580 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
581 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
583 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
584 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
586 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
587 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
589 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
590 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
592 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
593 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
595 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
596 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
598 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
599 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
601 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
602 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
604 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
605 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
607 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
608 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
610 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
611 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
613 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
614 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
616 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
617 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
619 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
620 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
622 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
623 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
625 class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>;
626 class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>;
627 class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>;
629 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
630 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
632 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
633 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
635 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
636 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
638 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
639 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
641 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
642 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
644 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
645 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
647 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
648 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
650 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
651 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
653 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
654 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
656 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
657 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
659 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
660 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
662 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
663 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
665 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
666 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
668 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
669 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
671 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
672 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
674 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
675 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
677 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
678 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
680 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
681 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
683 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
684 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
686 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
687 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
689 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
690 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
692 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
693 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
695 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
696 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
698 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
699 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
701 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
702 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
704 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
705 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
707 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
708 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
710 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
711 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
713 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
714 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
716 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
717 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
718 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
720 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
721 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
722 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
724 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
725 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
726 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
728 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
729 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
730 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
732 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
733 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
734 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
735 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
737 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
738 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
739 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
740 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
742 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
743 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
744 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
745 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
747 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
748 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
749 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
750 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
752 class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>;
753 class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>;
754 class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>;
756 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
757 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
758 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
759 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
761 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
762 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
763 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
764 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
766 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
767 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
768 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
769 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
771 class LSA_ENC : SPECIAL_LSA_FMT;
773 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
774 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
776 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
777 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
779 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
780 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
781 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
782 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
784 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
785 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
786 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
787 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
789 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
790 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
791 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
792 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
794 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
795 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
796 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
797 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
799 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
800 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
801 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
802 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
804 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
805 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
806 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
807 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
809 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
810 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
811 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
812 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
814 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
815 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
816 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
817 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
819 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
820 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
821 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
822 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
824 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
825 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
826 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
827 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
829 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
830 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
831 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
832 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
834 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
835 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
836 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
837 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
839 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
840 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
841 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
842 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
844 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
846 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
847 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
849 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
850 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
852 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
853 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
854 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
855 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
857 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>;
858 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>;
860 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
861 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
863 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
864 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
865 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
866 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
868 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
869 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
870 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
871 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
873 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
874 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
875 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
876 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
878 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
880 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
882 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
884 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
886 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
887 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
888 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
889 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
891 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
892 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
893 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
894 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
896 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
897 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
898 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
899 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
901 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
902 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
903 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
904 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
906 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
907 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
908 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
909 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
911 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
912 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
913 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
915 class SLD_B_ENC : MSA_3R_INDEX_FMT<0b000, 0b00, 0b010100>;
916 class SLD_H_ENC : MSA_3R_INDEX_FMT<0b000, 0b01, 0b010100>;
917 class SLD_W_ENC : MSA_3R_INDEX_FMT<0b000, 0b10, 0b010100>;
918 class SLD_D_ENC : MSA_3R_INDEX_FMT<0b000, 0b11, 0b010100>;
920 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
921 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
922 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
923 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
925 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
926 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
927 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
928 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
930 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
931 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
932 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
933 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
935 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
936 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
937 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
938 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
940 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
941 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
942 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
943 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
945 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
946 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
947 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
948 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
950 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
951 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
952 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
953 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
955 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
956 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
957 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
958 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
960 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
961 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
962 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
963 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
965 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
966 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
967 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
968 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
970 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
971 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
972 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
973 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
975 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
976 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
977 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
978 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
980 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
981 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
982 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
983 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
985 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
986 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
987 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
988 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
990 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
991 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
992 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
993 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
995 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
996 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
997 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
998 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
1000 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
1001 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
1002 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
1003 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
1005 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
1006 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
1007 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
1008 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
1010 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
1011 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
1012 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
1013 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
1015 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
1016 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
1017 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
1018 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
1020 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1021 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1022 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1023 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
1025 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
1027 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
1029 // Instruction desc.
1030 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1031 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1032 InstrItinClass itin = NoItinerary> {
1033 dag OutOperandList = (outs ROWD:$wd);
1034 dag InOperandList = (ins ROWS:$ws, uimm3:$m);
1035 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1036 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))];
1037 InstrItinClass Itinerary = itin;
1040 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1041 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1042 InstrItinClass itin = NoItinerary> {
1043 dag OutOperandList = (outs ROWD:$wd);
1044 dag InOperandList = (ins ROWS:$ws, uimm4:$m);
1045 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1046 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))];
1047 InstrItinClass Itinerary = itin;
1050 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1051 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1052 InstrItinClass itin = NoItinerary> {
1053 dag OutOperandList = (outs ROWD:$wd);
1054 dag InOperandList = (ins ROWS:$ws, uimm5:$m);
1055 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1056 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))];
1057 InstrItinClass Itinerary = itin;
1060 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1061 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1062 InstrItinClass itin = NoItinerary> {
1063 dag OutOperandList = (outs ROWD:$wd);
1064 dag InOperandList = (ins ROWS:$ws, uimm6:$m);
1065 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1066 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))];
1067 InstrItinClass Itinerary = itin;
1070 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1071 SplatComplexPattern SplatImm,
1072 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1073 InstrItinClass itin = NoItinerary> {
1074 dag OutOperandList = (outs ROWD:$wd);
1075 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m);
1076 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1077 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))];
1078 InstrItinClass Itinerary = itin;
1081 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1082 ValueType VecTy, RegisterOperand ROD,
1083 RegisterOperand ROWS,
1084 InstrItinClass itin = NoItinerary> {
1085 dag OutOperandList = (outs ROD:$rd);
1086 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1087 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1088 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))];
1089 InstrItinClass Itinerary = itin;
1092 class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1093 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1094 InstrItinClass itin = NoItinerary> {
1095 dag OutOperandList = (outs ROWD:$wd);
1096 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1097 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1098 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))];
1099 InstrItinClass Itinerary = itin;
1102 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1103 RegisterClass RCD, RegisterClass RCWS> :
1104 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n),
1105 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> {
1106 bit usesCustomInserter = 1;
1109 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1110 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1111 RegisterOperand ROWS = ROWD,
1112 InstrItinClass itin = NoItinerary> {
1113 dag OutOperandList = (outs ROWD:$wd);
1114 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm);
1115 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1116 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))];
1117 InstrItinClass Itinerary = itin;
1120 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1121 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1122 RegisterOperand ROWS = ROWD,
1123 InstrItinClass itin = NoItinerary> {
1124 dag OutOperandList = (outs ROWD:$wd);
1125 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8);
1126 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1127 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))];
1128 InstrItinClass Itinerary = itin;
1131 // This class is deprecated and will be removed in the next few patches
1132 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1133 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1134 InstrItinClass itin = NoItinerary> {
1135 dag OutOperandList = (outs ROWD:$wd);
1136 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1137 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1138 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))];
1139 InstrItinClass Itinerary = itin;
1142 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1143 RegisterOperand ROWS = ROWD,
1144 InstrItinClass itin = NoItinerary> {
1145 dag OutOperandList = (outs ROWD:$wd);
1146 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1147 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1148 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))];
1149 InstrItinClass Itinerary = itin;
1152 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1153 InstrItinClass itin = NoItinerary> {
1154 dag OutOperandList = (outs RCWD:$wd);
1155 dag InOperandList = (ins vsplat_simm10:$i10);
1156 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1157 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1158 list<dag> Pattern = [];
1159 bit hasSideEffects = 0;
1160 InstrItinClass Itinerary = itin;
1163 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1164 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1165 InstrItinClass itin = NoItinerary> {
1166 dag OutOperandList = (outs ROWD:$wd);
1167 dag InOperandList = (ins ROWS:$ws);
1168 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1169 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1170 InstrItinClass Itinerary = itin;
1173 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1174 SDPatternOperator OpNode, RegisterOperand ROWD,
1175 RegisterOperand ROS = ROWD,
1176 InstrItinClass itin = NoItinerary> {
1177 dag OutOperandList = (outs ROWD:$wd);
1178 dag InOperandList = (ins ROS:$rs);
1179 string AsmString = !strconcat(instr_asm, "\t$wd, $rs");
1180 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))];
1181 InstrItinClass Itinerary = itin;
1184 class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode,
1185 RegisterClass RCWD, RegisterClass RCWS = RCWD> :
1186 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs),
1187 [(set RCWD:$wd, (OpNode RCWS:$fs))]> {
1188 let usesCustomInserter = 1;
1191 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1192 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1193 InstrItinClass itin = NoItinerary> {
1194 dag OutOperandList = (outs ROWD:$wd);
1195 dag InOperandList = (ins ROWS:$ws);
1196 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1197 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1198 InstrItinClass Itinerary = itin;
1201 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1202 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1203 RegisterOperand ROWT = ROWD,
1204 InstrItinClass itin = NoItinerary> {
1205 dag OutOperandList = (outs ROWD:$wd);
1206 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1207 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1208 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1209 InstrItinClass Itinerary = itin;
1212 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1213 RegisterOperand ROWS = ROWD,
1214 RegisterOperand ROWT = ROWD,
1215 InstrItinClass itin = NoItinerary> {
1216 dag OutOperandList = (outs ROWD:$wd);
1217 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1218 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1219 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws,
1221 string Constraints = "$wd = $wd_in";
1222 InstrItinClass Itinerary = itin;
1225 class MSA_3R_INDEX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1226 RegisterOperand ROWD, RegisterOperand ROWS,
1227 RegisterOperand RORT,
1228 InstrItinClass itin = NoItinerary> {
1229 dag OutOperandList = (outs ROWD:$wd);
1230 dag InOperandList = (ins ROWS:$ws, RORT:$rt);
1231 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$rt]");
1232 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, RORT:$rt))];
1233 InstrItinClass Itinerary = itin;
1236 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1237 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1238 RegisterOperand ROWT = ROWD,
1239 InstrItinClass itin = NoItinerary> {
1240 dag OutOperandList = (outs ROWD:$wd);
1241 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1242 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1243 list<dag> Pattern = [(set ROWD:$wd,
1244 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))];
1245 InstrItinClass Itinerary = itin;
1246 string Constraints = "$wd = $wd_in";
1249 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1250 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1251 RegisterOperand ROWT = ROWD,
1252 InstrItinClass itin = NoItinerary> :
1253 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1255 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1256 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1257 RegisterOperand ROWT = ROWD,
1258 InstrItinClass itin = NoItinerary> :
1259 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1261 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1262 dag OutOperandList = (outs);
1263 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1264 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1265 list<dag> Pattern = [];
1266 InstrItinClass Itinerary = IIBranch;
1268 bit isTerminator = 1;
1269 bit hasDelaySlot = 1;
1270 list<Register> Defs = [AT];
1273 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1274 RegisterOperand ROWD, RegisterOperand ROS,
1275 InstrItinClass itin = NoItinerary> {
1276 dag OutOperandList = (outs ROWD:$wd);
1277 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n);
1278 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1279 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1282 InstrItinClass Itinerary = itin;
1283 string Constraints = "$wd = $wd_in";
1286 class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty,
1287 RegisterOperand ROWD, RegisterOperand ROFS> :
1288 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs),
1289 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs,
1291 bit usesCustomInserter = 1;
1292 string Constraints = "$wd = $wd_in";
1295 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1296 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1297 InstrItinClass itin = NoItinerary> {
1298 dag OutOperandList = (outs ROWD:$wd);
1299 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws);
1300 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1301 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1304 InstrItinClass Itinerary = itin;
1305 string Constraints = "$wd = $wd_in";
1308 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1309 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1310 RegisterOperand ROWT = ROWD,
1311 InstrItinClass itin = NoItinerary> {
1312 dag OutOperandList = (outs ROWD:$wd);
1313 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1314 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1315 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1316 InstrItinClass Itinerary = itin;
1319 class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
1320 RegisterOperand ROWD,
1321 RegisterOperand ROWS = ROWD,
1322 InstrItinClass itin = NoItinerary> {
1323 dag OutOperandList = (outs ROWD:$wd);
1324 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n);
1325 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1326 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws,
1328 InstrItinClass Itinerary = itin;
1331 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD,
1332 RegisterOperand ROWS = ROWD,
1333 RegisterOperand ROWT = ROWD> :
1334 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt),
1335 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>;
1337 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>,
1339 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>,
1341 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>,
1343 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>,
1346 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
1347 MSA128BOpnd>, IsCommutable;
1348 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
1349 MSA128HOpnd>, IsCommutable;
1350 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
1351 MSA128WOpnd>, IsCommutable;
1352 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
1353 MSA128DOpnd>, IsCommutable;
1355 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
1356 MSA128BOpnd>, IsCommutable;
1357 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
1358 MSA128HOpnd>, IsCommutable;
1359 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
1360 MSA128WOpnd>, IsCommutable;
1361 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
1362 MSA128DOpnd>, IsCommutable;
1364 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
1365 MSA128BOpnd>, IsCommutable;
1366 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
1367 MSA128HOpnd>, IsCommutable;
1368 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
1369 MSA128WOpnd>, IsCommutable;
1370 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
1371 MSA128DOpnd>, IsCommutable;
1373 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable;
1374 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable;
1375 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable;
1376 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable;
1378 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5,
1380 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5,
1382 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5,
1384 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5,
1387 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>;
1388 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>;
1389 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>;
1390 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>;
1392 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8,
1395 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
1397 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
1399 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
1401 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
1404 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
1406 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
1408 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
1410 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
1413 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>,
1415 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>,
1417 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>,
1419 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>,
1422 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>,
1424 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>,
1426 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>,
1428 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>,
1431 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
1432 MSA128BOpnd>, IsCommutable;
1433 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
1434 MSA128HOpnd>, IsCommutable;
1435 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
1436 MSA128WOpnd>, IsCommutable;
1437 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
1438 MSA128DOpnd>, IsCommutable;
1440 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
1441 MSA128BOpnd>, IsCommutable;
1442 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
1443 MSA128HOpnd>, IsCommutable;
1444 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
1445 MSA128WOpnd>, IsCommutable;
1446 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
1447 MSA128DOpnd>, IsCommutable;
1449 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>;
1450 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>;
1451 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>;
1452 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>;
1454 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b,
1456 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h,
1458 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w,
1460 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d,
1463 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>;
1464 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>;
1465 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>;
1466 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>;
1468 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1470 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1472 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1474 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1477 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>;
1478 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>;
1479 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>;
1480 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>;
1482 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1484 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1486 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1488 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1491 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>;
1493 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b,
1496 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>;
1498 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>;
1500 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>;
1501 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>;
1502 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>;
1503 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>;
1505 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b,
1507 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h,
1509 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w,
1511 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d,
1514 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1515 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1516 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1517 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1519 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1522 dag OutOperandList = (outs MSA128BOpnd:$wd);
1523 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1525 string AsmString = "bsel.v\t$wd, $ws, $wt";
1526 list<dag> Pattern = [(set MSA128BOpnd:$wd,
1527 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1529 InstrItinClass Itinerary = NoItinerary;
1530 string Constraints = "$wd = $wd_in";
1533 class BSELI_B_DESC {
1534 dag OutOperandList = (outs MSA128BOpnd:$wd);
1535 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1537 string AsmString = "bseli.b\t$wd, $ws, $u8";
1538 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in,
1540 vsplati8_uimm8:$u8))];
1541 InstrItinClass Itinerary = NoItinerary;
1542 string Constraints = "$wd = $wd_in";
1545 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>;
1546 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>;
1547 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>;
1548 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>;
1550 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b,
1552 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h,
1554 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w,
1556 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d,
1559 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1560 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1561 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1562 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1564 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1566 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>,
1568 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>,
1570 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>,
1572 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>,
1575 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1577 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1579 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1581 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1585 dag OutOperandList = (outs GPR32:$rd);
1586 dag InOperandList = (ins MSACtrl:$cs);
1587 string AsmString = "cfcmsa\t$rd, $cs";
1588 InstrItinClass Itinerary = NoItinerary;
1589 bit hasSideEffects = 1;
1592 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>;
1593 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>;
1594 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>;
1595 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>;
1597 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>;
1598 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>;
1599 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>;
1600 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>;
1602 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1603 vsplati8_simm5, MSA128BOpnd>;
1604 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1605 vsplati16_simm5, MSA128HOpnd>;
1606 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1607 vsplati32_simm5, MSA128WOpnd>;
1608 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1609 vsplati64_simm5, MSA128DOpnd>;
1611 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1612 vsplati8_uimm5, MSA128BOpnd>;
1613 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1614 vsplati16_uimm5, MSA128HOpnd>;
1615 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1616 vsplati32_uimm5, MSA128WOpnd>;
1617 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1618 vsplati64_uimm5, MSA128DOpnd>;
1620 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>;
1621 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>;
1622 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>;
1623 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>;
1625 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>;
1626 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>;
1627 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>;
1628 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>;
1630 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1631 vsplati8_simm5, MSA128BOpnd>;
1632 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1633 vsplati16_simm5, MSA128HOpnd>;
1634 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1635 vsplati32_simm5, MSA128WOpnd>;
1636 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1637 vsplati64_simm5, MSA128DOpnd>;
1639 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1640 vsplati8_uimm5, MSA128BOpnd>;
1641 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1642 vsplati16_uimm5, MSA128HOpnd>;
1643 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1644 vsplati32_uimm5, MSA128WOpnd>;
1645 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1646 vsplati64_uimm5, MSA128DOpnd>;
1648 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1649 GPR32Opnd, MSA128BOpnd>;
1650 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1651 GPR32Opnd, MSA128HOpnd>;
1652 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1653 GPR32Opnd, MSA128WOpnd>;
1655 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1656 GPR32Opnd, MSA128BOpnd>;
1657 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1658 GPR32Opnd, MSA128HOpnd>;
1659 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1660 GPR32Opnd, MSA128WOpnd>;
1662 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1664 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1668 dag OutOperandList = (outs);
1669 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1670 string AsmString = "ctcmsa\t$cd, $rs";
1671 InstrItinClass Itinerary = NoItinerary;
1672 bit hasSideEffects = 1;
1675 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>;
1676 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>;
1677 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>;
1678 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>;
1680 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>;
1681 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>;
1682 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>;
1683 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>;
1685 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
1686 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1688 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
1689 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1691 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
1692 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1695 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
1696 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1698 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
1699 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1701 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
1702 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1705 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1706 MSA128HOpnd, MSA128BOpnd,
1707 MSA128BOpnd>, IsCommutable;
1708 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1709 MSA128WOpnd, MSA128HOpnd,
1710 MSA128HOpnd>, IsCommutable;
1711 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1712 MSA128DOpnd, MSA128WOpnd,
1713 MSA128WOpnd>, IsCommutable;
1715 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1716 MSA128HOpnd, MSA128BOpnd,
1717 MSA128BOpnd>, IsCommutable;
1718 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1719 MSA128WOpnd, MSA128HOpnd,
1720 MSA128HOpnd>, IsCommutable;
1721 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1722 MSA128DOpnd, MSA128WOpnd,
1723 MSA128WOpnd>, IsCommutable;
1725 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1726 MSA128HOpnd, MSA128BOpnd,
1728 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1729 MSA128WOpnd, MSA128HOpnd,
1731 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1732 MSA128DOpnd, MSA128WOpnd,
1735 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1736 MSA128HOpnd, MSA128BOpnd,
1738 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1739 MSA128WOpnd, MSA128HOpnd,
1741 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1742 MSA128DOpnd, MSA128WOpnd,
1745 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>,
1747 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>,
1750 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>,
1752 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>,
1755 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>,
1757 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>,
1760 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1762 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1765 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>;
1766 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>;
1768 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>;
1769 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>;
1771 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>,
1773 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>,
1776 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>,
1778 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>,
1781 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>,
1783 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>,
1786 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>,
1788 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>,
1791 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>,
1793 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>,
1796 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>,
1798 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>,
1801 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>,
1803 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>,
1806 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>;
1807 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>;
1809 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1810 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1811 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1812 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1814 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w,
1816 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d,
1819 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1820 MSA128WOpnd, MSA128HOpnd>;
1821 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1822 MSA128DOpnd, MSA128WOpnd>;
1824 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1825 MSA128WOpnd, MSA128HOpnd>;
1826 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1827 MSA128DOpnd, MSA128WOpnd>;
1829 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>;
1830 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>;
1832 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>;
1833 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>;
1835 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1836 MSA128WOpnd, MSA128HOpnd>;
1837 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1838 MSA128DOpnd, MSA128WOpnd>;
1840 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1841 MSA128WOpnd, MSA128HOpnd>;
1842 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1843 MSA128DOpnd, MSA128WOpnd>;
1845 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8,
1846 MSA128BOpnd, GPR32Opnd>;
1847 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16,
1848 MSA128HOpnd, GPR32Opnd>;
1849 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32,
1850 MSA128WOpnd, GPR32Opnd>;
1852 class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W,
1854 class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D,
1857 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>;
1858 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>;
1860 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>;
1861 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>;
1863 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>;
1864 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>;
1866 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1868 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1871 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>;
1872 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>;
1874 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1876 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1879 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>;
1880 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>;
1882 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>;
1883 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>;
1885 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;
1886 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
1888 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
1889 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
1891 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1893 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1896 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>;
1897 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>;
1899 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>;
1900 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>;
1902 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>;
1903 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>;
1905 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>;
1906 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>;
1908 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>;
1909 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>;
1911 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>;
1912 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>;
1914 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>;
1915 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>;
1917 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>;
1918 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>;
1920 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w,
1922 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d,
1925 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w,
1927 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d,
1930 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w,
1932 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d,
1935 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w,
1937 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d,
1940 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w,
1942 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d,
1945 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1947 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1950 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1952 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1955 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1956 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1957 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1958 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1960 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint,
1962 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint,
1965 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint,
1967 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint,
1970 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h,
1971 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1972 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w,
1973 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1974 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d,
1975 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1977 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h,
1978 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1979 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w,
1980 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1981 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d,
1982 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1984 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h,
1985 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1986 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w,
1987 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1988 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d,
1989 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1991 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h,
1992 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1993 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w,
1994 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1995 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d,
1996 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1998 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>;
1999 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>;
2000 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>;
2001 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>;
2003 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>;
2004 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>;
2005 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>;
2006 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>;
2008 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>;
2009 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>;
2010 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>;
2011 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>;
2013 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>;
2014 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>;
2015 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>;
2016 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>;
2018 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8,
2019 MSA128BOpnd, GPR32Opnd>;
2020 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16,
2021 MSA128HOpnd, GPR32Opnd>;
2022 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32,
2023 MSA128WOpnd, GPR32Opnd>;
2025 class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32,
2026 MSA128WOpnd, FGR32Opnd>;
2027 class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64,
2028 MSA128DOpnd, FGR64Opnd>;
2030 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
2032 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
2034 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
2036 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
2039 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2040 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2041 ComplexPattern Addr = addrRegImm,
2042 InstrItinClass itin = NoItinerary> {
2043 dag OutOperandList = (outs RCWD:$wd);
2044 dag InOperandList = (ins MemOpnd:$addr);
2045 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2046 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
2047 InstrItinClass Itinerary = itin;
2050 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
2051 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
2052 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
2053 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
2055 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
2056 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
2057 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
2058 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
2061 dag OutOperandList = (outs GPR32:$rd);
2062 dag InOperandList = (ins GPR32:$rs, GPR32:$rt, uimm2:$sa);
2063 string AsmString = "lsa\t$rd, $rs, $rt, $sa";
2064 list<dag> Pattern = [(set GPR32:$rd, (add GPR32:$rs, (shl GPR32:$rt,
2065 immZExt2Lsa:$sa)))];
2066 InstrItinClass Itinerary = NoItinerary;
2069 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
2071 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
2074 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
2076 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
2079 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>;
2080 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>;
2081 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>;
2082 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>;
2084 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>;
2085 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>;
2086 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>;
2087 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>;
2089 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>;
2090 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>;
2091 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>;
2092 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>;
2094 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>;
2095 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>;
2096 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>;
2097 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>;
2099 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
2101 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
2103 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
2105 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
2108 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
2110 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
2112 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
2114 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
2117 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>;
2118 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>;
2119 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>;
2120 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>;
2122 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>;
2123 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>;
2124 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>;
2125 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>;
2127 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>;
2128 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>;
2129 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>;
2130 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>;
2132 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
2134 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
2136 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
2138 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
2141 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
2143 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
2145 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2147 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2150 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>;
2151 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>;
2152 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>;
2153 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>;
2155 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>;
2156 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>;
2157 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>;
2158 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>;
2161 dag OutOperandList = (outs MSA128B:$wd);
2162 dag InOperandList = (ins MSA128B:$ws);
2163 string AsmString = "move.v\t$wd, $ws";
2164 list<dag> Pattern = [];
2165 InstrItinClass Itinerary = NoItinerary;
2168 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2170 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2173 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2175 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2178 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>;
2179 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>;
2180 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>;
2181 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>;
2183 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
2185 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
2188 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2190 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2193 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>;
2194 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>;
2195 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>;
2196 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>;
2198 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>;
2199 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>;
2200 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>;
2201 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>;
2203 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>;
2204 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>;
2205 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>;
2206 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>;
2208 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>;
2209 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>;
2210 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>;
2211 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>;
2213 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2216 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>;
2217 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>;
2218 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>;
2219 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>;
2221 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>;
2223 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>;
2224 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>;
2225 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>;
2226 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>;
2228 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>;
2229 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>;
2230 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>;
2231 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>;
2233 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>;
2234 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>;
2235 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>;
2236 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>;
2238 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b,
2240 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h,
2242 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w,
2244 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d,
2247 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b,
2249 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h,
2251 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w,
2253 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d,
2256 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>;
2257 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>;
2258 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>;
2260 class SLD_B_DESC : MSA_3R_INDEX_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd,
2261 MSA128BOpnd, GPR32Opnd>;
2262 class SLD_H_DESC : MSA_3R_INDEX_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd,
2263 MSA128HOpnd, GPR32Opnd>;
2264 class SLD_W_DESC : MSA_3R_INDEX_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd,
2265 MSA128WOpnd, GPR32Opnd>;
2266 class SLD_D_DESC : MSA_3R_INDEX_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd,
2267 MSA128DOpnd, GPR32Opnd>;
2269 class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>;
2270 class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>;
2271 class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>;
2272 class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>;
2274 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2275 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2276 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2277 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2279 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2281 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2283 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2285 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2288 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd,
2289 MSA128BOpnd, GPR32Opnd>;
2290 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd,
2291 MSA128HOpnd, GPR32Opnd>;
2292 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd,
2293 MSA128WOpnd, GPR32Opnd>;
2294 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd,
2295 MSA128DOpnd, GPR32Opnd>;
2297 class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
2299 class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
2301 class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
2303 class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
2306 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
2307 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
2308 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>;
2309 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>;
2311 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2313 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2315 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2317 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2320 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2321 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2322 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2323 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2325 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b,
2327 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h,
2329 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w,
2331 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d,
2334 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2335 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2336 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2337 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2339 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2341 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2343 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2345 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2348 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2349 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2350 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2351 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2353 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b,
2355 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h,
2357 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w,
2359 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d,
2362 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2363 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2364 ComplexPattern Addr = addrRegImm,
2365 InstrItinClass itin = NoItinerary> {
2366 dag OutOperandList = (outs);
2367 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2368 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2369 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2370 InstrItinClass Itinerary = itin;
2373 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2374 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2375 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2376 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2378 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
2380 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
2382 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
2384 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
2387 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
2389 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
2391 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
2393 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
2396 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2398 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2400 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2402 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2405 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2407 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2409 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2411 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2414 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>;
2415 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>;
2416 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>;
2417 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>;
2419 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5,
2421 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5,
2423 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5,
2425 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5,
2428 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>;
2429 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>;
2430 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>;
2431 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>;
2433 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>;
2434 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>;
2435 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>;
2436 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>;
2438 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8,
2441 // Instruction defs.
2442 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2443 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2444 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2445 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2447 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2448 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2449 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2450 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2452 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2453 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2454 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2455 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2457 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2458 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2459 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2460 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2462 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2463 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2464 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2465 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2467 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2468 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2469 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2470 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2472 def AND_V : AND_V_ENC, AND_V_DESC;
2473 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2474 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2477 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2478 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2481 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2482 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2486 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2488 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2489 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2490 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2491 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2493 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2494 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2495 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2496 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2498 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2499 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2500 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2501 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2503 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2504 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2505 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2506 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2508 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2509 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2510 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2511 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2513 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2514 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2515 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2516 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2518 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2519 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2520 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2521 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2523 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2524 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2525 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2526 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2528 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2529 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2530 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2531 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2533 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2534 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2535 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2536 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2538 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2539 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2540 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2541 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2543 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2544 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2545 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2546 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2548 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2550 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2552 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2554 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2556 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2557 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2558 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2559 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2561 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2562 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2563 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2564 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2566 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2567 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2568 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2569 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2571 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2573 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2575 class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> :
2576 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt),
2577 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>,
2578 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in,
2579 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> {
2580 let Constraints = "$wd_in = $wd";
2583 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>;
2584 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>;
2585 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>;
2586 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>;
2587 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>;
2589 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2591 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2592 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2593 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2594 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2596 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2597 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2598 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2599 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2601 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2602 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2603 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2604 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2606 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2608 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2609 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2610 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2611 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2613 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2614 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2615 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2616 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2618 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2620 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2621 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2622 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2623 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2625 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2626 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2627 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2628 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2630 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2631 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2632 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2633 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2635 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2636 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2637 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2638 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2640 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2641 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2642 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2643 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2645 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2646 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2647 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2648 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2650 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2651 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2652 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2653 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2655 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2656 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2657 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2658 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2660 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2661 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2662 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2664 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2665 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2666 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2668 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
2669 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
2671 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2673 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2674 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2675 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2676 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2678 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2679 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2680 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2681 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2683 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2684 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2685 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2687 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2688 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2689 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2691 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2692 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2693 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2695 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2696 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2697 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2699 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2700 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2701 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2703 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2704 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2705 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2707 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2708 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2710 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2711 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2713 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2714 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2716 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2717 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2719 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2720 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2722 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2723 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2725 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2726 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2728 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2729 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2731 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2732 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2734 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2735 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2737 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2738 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2740 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2741 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2743 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2744 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2746 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2747 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2749 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2750 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2752 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2753 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2755 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2756 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2758 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2759 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2761 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2762 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2764 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2765 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2767 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2768 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2770 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2771 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2773 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2774 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2775 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2776 def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC;
2777 def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC;
2779 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2780 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2782 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2783 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2785 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2786 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2788 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2789 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2791 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2792 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2794 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2795 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2797 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2798 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2800 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2801 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2803 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2804 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2806 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2807 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2809 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2810 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2812 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2813 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2815 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2816 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2818 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2819 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2821 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2822 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2824 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2825 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2827 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2828 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2830 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2831 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2833 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2834 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2836 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2837 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2839 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2840 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2842 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2843 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2845 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2846 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2848 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2849 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2851 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2852 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2854 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2855 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2857 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2858 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2860 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2861 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2863 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2864 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2866 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2867 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2868 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2870 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2871 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2872 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2874 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2875 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2876 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2878 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2879 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2880 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2882 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2883 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2884 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2885 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2887 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2888 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2889 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2890 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2892 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2893 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2894 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2895 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2897 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2898 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2899 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2900 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2902 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2903 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2904 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2906 // INSERT_FW_PSEUDO defined after INSVE_W
2907 // INSERT_FD_PSEUDO defined after INSVE_D
2909 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2910 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2911 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2912 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2914 def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC;
2915 def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC;
2917 def LD_B: LD_B_ENC, LD_B_DESC;
2918 def LD_H: LD_H_ENC, LD_H_DESC;
2919 def LD_W: LD_W_ENC, LD_W_DESC;
2920 def LD_D: LD_D_ENC, LD_D_DESC;
2922 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2923 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2924 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2925 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2927 def LSA : LSA_ENC, LSA_DESC;
2929 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2930 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2932 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2933 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2935 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2936 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2937 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2938 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2940 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2941 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2942 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2943 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2945 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2946 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2947 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2948 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2950 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2951 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2952 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2953 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2955 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2956 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2957 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2958 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2960 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2961 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2962 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2963 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2965 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2966 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2967 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2968 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2970 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2971 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2972 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2973 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2975 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2976 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2977 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2978 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2980 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2981 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2982 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2983 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2985 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2986 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2987 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2988 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2990 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2991 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2992 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2993 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2995 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2996 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2997 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2998 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
3000 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
3002 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
3003 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
3005 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
3006 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
3008 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
3009 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
3010 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
3011 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
3013 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
3014 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
3016 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
3017 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
3019 def MULV_B : MULV_B_ENC, MULV_B_DESC;
3020 def MULV_H : MULV_H_ENC, MULV_H_DESC;
3021 def MULV_W : MULV_W_ENC, MULV_W_DESC;
3022 def MULV_D : MULV_D_ENC, MULV_D_DESC;
3024 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
3025 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
3026 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
3027 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
3029 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
3030 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
3031 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
3032 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
3034 def NOR_V : NOR_V_ENC, NOR_V_DESC;
3035 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
3036 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3039 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
3040 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3043 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
3044 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3048 def NORI_B : NORI_B_ENC, NORI_B_DESC;
3050 def OR_V : OR_V_ENC, OR_V_DESC;
3051 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
3052 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3055 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
3056 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3059 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
3060 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3064 def ORI_B : ORI_B_ENC, ORI_B_DESC;
3066 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
3067 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
3068 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
3069 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
3071 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
3072 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
3073 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
3074 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
3076 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
3077 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
3078 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
3079 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
3081 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
3082 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
3083 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
3084 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
3086 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
3087 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
3088 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
3089 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
3091 def SHF_B : SHF_B_ENC, SHF_B_DESC;
3092 def SHF_H : SHF_H_ENC, SHF_H_DESC;
3093 def SHF_W : SHF_W_ENC, SHF_W_DESC;
3095 def SLD_B : SLD_B_ENC, SLD_B_DESC;
3096 def SLD_H : SLD_H_ENC, SLD_H_DESC;
3097 def SLD_W : SLD_W_ENC, SLD_W_DESC;
3098 def SLD_D : SLD_D_ENC, SLD_D_DESC;
3100 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
3101 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
3102 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
3103 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
3105 def SLL_B : SLL_B_ENC, SLL_B_DESC;
3106 def SLL_H : SLL_H_ENC, SLL_H_DESC;
3107 def SLL_W : SLL_W_ENC, SLL_W_DESC;
3108 def SLL_D : SLL_D_ENC, SLL_D_DESC;
3110 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
3111 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
3112 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
3113 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
3115 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
3116 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
3117 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
3118 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
3120 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
3121 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
3122 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
3123 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
3125 def SRA_B : SRA_B_ENC, SRA_B_DESC;
3126 def SRA_H : SRA_H_ENC, SRA_H_DESC;
3127 def SRA_W : SRA_W_ENC, SRA_W_DESC;
3128 def SRA_D : SRA_D_ENC, SRA_D_DESC;
3130 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
3131 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
3132 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
3133 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
3135 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
3136 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
3137 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
3138 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
3140 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
3141 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
3142 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
3143 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
3145 def SRL_B : SRL_B_ENC, SRL_B_DESC;
3146 def SRL_H : SRL_H_ENC, SRL_H_DESC;
3147 def SRL_W : SRL_W_ENC, SRL_W_DESC;
3148 def SRL_D : SRL_D_ENC, SRL_D_DESC;
3150 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
3151 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
3152 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
3153 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
3155 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
3156 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
3157 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
3158 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
3160 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
3161 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
3162 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
3163 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
3165 def ST_B: ST_B_ENC, ST_B_DESC;
3166 def ST_H: ST_H_ENC, ST_H_DESC;
3167 def ST_W: ST_W_ENC, ST_W_DESC;
3168 def ST_D: ST_D_ENC, ST_D_DESC;
3170 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
3171 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
3172 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
3173 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
3175 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
3176 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
3177 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3178 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3180 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3181 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3182 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3183 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3185 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3186 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3187 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3188 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3190 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3191 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3192 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3193 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3195 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3196 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3197 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3198 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3200 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3201 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3202 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3203 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3205 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3206 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3207 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3210 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3211 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3214 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3215 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3219 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3222 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3223 Pat<pattern, result>, Requires<pred>;
3225 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3226 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3228 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3229 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3230 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3231 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3232 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3233 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3234 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3236 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3237 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3238 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3240 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3241 (ST_B MSA128B:$ws, addr:$addr)>;
3242 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3243 (ST_H MSA128H:$ws, addr:$addr)>;
3244 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3245 (ST_W MSA128W:$ws, addr:$addr)>;
3246 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3247 (ST_D MSA128D:$ws, addr:$addr)>;
3248 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3249 (ST_H MSA128H:$ws, addr:$addr)>;
3250 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3251 (ST_W MSA128W:$ws, addr:$addr)>;
3252 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3253 (ST_D MSA128D:$ws, addr:$addr)>;
3255 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3256 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3257 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3258 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3259 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3260 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3262 class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD,
3263 RegisterOperand ROWS = ROWD,
3264 InstrItinClass itin = NoItinerary> :
3265 MipsPseudo<(outs ROWD:$wd),
3267 [(set ROWD:$wd, (fabs ROWS:$ws))]> {
3268 InstrItinClass Itinerary = itin;
3270 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>,
3271 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws,
3273 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>,
3274 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws,
3277 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3278 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3279 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3280 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3282 // These are endian-independant because the element size doesnt change
3283 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3284 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3285 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3286 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3287 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3288 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3290 // Little endian bitcasts are always no-ops
3291 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3292 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3293 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3294 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3295 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3296 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3298 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3299 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3300 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3301 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3302 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3304 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3305 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3306 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3307 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3308 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3310 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3311 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3312 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3313 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3314 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3316 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3317 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3318 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3319 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3320 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3322 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3323 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3324 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3325 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3326 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3328 // Big endian bitcasts expand to shuffle instructions.
3329 // This is because bitcast is defined to be a store/load sequence and the
3330 // vector store/load instructions are mixed-endian with respect to the vector
3331 // as a whole (little endian with respect to element order, but big endian
3334 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3335 RegisterClass DstRC, MSAInst Insn,
3336 RegisterClass ViaRC> :
3337 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3338 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3342 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3343 RegisterClass DstRC, MSAInst Insn,
3344 RegisterClass ViaRC> :
3345 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3346 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3350 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3351 RegisterClass DstRC> :
3352 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3354 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3355 RegisterClass DstRC> :
3356 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3358 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3359 RegisterClass DstRC> :
3360 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3364 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3369 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3370 RegisterClass DstRC> :
3371 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3373 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3374 RegisterClass DstRC> :
3375 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3377 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3378 RegisterClass DstRC> :
3379 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3381 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3382 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3383 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3384 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3385 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3386 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3388 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3389 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3390 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3391 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3392 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3394 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3395 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3396 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3397 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3398 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3400 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3401 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3402 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3403 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3404 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3406 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3407 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3408 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3409 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3410 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3412 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3413 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3414 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3415 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3416 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3418 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3419 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3420 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3421 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3422 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3424 // Pseudos used to implement BNZ.df, and BZ.df
3426 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3428 InstrItinClass itin = NoItinerary> :
3429 MipsPseudo<(outs GPR32:$dst),
3431 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3432 bit usesCustomInserter = 1;
3435 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3436 MSA128B, NoItinerary>;
3437 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3438 MSA128H, NoItinerary>;
3439 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3440 MSA128W, NoItinerary>;
3441 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3442 MSA128D, NoItinerary>;
3443 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3444 MSA128B, NoItinerary>;
3446 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3447 MSA128B, NoItinerary>;
3448 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3449 MSA128H, NoItinerary>;
3450 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3451 MSA128W, NoItinerary>;
3452 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3453 MSA128D, NoItinerary>;
3454 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3455 MSA128B, NoItinerary>;