1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
16 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
17 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
18 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
19 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
21 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
22 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
24 def uimm3 : Operand<i32> {
25 let PrintMethod = "printUnsignedImm";
28 def uimm4 : Operand<i32> {
29 let PrintMethod = "printUnsignedImm";
32 def uimm6 : Operand<i32> {
33 let PrintMethod = "printUnsignedImm";
36 def uimm8 : Operand<i32> {
37 let PrintMethod = "printUnsignedImm";
40 def simm5 : Operand<i32>;
42 def simm10 : Operand<i32>;
44 // Instruction encoding.
45 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
46 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
47 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
48 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
50 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
51 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
52 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
53 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
55 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
56 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
57 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
58 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
60 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
61 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
62 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
63 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
65 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
66 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
67 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
68 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
70 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
71 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
72 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
73 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
75 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
77 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
79 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
80 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
81 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
82 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
84 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
85 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
86 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
87 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
89 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
90 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
91 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
92 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
94 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
95 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
96 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
97 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
99 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
100 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
101 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
102 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
104 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
105 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
106 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
107 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
109 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
110 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
111 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
112 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
114 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
115 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
116 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
117 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
119 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
120 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
121 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
122 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
124 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
125 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
126 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
127 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
129 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
130 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
131 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
132 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
134 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
135 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
136 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
137 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
139 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
141 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
143 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
145 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
147 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
148 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
149 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
150 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
152 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
153 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
154 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
155 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
157 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
158 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
159 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
160 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
162 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
164 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
166 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
168 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
169 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
170 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
171 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
173 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
174 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
175 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
176 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
178 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
179 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
180 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
181 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
183 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
185 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
186 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
187 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
188 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
190 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
191 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
192 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
193 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
195 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
197 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
198 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
199 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
200 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
202 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
203 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
204 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
205 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
207 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
208 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
209 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
210 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
212 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
213 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
214 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
215 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
217 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
218 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
219 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
220 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
222 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
223 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
224 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
225 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
227 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
228 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
229 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
230 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
232 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
233 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
234 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
235 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
237 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
238 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
239 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
241 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
242 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
243 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
245 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
247 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
248 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
249 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
250 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
252 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
253 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
254 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
255 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
257 class DOTP_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010011>;
258 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
259 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
260 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
262 class DOTP_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010011>;
263 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
264 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
265 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
267 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
268 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
269 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
271 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
272 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
273 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
275 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
276 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
277 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
279 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
280 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
281 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
283 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
284 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
286 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
287 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
289 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
290 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
292 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
293 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
295 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
296 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
298 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
299 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
301 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
302 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
304 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
305 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
307 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
308 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
310 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
311 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
313 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
314 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
316 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
317 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
319 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
320 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
322 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
323 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
325 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
326 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
328 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
329 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
331 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
332 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
334 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
335 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
337 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
338 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
340 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
341 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
343 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
344 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
346 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
347 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
349 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
350 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
351 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
353 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
354 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
356 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
357 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
359 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
360 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
362 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
363 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
365 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
366 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
368 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
369 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
371 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
372 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
374 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
375 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
377 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
378 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
380 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
381 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
383 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
384 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
386 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
387 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
389 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
390 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
392 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
393 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
395 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
396 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
398 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
399 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
401 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
402 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
404 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
405 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
407 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
408 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
410 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
411 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
413 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
414 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
416 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
417 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
419 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
420 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
422 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
423 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
425 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
426 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
428 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
429 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
431 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
432 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
434 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
435 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
437 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
438 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
440 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
441 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
442 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
444 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
445 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
446 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
448 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
449 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
450 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
452 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
453 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
454 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
456 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
457 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
458 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
459 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
461 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
462 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
463 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
464 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
466 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
467 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
468 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
469 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
471 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
472 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
473 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
474 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
476 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
477 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
478 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
480 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
481 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
482 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
483 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
485 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
486 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
487 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
488 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
490 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
491 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
492 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
493 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
495 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
496 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
497 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
498 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
500 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
501 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
503 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
504 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
506 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
507 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
508 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
509 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
511 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
512 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
513 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
514 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
516 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
517 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
518 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
519 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
521 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
522 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
523 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
524 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
526 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
527 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
528 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
529 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
531 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
532 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
533 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
534 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
536 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
537 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
538 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
539 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
541 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
542 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
543 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
544 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
546 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
547 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
548 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
549 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
551 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
552 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
553 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
554 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
556 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
557 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
558 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
559 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
561 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
562 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
563 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
564 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
566 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
567 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
568 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
569 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
571 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
573 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
574 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
576 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
577 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
579 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
580 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
581 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
582 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
584 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
585 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
587 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
588 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
590 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
591 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
592 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
593 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
595 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
596 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
597 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
598 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
600 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
601 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
602 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
603 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
605 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
607 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
609 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
611 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
613 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
614 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
615 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
616 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
618 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
619 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
620 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
621 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
623 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
624 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
625 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
626 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
628 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
629 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
630 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
631 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
633 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
634 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
635 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
636 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
638 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
639 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
640 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
642 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
643 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
644 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
645 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
647 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
648 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
649 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
650 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
652 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
653 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
654 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
655 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
657 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
658 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
659 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
660 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
662 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
663 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
664 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
665 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
667 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
668 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
669 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
670 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
672 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
673 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
674 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
675 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
677 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
678 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
679 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
680 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
682 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
683 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
684 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
685 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
687 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
688 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
689 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
690 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
692 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
693 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
694 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
695 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
697 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
698 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
699 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
700 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
702 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
703 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
704 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
705 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
707 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
708 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
709 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
710 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
712 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
713 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
714 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
715 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
717 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
718 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
719 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
720 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
722 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
723 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
724 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
725 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
727 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
728 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
729 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
730 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
732 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
733 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
734 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
735 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
737 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
738 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
739 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
740 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
742 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
743 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
744 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
745 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
747 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
748 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
749 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
750 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
752 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
753 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
754 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
755 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
757 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
759 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
762 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
763 RegisterClass RCWD, RegisterClass RCWS = RCWD,
764 InstrItinClass itin = NoItinerary> {
765 dag OutOperandList = (outs RCWD:$wd);
766 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
767 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
768 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
769 InstrItinClass Itinerary = itin;
772 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
773 RegisterClass RCWD, RegisterClass RCWS = RCWD,
774 InstrItinClass itin = NoItinerary> {
775 dag OutOperandList = (outs RCWD:$wd);
776 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
777 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
778 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
779 InstrItinClass Itinerary = itin;
782 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
783 RegisterClass RCWD, RegisterClass RCWS = RCWD,
784 InstrItinClass itin = NoItinerary> {
785 dag OutOperandList = (outs RCWD:$wd);
786 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
787 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
788 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
789 InstrItinClass Itinerary = itin;
792 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
793 RegisterClass RCWD, RegisterClass RCWS = RCWD,
794 InstrItinClass itin = NoItinerary> {
795 dag OutOperandList = (outs RCWD:$wd);
796 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
797 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
798 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
799 InstrItinClass Itinerary = itin;
802 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
803 RegisterClass RCD, RegisterClass RCWS,
804 InstrItinClass itin = NoItinerary> {
805 dag OutOperandList = (outs RCD:$rd);
806 dag InOperandList = (ins RCWS:$ws, uimm6:$n);
807 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
808 list<dag> Pattern = [(set RCD:$rd, (OpNode RCWS:$ws, immZExt6:$n))];
809 InstrItinClass Itinerary = itin;
812 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
813 RegisterClass RCWD, RegisterClass RCWS = RCWD,
814 InstrItinClass itin = NoItinerary> {
815 dag OutOperandList = (outs RCWD:$wd);
816 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
817 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
818 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
819 InstrItinClass Itinerary = itin;
822 class MSA_SI5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
823 RegisterClass RCWD, RegisterClass RCWS = RCWD,
824 InstrItinClass itin = NoItinerary> {
825 dag OutOperandList = (outs RCWD:$wd);
826 dag InOperandList = (ins RCWS:$ws, simm5:$s5);
827 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $s5");
828 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immSExt5:$s5))];
829 InstrItinClass Itinerary = itin;
832 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
833 RegisterClass RCWD, RegisterClass RCWS = RCWD,
834 InstrItinClass itin = NoItinerary> {
835 dag OutOperandList = (outs RCWD:$wd);
836 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
837 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
838 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
839 InstrItinClass Itinerary = itin;
842 class MSA_I10_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
844 InstrItinClass itin = NoItinerary> {
845 dag OutOperandList = (outs RCWD:$wd);
846 dag InOperandList = (ins simm10:$i10);
847 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
848 list<dag> Pattern = [(set RCWD:$wd, (OpNode immSExt10:$i10))];
849 InstrItinClass Itinerary = itin;
852 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
853 RegisterClass RCWD, RegisterClass RCWS = RCWD,
854 InstrItinClass itin = NoItinerary> {
855 dag OutOperandList = (outs RCWD:$wd);
856 dag InOperandList = (ins RCWS:$ws);
857 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
858 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
859 InstrItinClass Itinerary = itin;
862 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
863 RegisterClass RCWD, RegisterClass RCWS = RCWD,
864 InstrItinClass itin = NoItinerary> :
865 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
868 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
869 RegisterClass RCWD, RegisterClass RCWS = RCWD,
870 RegisterClass RCWT = RCWD,
871 InstrItinClass itin = NoItinerary> {
872 dag OutOperandList = (outs RCWD:$wd);
873 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
874 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
875 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
876 InstrItinClass Itinerary = itin;
879 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
880 RegisterClass RCWD, RegisterClass RCWS = RCWD,
881 RegisterClass RCWT = RCWD,
882 InstrItinClass itin = NoItinerary> {
883 dag OutOperandList = (outs RCWD:$wd);
884 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
885 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
886 list<dag> Pattern = [(set RCWD:$wd,
887 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
888 InstrItinClass Itinerary = itin;
889 string Constraints = "$wd = $wd_in";
892 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
893 RegisterClass RCWD, RegisterClass RCWS = RCWD,
894 RegisterClass RCWT = RCWD,
895 InstrItinClass itin = NoItinerary> :
896 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
898 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
899 RegisterClass RCWD, RegisterClass RCWS = RCWD,
900 RegisterClass RCWT = RCWD,
901 InstrItinClass itin = NoItinerary> :
902 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
904 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
905 dag OutOperandList = (outs);
906 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
907 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
908 list<dag> Pattern = [];
909 InstrItinClass Itinerary = IIBranch;
911 bit isTerminator = 1;
912 bit hasDelaySlot = 1;
913 list<Register> Defs = [AT];
916 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
917 RegisterClass RCD, RegisterClass RCWS,
918 InstrItinClass itin = NoItinerary> {
919 dag OutOperandList = (outs RCD:$wd);
920 dag InOperandList = (ins RCD:$wd_in, uimm6:$n, RCWS:$rs);
921 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
922 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
925 InstrItinClass Itinerary = itin;
926 string Constraints = "$wd = $wd_in";
929 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
930 RegisterClass RCWD, RegisterClass RCWS = RCWD,
931 InstrItinClass itin = NoItinerary> {
932 dag OutOperandList = (outs RCWD:$wd);
933 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
934 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
935 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
938 InstrItinClass Itinerary = itin;
939 string Constraints = "$wd = $wd_in";
942 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
943 RegisterClass RCWD, RegisterClass RCWS = RCWD,
944 RegisterClass RCWT = RCWD,
945 InstrItinClass itin = NoItinerary> {
946 dag OutOperandList = (outs RCWD:$wd);
947 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
948 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
949 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
950 InstrItinClass Itinerary = itin;
953 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
955 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
957 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
959 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
962 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
964 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
966 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
968 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
971 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
973 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
975 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
977 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
980 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
982 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
984 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
986 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
989 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", int_mips_addv_b, MSA128B>,
991 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", int_mips_addv_h, MSA128H>,
993 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", int_mips_addv_w, MSA128W>,
995 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", int_mips_addv_d, MSA128D>,
998 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", int_mips_addvi_b, MSA128B>;
999 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", int_mips_addvi_h, MSA128H>;
1000 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", int_mips_addvi_w, MSA128W>;
1001 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", int_mips_addvi_d, MSA128D>;
1003 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", int_mips_and_v, MSA128B>;
1005 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", int_mips_andi_b, MSA128B>;
1007 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1008 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1009 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1010 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1012 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1013 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1014 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1015 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1017 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1019 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1021 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1023 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1026 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1028 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1030 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1032 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1035 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1037 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1039 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1041 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1044 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1046 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1048 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1050 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1053 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1054 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1055 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1056 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1058 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1059 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1060 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1061 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1063 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1064 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1065 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1066 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1068 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1070 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1072 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1074 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1077 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1078 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1079 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1080 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1082 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1084 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1086 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1088 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1091 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1093 class BMNZI_B_DESC : MSA_I8_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1095 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1097 class BMZI_B_DESC : MSA_I8_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1099 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1100 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1101 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1102 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1104 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1105 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1106 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1107 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1109 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1110 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1111 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1112 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1114 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1116 class BSEL_V_DESC : MSA_VEC_DESC_BASE<"bsel.v", int_mips_bsel_v, MSA128B>;
1118 class BSELI_B_DESC : MSA_I8_DESC_BASE<"bseli.b", int_mips_bseli_b, MSA128B>;
1120 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1121 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1122 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1123 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1125 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1126 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1127 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1128 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1130 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1131 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1132 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1133 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1135 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1137 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", int_mips_ceq_b, MSA128B>,
1139 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", int_mips_ceq_h, MSA128H>,
1141 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", int_mips_ceq_w, MSA128W>,
1143 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", int_mips_ceq_d, MSA128D>,
1146 class CEQI_B_DESC : MSA_SI5_DESC_BASE<"ceqi.b", int_mips_ceqi_b, MSA128B>;
1147 class CEQI_H_DESC : MSA_SI5_DESC_BASE<"ceqi.h", int_mips_ceqi_h, MSA128H>;
1148 class CEQI_W_DESC : MSA_SI5_DESC_BASE<"ceqi.w", int_mips_ceqi_w, MSA128W>;
1149 class CEQI_D_DESC : MSA_SI5_DESC_BASE<"ceqi.d", int_mips_ceqi_d, MSA128D>;
1152 dag OutOperandList = (outs GPR32:$rd);
1153 dag InOperandList = (ins MSACtrl:$cs);
1154 string AsmString = "cfcmsa\t$rd, $cs";
1155 InstrItinClass Itinerary = NoItinerary;
1156 bit hasSideEffects = 1;
1159 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", int_mips_cle_s_b, MSA128B>;
1160 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", int_mips_cle_s_h, MSA128H>;
1161 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", int_mips_cle_s_w, MSA128W>;
1162 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", int_mips_cle_s_d, MSA128D>;
1164 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", int_mips_cle_u_b, MSA128B>;
1165 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", int_mips_cle_u_h, MSA128H>;
1166 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", int_mips_cle_u_w, MSA128W>;
1167 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", int_mips_cle_u_d, MSA128D>;
1169 class CLEI_S_B_DESC : MSA_SI5_DESC_BASE<"clei_s.b", int_mips_clei_s_b,
1171 class CLEI_S_H_DESC : MSA_SI5_DESC_BASE<"clei_s.h", int_mips_clei_s_h,
1173 class CLEI_S_W_DESC : MSA_SI5_DESC_BASE<"clei_s.w", int_mips_clei_s_w,
1175 class CLEI_S_D_DESC : MSA_SI5_DESC_BASE<"clei_s.d", int_mips_clei_s_d,
1178 class CLEI_U_B_DESC : MSA_SI5_DESC_BASE<"clei_u.b", int_mips_clei_u_b,
1180 class CLEI_U_H_DESC : MSA_SI5_DESC_BASE<"clei_u.h", int_mips_clei_u_h,
1182 class CLEI_U_W_DESC : MSA_SI5_DESC_BASE<"clei_u.w", int_mips_clei_u_w,
1184 class CLEI_U_D_DESC : MSA_SI5_DESC_BASE<"clei_u.d", int_mips_clei_u_d,
1187 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", int_mips_clt_s_b, MSA128B>;
1188 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", int_mips_clt_s_h, MSA128H>;
1189 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", int_mips_clt_s_w, MSA128W>;
1190 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", int_mips_clt_s_d, MSA128D>;
1192 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", int_mips_clt_u_b, MSA128B>;
1193 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", int_mips_clt_u_h, MSA128H>;
1194 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", int_mips_clt_u_w, MSA128W>;
1195 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", int_mips_clt_u_d, MSA128D>;
1197 class CLTI_S_B_DESC : MSA_SI5_DESC_BASE<"clti_s.b", int_mips_clti_s_b,
1199 class CLTI_S_H_DESC : MSA_SI5_DESC_BASE<"clti_s.h", int_mips_clti_s_h,
1201 class CLTI_S_W_DESC : MSA_SI5_DESC_BASE<"clti_s.w", int_mips_clti_s_w,
1203 class CLTI_S_D_DESC : MSA_SI5_DESC_BASE<"clti_s.d", int_mips_clti_s_d,
1206 class CLTI_U_B_DESC : MSA_SI5_DESC_BASE<"clti_u.b", int_mips_clti_u_b,
1208 class CLTI_U_H_DESC : MSA_SI5_DESC_BASE<"clti_u.h", int_mips_clti_u_h,
1210 class CLTI_U_W_DESC : MSA_SI5_DESC_BASE<"clti_u.w", int_mips_clti_u_w,
1212 class CLTI_U_D_DESC : MSA_SI5_DESC_BASE<"clti_u.d", int_mips_clti_u_d,
1215 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", int_mips_copy_s_b,
1217 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", int_mips_copy_s_h,
1219 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", int_mips_copy_s_w,
1222 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", int_mips_copy_u_b,
1224 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", int_mips_copy_u_h,
1226 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", int_mips_copy_u_w,
1230 dag OutOperandList = (outs);
1231 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1232 string AsmString = "ctcmsa\t$cd, $rs";
1233 InstrItinClass Itinerary = NoItinerary;
1234 bit hasSideEffects = 1;
1237 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", int_mips_div_s_b, MSA128B>;
1238 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", int_mips_div_s_h, MSA128H>;
1239 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", int_mips_div_s_w, MSA128W>;
1240 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", int_mips_div_s_d, MSA128D>;
1242 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", int_mips_div_u_b, MSA128B>;
1243 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", int_mips_div_u_h, MSA128H>;
1244 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", int_mips_div_u_w, MSA128W>;
1245 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", int_mips_div_u_d, MSA128D>;
1247 class DOTP_S_B_DESC : MSA_3R_DESC_BASE<"dotp_s.b", int_mips_dotp_s_b, MSA128B>,
1249 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H>,
1251 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W>,
1253 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D>,
1256 class DOTP_U_B_DESC : MSA_3R_DESC_BASE<"dotp_u.b", int_mips_dotp_u_b, MSA128B>,
1258 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H>,
1260 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W>,
1262 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D>,
1265 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1266 MSA128H, MSA128B, MSA128B>,
1268 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1269 MSA128W, MSA128H, MSA128H>,
1271 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1272 MSA128D, MSA128W, MSA128W>,
1275 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1276 MSA128H, MSA128B, MSA128B>,
1278 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1279 MSA128W, MSA128H, MSA128H>,
1281 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1282 MSA128D, MSA128W, MSA128W>,
1285 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1286 MSA128H, MSA128B, MSA128B>;
1287 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1288 MSA128W, MSA128H, MSA128H>;
1289 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1290 MSA128D, MSA128W, MSA128W>;
1292 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1293 MSA128H, MSA128B, MSA128B>;
1294 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1295 MSA128W, MSA128H, MSA128H>;
1296 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1297 MSA128D, MSA128W, MSA128W>;
1299 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", int_mips_fadd_w, MSA128W>,
1301 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", int_mips_fadd_d, MSA128D>,
1304 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1306 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1309 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", int_mips_fceq_w, MSA128W>,
1311 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", int_mips_fceq_d, MSA128D>,
1314 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1316 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1319 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", int_mips_fcle_w, MSA128W>;
1320 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", int_mips_fcle_d, MSA128D>;
1322 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", int_mips_fclt_w, MSA128W>;
1323 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", int_mips_fclt_d, MSA128D>;
1325 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", int_mips_fcne_w, MSA128W>,
1327 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", int_mips_fcne_d, MSA128D>,
1330 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", int_mips_fcor_w, MSA128W>,
1332 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", int_mips_fcor_d, MSA128D>,
1335 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", int_mips_fcueq_w, MSA128W>,
1337 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", int_mips_fcueq_d, MSA128D>,
1340 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", int_mips_fcule_w, MSA128W>,
1342 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", int_mips_fcule_d, MSA128D>,
1345 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", int_mips_fcult_w, MSA128W>,
1347 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", int_mips_fcult_d, MSA128D>,
1350 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", int_mips_fcun_w, MSA128W>,
1352 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", int_mips_fcun_d, MSA128D>,
1355 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", int_mips_fcune_w, MSA128W>,
1357 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", int_mips_fcune_d, MSA128D>,
1360 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", int_mips_fdiv_w, MSA128W>;
1361 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", int_mips_fdiv_d, MSA128D>;
1363 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1364 MSA128H, MSA128W, MSA128W>;
1365 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1366 MSA128W, MSA128D, MSA128D>;
1368 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1369 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1371 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1373 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1376 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1378 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1381 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1383 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1386 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1388 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1391 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1393 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1396 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1398 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1401 class FILL_B_DESC : MSA_2R_DESC_BASE<"fill.b", int_mips_fill_b,
1403 class FILL_H_DESC : MSA_2R_DESC_BASE<"fill.h", int_mips_fill_h,
1405 class FILL_W_DESC : MSA_2R_DESC_BASE<"fill.w", int_mips_fill_w,
1408 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", int_mips_flog2_w, MSA128W>;
1409 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", int_mips_flog2_d, MSA128D>;
1411 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1413 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1416 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1417 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1419 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1421 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1424 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1425 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1427 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1429 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1432 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1434 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1437 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", int_mips_fmul_w, MSA128W>;
1438 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", int_mips_fmul_d, MSA128D>;
1440 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", int_mips_frint_w, MSA128W>;
1441 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", int_mips_frint_d, MSA128D>;
1443 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1444 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1446 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1448 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1451 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1452 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1454 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1455 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1457 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1458 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1460 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1461 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1463 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1464 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1466 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1467 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1469 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", int_mips_fsqrt_w, MSA128W>;
1470 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", int_mips_fsqrt_d, MSA128D>;
1472 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", int_mips_fsub_w, MSA128W>;
1473 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", int_mips_fsub_d, MSA128D>;
1475 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1476 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1478 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1479 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1481 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1482 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1484 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1485 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1487 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1488 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1490 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1492 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1495 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1497 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1500 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1502 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1505 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1507 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1510 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1511 MSA128H, MSA128W, MSA128W>;
1512 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1513 MSA128W, MSA128D, MSA128D>;
1515 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1517 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1519 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1522 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1524 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1526 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1529 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1531 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1533 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1536 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1538 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1540 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1543 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", int_mips_ilvev_b, MSA128B>;
1544 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", int_mips_ilvev_h, MSA128H>;
1545 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", int_mips_ilvev_w, MSA128W>;
1546 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", int_mips_ilvev_d, MSA128D>;
1548 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", int_mips_ilvl_b, MSA128B>;
1549 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", int_mips_ilvl_h, MSA128H>;
1550 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", int_mips_ilvl_w, MSA128W>;
1551 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", int_mips_ilvl_d, MSA128D>;
1553 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", int_mips_ilvod_b, MSA128B>;
1554 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", int_mips_ilvod_h, MSA128H>;
1555 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", int_mips_ilvod_w, MSA128W>;
1556 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", int_mips_ilvod_d, MSA128D>;
1558 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", int_mips_ilvr_b, MSA128B>;
1559 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", int_mips_ilvr_h, MSA128H>;
1560 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", int_mips_ilvr_w, MSA128W>;
1561 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", int_mips_ilvr_d, MSA128D>;
1563 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", int_mips_insert_b,
1565 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", int_mips_insert_h,
1567 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", int_mips_insert_w,
1570 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1571 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1572 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1573 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1575 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1576 ValueType TyNode, RegisterClass RCWD,
1577 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1578 InstrItinClass itin = NoItinerary> {
1579 dag OutOperandList = (outs RCWD:$wd);
1580 dag InOperandList = (ins MemOpnd:$addr);
1581 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1582 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1583 InstrItinClass Itinerary = itin;
1586 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1587 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1588 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1589 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1591 class LDI_B_DESC : MSA_I10_DESC_BASE<"ldi.b", int_mips_ldi_b, MSA128B>;
1592 class LDI_H_DESC : MSA_I10_DESC_BASE<"ldi.h", int_mips_ldi_h, MSA128H>;
1593 class LDI_W_DESC : MSA_I10_DESC_BASE<"ldi.w", int_mips_ldi_w, MSA128W>;
1594 class LDI_D_DESC : MSA_I10_DESC_BASE<"ldi.d", int_mips_ldi_d, MSA128D>;
1596 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1597 ValueType TyNode, RegisterClass RCWD,
1598 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1599 InstrItinClass itin = NoItinerary> {
1600 dag OutOperandList = (outs RCWD:$wd);
1601 dag InOperandList = (ins MemOpnd:$addr);
1602 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1603 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1604 InstrItinClass Itinerary = itin;
1607 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1608 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1609 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1610 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1612 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1614 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1617 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1619 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1622 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1623 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1624 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1625 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1627 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1628 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1629 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1630 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1632 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", int_mips_max_s_b, MSA128B>;
1633 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", int_mips_max_s_h, MSA128H>;
1634 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", int_mips_max_s_w, MSA128W>;
1635 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", int_mips_max_s_d, MSA128D>;
1637 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", int_mips_max_u_b, MSA128B>;
1638 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", int_mips_max_u_h, MSA128H>;
1639 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", int_mips_max_u_w, MSA128W>;
1640 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", int_mips_max_u_d, MSA128D>;
1642 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", int_mips_maxi_s_b, MSA128B>;
1643 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", int_mips_maxi_s_h, MSA128H>;
1644 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", int_mips_maxi_s_w, MSA128W>;
1645 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", int_mips_maxi_s_d, MSA128D>;
1647 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", int_mips_maxi_u_b, MSA128B>;
1648 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", int_mips_maxi_u_h, MSA128H>;
1649 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", int_mips_maxi_u_w, MSA128W>;
1650 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", int_mips_maxi_u_d, MSA128D>;
1652 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1653 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1654 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1655 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1657 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", int_mips_min_s_b, MSA128B>;
1658 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", int_mips_min_s_h, MSA128H>;
1659 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", int_mips_min_s_w, MSA128W>;
1660 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", int_mips_min_s_d, MSA128D>;
1662 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", int_mips_min_u_b, MSA128B>;
1663 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", int_mips_min_u_h, MSA128H>;
1664 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", int_mips_min_u_w, MSA128W>;
1665 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", int_mips_min_u_d, MSA128D>;
1667 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", int_mips_mini_s_b, MSA128B>;
1668 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", int_mips_mini_s_h, MSA128H>;
1669 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", int_mips_mini_s_w, MSA128W>;
1670 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", int_mips_mini_s_d, MSA128D>;
1672 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", int_mips_mini_u_b, MSA128B>;
1673 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", int_mips_mini_u_h, MSA128H>;
1674 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", int_mips_mini_u_w, MSA128W>;
1675 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", int_mips_mini_u_d, MSA128D>;
1677 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1678 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1679 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1680 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1682 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1683 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1684 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
1685 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
1688 dag OutOperandList = (outs MSA128B:$wd);
1689 dag InOperandList = (ins MSA128B:$ws);
1690 string AsmString = "move.v\t$wd, $ws";
1691 list<dag> Pattern = [];
1692 InstrItinClass Itinerary = NoItinerary;
1695 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
1697 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
1700 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
1702 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
1705 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
1706 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
1707 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
1708 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
1710 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
1711 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
1713 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
1715 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
1718 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", int_mips_mulv_b, MSA128B>;
1719 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", int_mips_mulv_h, MSA128H>;
1720 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", int_mips_mulv_w, MSA128W>;
1721 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", int_mips_mulv_d, MSA128D>;
1723 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
1724 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
1725 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
1726 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
1728 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", int_mips_nlzc_b, MSA128B>;
1729 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", int_mips_nlzc_h, MSA128H>;
1730 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", int_mips_nlzc_w, MSA128W>;
1731 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", int_mips_nlzc_d, MSA128D>;
1733 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", int_mips_nor_v, MSA128B>;
1735 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", int_mips_nori_b, MSA128B>;
1737 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", int_mips_or_v, MSA128B>;
1739 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", int_mips_ori_b, MSA128B>;
1741 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
1742 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
1743 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
1744 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
1746 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
1747 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
1748 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
1749 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
1751 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", int_mips_pcnt_b, MSA128B>;
1752 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", int_mips_pcnt_h, MSA128H>;
1753 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", int_mips_pcnt_w, MSA128W>;
1754 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", int_mips_pcnt_d, MSA128D>;
1756 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
1757 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
1758 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
1759 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
1761 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
1762 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
1763 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
1764 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
1766 class SHF_B_DESC : MSA_I8_DESC_BASE<"shf.b", int_mips_shf_b, MSA128B>;
1767 class SHF_H_DESC : MSA_I8_DESC_BASE<"shf.h", int_mips_shf_h, MSA128H>;
1768 class SHF_W_DESC : MSA_I8_DESC_BASE<"shf.w", int_mips_shf_w, MSA128W>;
1770 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
1771 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
1772 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
1773 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
1775 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
1776 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
1777 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
1778 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
1780 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", int_mips_sll_b, MSA128B>;
1781 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", int_mips_sll_h, MSA128H>;
1782 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", int_mips_sll_w, MSA128W>;
1783 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", int_mips_sll_d, MSA128D>;
1785 class SLLI_B_DESC : MSA_BIT_B_DESC_BASE<"slli.b", int_mips_slli_b, MSA128B>;
1786 class SLLI_H_DESC : MSA_BIT_H_DESC_BASE<"slli.h", int_mips_slli_h, MSA128H>;
1787 class SLLI_W_DESC : MSA_BIT_W_DESC_BASE<"slli.w", int_mips_slli_w, MSA128W>;
1788 class SLLI_D_DESC : MSA_BIT_D_DESC_BASE<"slli.d", int_mips_slli_d, MSA128D>;
1790 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
1792 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
1794 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
1796 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
1799 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
1801 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
1803 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
1805 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
1808 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", int_mips_sra_b, MSA128B>;
1809 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", int_mips_sra_h, MSA128H>;
1810 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", int_mips_sra_w, MSA128W>;
1811 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", int_mips_sra_d, MSA128D>;
1813 class SRAI_B_DESC : MSA_BIT_B_DESC_BASE<"srai.b", int_mips_srai_b, MSA128B>;
1814 class SRAI_H_DESC : MSA_BIT_H_DESC_BASE<"srai.h", int_mips_srai_h, MSA128H>;
1815 class SRAI_W_DESC : MSA_BIT_W_DESC_BASE<"srai.w", int_mips_srai_w, MSA128W>;
1816 class SRAI_D_DESC : MSA_BIT_D_DESC_BASE<"srai.d", int_mips_srai_d, MSA128D>;
1818 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
1819 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
1820 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
1821 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
1823 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
1824 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
1825 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
1826 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
1828 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", int_mips_srl_b, MSA128B>;
1829 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", int_mips_srl_h, MSA128H>;
1830 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", int_mips_srl_w, MSA128W>;
1831 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", int_mips_srl_d, MSA128D>;
1833 class SRLI_B_DESC : MSA_BIT_B_DESC_BASE<"srli.b", int_mips_srli_b, MSA128B>;
1834 class SRLI_H_DESC : MSA_BIT_H_DESC_BASE<"srli.h", int_mips_srli_h, MSA128H>;
1835 class SRLI_W_DESC : MSA_BIT_W_DESC_BASE<"srli.w", int_mips_srli_w, MSA128W>;
1836 class SRLI_D_DESC : MSA_BIT_D_DESC_BASE<"srli.d", int_mips_srli_d, MSA128D>;
1838 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
1839 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
1840 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
1841 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
1843 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
1844 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
1845 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
1846 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
1848 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1849 ValueType TyNode, RegisterClass RCWD,
1850 Operand MemOpnd = mem, ComplexPattern Addr = addrRegImm,
1851 InstrItinClass itin = NoItinerary> {
1852 dag OutOperandList = (outs);
1853 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1854 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1855 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1856 InstrItinClass Itinerary = itin;
1859 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
1860 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
1861 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
1862 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
1864 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1865 ValueType TyNode, RegisterClass RCWD,
1866 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1867 InstrItinClass itin = NoItinerary> {
1868 dag OutOperandList = (outs);
1869 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
1870 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1871 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
1872 InstrItinClass Itinerary = itin;
1875 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
1876 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
1877 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
1878 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
1880 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
1881 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
1882 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
1883 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
1885 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
1886 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
1887 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
1888 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
1890 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
1892 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
1894 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
1896 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
1899 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
1901 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
1903 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
1905 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
1908 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", int_mips_subv_b, MSA128B>;
1909 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", int_mips_subv_h, MSA128H>;
1910 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", int_mips_subv_w, MSA128W>;
1911 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", int_mips_subv_d, MSA128D>;
1913 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", int_mips_subvi_b, MSA128B>;
1914 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", int_mips_subvi_h, MSA128H>;
1915 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", int_mips_subvi_w, MSA128W>;
1916 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", int_mips_subvi_d, MSA128D>;
1918 class VSHF_B_DESC : MSA_3R_DESC_BASE<"vshf.b", int_mips_vshf_b, MSA128B>;
1919 class VSHF_H_DESC : MSA_3R_DESC_BASE<"vshf.h", int_mips_vshf_h, MSA128H>;
1920 class VSHF_W_DESC : MSA_3R_DESC_BASE<"vshf.w", int_mips_vshf_w, MSA128W>;
1921 class VSHF_D_DESC : MSA_3R_DESC_BASE<"vshf.d", int_mips_vshf_d, MSA128D>;
1923 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", int_mips_xor_v, MSA128B>;
1925 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", int_mips_xori_b, MSA128B>;
1927 // Instruction defs.
1928 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
1929 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
1930 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
1931 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
1933 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
1934 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
1935 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
1936 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
1938 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
1939 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
1940 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
1941 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
1943 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
1944 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
1945 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
1946 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
1948 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
1949 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
1950 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
1951 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
1953 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
1954 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
1955 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
1956 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
1958 def AND_V : AND_V_ENC, AND_V_DESC;
1960 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
1962 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
1963 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
1964 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
1965 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
1967 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
1968 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
1969 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
1970 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
1972 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
1973 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
1974 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
1975 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
1977 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
1978 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
1979 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
1980 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
1982 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
1983 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
1984 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
1985 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
1987 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
1988 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
1989 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
1990 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
1992 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
1993 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
1994 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
1995 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
1997 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
1998 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
1999 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2000 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2002 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2003 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2004 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2005 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2007 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2008 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2009 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2010 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2012 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2013 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2014 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2015 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2017 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2018 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2019 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2020 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2022 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2024 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2026 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2028 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2030 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2031 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2032 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2033 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2035 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2036 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2037 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2038 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2040 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2041 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2042 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2043 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2045 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2047 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2049 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2051 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2052 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2053 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2054 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2056 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2057 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2058 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2059 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2061 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2062 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2063 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2064 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2066 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2068 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2069 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2070 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2071 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2073 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2074 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2075 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2076 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2078 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2080 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2081 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2082 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2083 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2085 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2086 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2087 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2088 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2090 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2091 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2092 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2093 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2095 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2096 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2097 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2098 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2100 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2101 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2102 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2103 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2105 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2106 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2107 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2108 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2110 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2111 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2112 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2113 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2115 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2116 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2117 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2118 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2120 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2121 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2122 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2124 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2125 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2126 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2128 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2130 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2131 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2132 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2133 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2135 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2136 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2137 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2138 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2140 def DOTP_S_B : DOTP_S_B_ENC, DOTP_S_B_DESC;
2141 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2142 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2143 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2145 def DOTP_U_B : DOTP_U_B_ENC, DOTP_U_B_DESC;
2146 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2147 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2148 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2150 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2151 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2152 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2154 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2155 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2156 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2158 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2159 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2160 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2162 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2163 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2164 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2166 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2167 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2169 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2170 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2172 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2173 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2175 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2176 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2178 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2179 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2181 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2182 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2184 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2185 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2187 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2188 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2190 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2191 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2193 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2194 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2196 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2197 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2199 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2200 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2202 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2203 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2205 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2206 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2208 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2209 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2211 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2212 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2214 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2215 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2217 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2218 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2220 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2221 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2223 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2224 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2226 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2227 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2229 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2230 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2232 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2233 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2234 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2236 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2237 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2239 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2240 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2242 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2243 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2245 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2246 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2248 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2249 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2251 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2252 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2254 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2255 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2257 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2258 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2260 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2261 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2263 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2264 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2266 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2267 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2269 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2270 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2272 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2273 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2275 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2276 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2278 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2279 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2281 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2282 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2284 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2285 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2287 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2288 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2290 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2291 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2293 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2294 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2296 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2297 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2299 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2300 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2302 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2303 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2305 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2306 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2308 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2309 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2311 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2312 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2314 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2315 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2317 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2318 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2320 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2321 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2323 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2324 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2325 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2327 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2328 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2329 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2331 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2332 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2333 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2335 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2336 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2337 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2339 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2340 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2341 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2342 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2344 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2345 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2346 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2347 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2349 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2350 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2351 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2352 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2354 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2355 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2356 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2357 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2359 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2360 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2361 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2363 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2364 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2365 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2366 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2368 def LD_B: LD_B_ENC, LD_B_DESC;
2369 def LD_H: LD_H_ENC, LD_H_DESC;
2370 def LD_W: LD_W_ENC, LD_W_DESC;
2371 def LD_D: LD_D_ENC, LD_D_DESC;
2373 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2374 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2375 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2377 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2378 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2379 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2380 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2382 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2383 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2385 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2386 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2388 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2389 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2390 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2391 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2393 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2394 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2395 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2396 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2398 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2399 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2400 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2401 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2403 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2404 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2405 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2406 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2408 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2409 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2410 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2411 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2413 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2414 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2415 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2416 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2418 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2419 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2420 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2421 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2423 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2424 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2425 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2426 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2428 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2429 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2430 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2431 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2433 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2434 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2435 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2436 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2438 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2439 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2440 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2441 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2443 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2444 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2445 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2446 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2448 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2449 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2450 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2451 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2453 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2455 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2456 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2458 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2459 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2461 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2462 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2463 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2464 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2466 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2467 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2469 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2470 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2472 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2473 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2474 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2475 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2477 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2478 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2479 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2480 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2482 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2483 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2484 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2485 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2487 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2489 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2491 def OR_V : OR_V_ENC, OR_V_DESC;
2493 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2495 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2496 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2497 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2498 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2500 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2501 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2502 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2503 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2505 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2506 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2507 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2508 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2510 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2511 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2512 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2513 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2515 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2516 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2517 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2518 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2520 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2521 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2522 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2524 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2525 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2526 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2527 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2529 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2530 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2531 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2532 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2534 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2535 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2536 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2537 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2539 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2540 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2541 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2542 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2544 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2545 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2546 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2547 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2549 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2550 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2551 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2552 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2554 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2555 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2556 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2557 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2559 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2560 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2561 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2562 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2564 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2565 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2566 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2567 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2569 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2570 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2571 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2572 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2574 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2575 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2576 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2577 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2579 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2580 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2581 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2582 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2584 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2585 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2586 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2587 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2589 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2590 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2591 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2592 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2594 def ST_B: ST_B_ENC, ST_B_DESC;
2595 def ST_H: ST_H_ENC, ST_H_DESC;
2596 def ST_W: ST_W_ENC, ST_W_DESC;
2597 def ST_D: ST_D_ENC, ST_D_DESC;
2599 def STX_B: STX_B_ENC, STX_B_DESC;
2600 def STX_H: STX_H_ENC, STX_H_DESC;
2601 def STX_W: STX_W_ENC, STX_W_DESC;
2602 def STX_D: STX_D_ENC, STX_D_DESC;
2604 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2605 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2606 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2607 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2609 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2610 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2611 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2612 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2614 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2615 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2616 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2617 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2619 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2620 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2621 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2622 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
2624 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
2625 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
2626 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
2627 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
2629 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
2630 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
2631 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
2632 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
2634 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
2635 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
2636 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
2637 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
2639 def XOR_V : XOR_V_ENC, XOR_V_DESC;
2641 def XORI_B : XORI_B_ENC, XORI_B_DESC;
2644 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
2645 Pat<pattern, result>, Requires<pred>;
2647 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
2648 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
2649 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
2650 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
2651 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
2652 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
2653 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
2655 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
2656 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
2657 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
2659 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
2660 (ST_B MSA128B:$ws, addr:$addr)>;
2661 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
2662 (ST_H MSA128H:$ws, addr:$addr)>;
2663 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
2664 (ST_W MSA128W:$ws, addr:$addr)>;
2665 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
2666 (ST_D MSA128D:$ws, addr:$addr)>;
2667 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
2668 (ST_H MSA128H:$ws, addr:$addr)>;
2669 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
2670 (ST_W MSA128W:$ws, addr:$addr)>;
2671 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
2672 (ST_D MSA128D:$ws, addr:$addr)>;
2674 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
2675 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
2676 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
2677 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
2678 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
2679 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
2681 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
2682 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
2683 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2684 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
2686 // These are endian-independant because the element size doesnt change
2687 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
2688 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
2689 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
2690 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
2691 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
2692 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
2694 // Little endian bitcasts are always no-ops
2695 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
2696 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
2697 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
2698 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
2699 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
2700 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
2702 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
2703 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
2704 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
2705 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
2706 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
2708 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
2709 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
2710 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
2711 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
2712 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
2714 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
2715 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
2716 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
2717 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
2718 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
2720 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
2721 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
2722 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
2723 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
2724 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
2726 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
2727 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
2728 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
2729 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
2730 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
2732 // Big endian bitcasts expand to shuffle instructions.
2733 // This is because bitcast is defined to be a store/load sequence and the
2734 // vector store/load instructions are mixed-endian with respect to the vector
2735 // as a whole (little endian with respect to element order, but big endian
2738 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
2739 RegisterClass DstRC, MSAInst Insn,
2740 RegisterClass ViaRC> :
2741 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2742 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
2746 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
2747 RegisterClass DstRC, MSAInst Insn,
2748 RegisterClass ViaRC> :
2749 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2750 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
2754 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
2755 RegisterClass DstRC> :
2756 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2758 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
2759 RegisterClass DstRC> :
2760 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
2762 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
2763 RegisterClass DstRC> :
2764 MSAPat<(DstVT (bitconvert SrcVT:$src)),
2768 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
2773 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
2774 RegisterClass DstRC> :
2775 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2777 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
2778 RegisterClass DstRC> :
2779 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
2781 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
2782 RegisterClass DstRC> :
2783 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
2785 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
2786 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
2787 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
2788 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
2789 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
2790 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
2792 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
2793 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
2794 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
2795 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
2796 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
2798 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
2799 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
2800 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
2801 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
2802 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
2804 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
2805 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
2806 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
2807 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
2808 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
2810 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
2811 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
2812 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
2813 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
2814 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
2816 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
2817 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
2818 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
2819 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
2820 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
2822 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
2823 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
2824 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
2825 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
2826 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
2828 // Pseudos used to implement BNZ.df, and BZ.df
2830 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
2832 InstrItinClass itin = NoItinerary> :
2833 MipsPseudo<(outs GPR32:$dst),
2835 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
2836 bit usesCustomInserter = 1;
2839 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
2840 MSA128B, NoItinerary>;
2841 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
2842 MSA128H, NoItinerary>;
2843 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
2844 MSA128W, NoItinerary>;
2845 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
2846 MSA128D, NoItinerary>;
2847 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
2848 MSA128B, NoItinerary>;
2850 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
2851 MSA128B, NoItinerary>;
2852 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
2853 MSA128H, NoItinerary>;
2854 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
2855 MSA128W, NoItinerary>;
2856 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
2857 MSA128D, NoItinerary>;
2858 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
2859 MSA128B, NoItinerary>;