1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm3 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 def uimm4 : Operand<i32> {
69 let PrintMethod = "printUnsignedImm";
72 def uimm8 : Operand<i32> {
73 let PrintMethod = "printUnsignedImm";
76 def simm5 : Operand<i32>;
78 def simm10 : Operand<i32>;
80 def vsplat_uimm1 : Operand<vAny> {
81 let PrintMethod = "printUnsignedImm8";
84 def vsplat_uimm2 : Operand<vAny> {
85 let PrintMethod = "printUnsignedImm8";
88 def vsplat_uimm3 : Operand<vAny> {
89 let PrintMethod = "printUnsignedImm";
92 def vsplat_uimm4 : Operand<vAny> {
93 let PrintMethod = "printUnsignedImm";
96 def vsplat_uimm5 : Operand<vAny> {
97 let PrintMethod = "printUnsignedImm";
100 def vsplat_uimm6 : Operand<vAny> {
101 let PrintMethod = "printUnsignedImm";
104 def vsplat_uimm8 : Operand<vAny> {
105 let PrintMethod = "printUnsignedImm";
108 def vsplat_simm5 : Operand<vAny>;
110 def vsplat_simm10 : Operand<vAny>;
113 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
114 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
115 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
116 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
117 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
118 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
120 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
121 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
122 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
123 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
124 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
125 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
127 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
129 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
131 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
134 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
135 PatFrag<(ops node:$lhs, node:$rhs),
136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
138 // ISD::SETFALSE cannot occur
139 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
140 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
141 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
142 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
143 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
144 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
145 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
146 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
147 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
148 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
149 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
150 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
151 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
152 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
153 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
154 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
155 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
156 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
157 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
158 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
159 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
160 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
161 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
162 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
163 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
164 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
165 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
166 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
167 // ISD::SETTRUE cannot occur
168 // ISD::SETFALSE2 cannot occur
169 // ISD::SETTRUE2 cannot occur
171 class vsetcc_type<ValueType ResTy, CondCode CC> :
172 PatFrag<(ops node:$lhs, node:$rhs),
173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
175 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
176 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
177 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
178 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
179 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
180 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
181 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
182 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
183 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
184 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
185 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
186 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
187 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
188 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
189 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
190 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
191 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
192 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
193 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
194 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
196 def vsplati8 : PatFrag<(ops node:$e0),
197 (v16i8 (build_vector node:$e0, node:$e0,
204 node:$e0, node:$e0))>;
205 def vsplati16 : PatFrag<(ops node:$e0),
206 (v8i16 (build_vector node:$e0, node:$e0,
209 node:$e0, node:$e0))>;
210 def vsplati32 : PatFrag<(ops node:$e0),
211 (v4i32 (build_vector node:$e0, node:$e0,
212 node:$e0, node:$e0))>;
213 def vsplati64 : PatFrag<(ops node:$e0),
214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
215 def vsplatf32 : PatFrag<(ops node:$e0),
216 (v4f32 (build_vector node:$e0, node:$e0,
217 node:$e0, node:$e0))>;
218 def vsplatf64 : PatFrag<(ops node:$e0),
219 (v2f64 (build_vector node:$e0, node:$e0))>;
221 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
222 SDNodeXForm xform = NOOP_SDNodeXForm>
223 : PatLeaf<frag, pred, xform> {
224 Operand OpClass = opclass;
227 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
228 list<SDNode> roots = [],
229 list<SDNodeProperty> props = []> :
230 ComplexPattern<ty, numops, fn, roots, props> {
231 Operand OpClass = opclass;
234 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
236 [build_vector, bitconvert]>;
238 def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1,
240 [build_vector, bitconvert]>;
242 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
244 [build_vector, bitconvert]>;
246 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
248 [build_vector, bitconvert]>;
250 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
252 [build_vector, bitconvert]>;
254 def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1,
256 [build_vector, bitconvert]>;
258 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
260 [build_vector, bitconvert]>;
262 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
264 [build_vector, bitconvert]>;
266 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
268 [build_vector, bitconvert]>;
270 def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1,
272 [build_vector, bitconvert]>;
274 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
276 [build_vector, bitconvert]>;
278 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
280 [build_vector, bitconvert]>;
282 def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1,
284 [build_vector, bitconvert]>;
286 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
288 [build_vector, bitconvert]>;
290 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
292 [build_vector, bitconvert]>;
294 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
296 [build_vector, bitconvert]>;
298 // Any build_vector that is a constant splat with a value that is an exact
300 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
301 [build_vector, bitconvert]>;
303 def fms : PatFrag<(ops node:$wd, node:$ws, node:$wt),
304 (fsub node:$wd, (fmul node:$ws, node:$wt))>;
306 def muladd : PatFrag<(ops node:$wd, node:$ws, node:$wt),
307 (add node:$wd, (mul node:$ws, node:$wt))>;
309 def mulsub : PatFrag<(ops node:$wd, node:$ws, node:$wt),
310 (sub node:$wd, (mul node:$ws, node:$wt))>;
313 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
314 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
316 // Instruction encoding.
317 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
318 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
319 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
320 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
322 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
323 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
324 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
325 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
327 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
328 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
329 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
330 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
332 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
333 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
334 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
335 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
337 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
338 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
339 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
340 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
342 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
343 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
344 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
345 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
347 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
349 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
351 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
352 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
353 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
354 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
356 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
357 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
358 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
359 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
361 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
362 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
363 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
364 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
366 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
367 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
368 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
369 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
371 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
372 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
373 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
374 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
376 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
377 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
378 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
379 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
381 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
382 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
383 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
384 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
386 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
387 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
388 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
389 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
391 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
392 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
393 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
394 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
396 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
397 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
398 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
399 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
401 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
402 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
403 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
404 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
406 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
407 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
408 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
409 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
411 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
413 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
415 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
417 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
419 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
420 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
421 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
422 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
424 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
425 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
426 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
427 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
429 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
430 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
431 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
432 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
434 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
436 class BSEL_V_ENC : MSA_VEC_FMT<0b00110, 0b011110>;
438 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
440 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
441 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
442 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
443 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
445 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
446 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
447 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
448 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
450 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
451 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
452 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
453 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
455 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
457 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
458 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
459 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
460 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
462 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
463 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
464 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
465 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
467 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
469 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
470 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
471 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
472 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
474 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
475 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
476 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
477 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
479 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
480 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
481 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
482 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
484 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
485 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
486 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
487 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
489 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
490 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
491 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
492 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
494 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
495 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
496 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
497 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
499 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
500 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
501 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
502 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
504 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
505 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
506 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
507 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
509 class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>;
510 class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>;
511 class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>;
513 class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>;
514 class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>;
515 class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>;
517 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
519 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
520 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
521 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
522 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
524 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
525 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
526 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
527 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
529 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
530 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
531 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
533 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
534 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
535 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
537 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
538 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
539 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
541 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
542 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
543 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
545 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
546 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
547 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
549 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
550 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
551 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
553 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
554 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
556 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
557 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
559 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
560 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
562 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
563 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
565 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
566 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
568 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
569 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
571 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
572 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
574 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
575 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
577 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
578 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
580 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
581 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
583 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
584 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
586 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
587 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
589 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
590 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
592 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
593 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
595 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
596 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
598 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
599 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
601 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
602 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
604 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
605 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
607 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
608 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
610 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
611 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
613 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
614 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
616 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
617 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
619 class FILL_B_ENC : MSA_2R_FILL_FMT<0b11000000, 0b00, 0b011110>;
620 class FILL_H_ENC : MSA_2R_FILL_FMT<0b11000000, 0b01, 0b011110>;
621 class FILL_W_ENC : MSA_2R_FILL_FMT<0b11000000, 0b10, 0b011110>;
623 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
624 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
626 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
627 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
629 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
630 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
632 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
633 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
635 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
636 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
638 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
639 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
641 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
642 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
644 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
645 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
647 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
648 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
650 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
651 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
653 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
654 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
656 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
657 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
659 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
660 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
662 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
663 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
665 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
666 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
668 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
669 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
671 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
672 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
674 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
675 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
677 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
678 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
680 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
681 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
683 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
684 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
686 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
687 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
689 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
690 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
692 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
693 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
695 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
696 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
698 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
699 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
701 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
702 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
704 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
705 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
707 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
708 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
710 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
711 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
712 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
714 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
715 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
716 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
718 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
719 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
720 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
722 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
723 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
724 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
726 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
727 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
728 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
729 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
731 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
732 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
733 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
734 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
736 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
737 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
738 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
739 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
741 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
742 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
743 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
744 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
746 class INSERT_B_ENC : MSA_ELM_INSERT_B_FMT<0b0100, 0b011001>;
747 class INSERT_H_ENC : MSA_ELM_INSERT_H_FMT<0b0100, 0b011001>;
748 class INSERT_W_ENC : MSA_ELM_INSERT_W_FMT<0b0100, 0b011001>;
750 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
751 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
752 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
753 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
755 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
756 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
757 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
758 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
760 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
761 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
762 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
763 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
765 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
766 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
767 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
768 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
770 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
771 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
773 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
774 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
776 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
777 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
778 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
779 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
781 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
782 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
783 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
784 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
786 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
787 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
788 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
789 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
791 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
792 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
793 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
794 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
796 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
797 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
798 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
799 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
801 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
802 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
803 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
804 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
806 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
807 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
808 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
809 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
811 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
812 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
813 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
814 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
816 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
817 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
818 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
819 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
821 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
822 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
823 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
824 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
826 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
827 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
828 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
829 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
831 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
832 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
833 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
834 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
836 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
837 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
838 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
839 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
841 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
843 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
844 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
846 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
847 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
849 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
850 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
851 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
852 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
854 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>;
855 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>;
857 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
858 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
860 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
861 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
862 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
863 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
865 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
866 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
867 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
868 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
870 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
871 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
872 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
873 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
875 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
877 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
879 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
881 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
883 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
884 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
885 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
886 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
888 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
889 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
890 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
891 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
893 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
894 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
895 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
896 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
898 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
899 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
900 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
901 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
903 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
904 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
905 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
906 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
908 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
909 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
910 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
912 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
913 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
914 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
915 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
917 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
918 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
919 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
920 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
922 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
923 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
924 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
925 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
927 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
928 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
929 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
930 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
932 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
933 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
934 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
935 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
937 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
938 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
939 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
940 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
942 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
943 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
944 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
945 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
947 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
948 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
949 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
950 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
952 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
953 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
954 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
955 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
957 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
958 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
959 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
960 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
962 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
963 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
964 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
965 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
967 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
968 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
969 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
970 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
972 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
973 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
974 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
975 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
977 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
978 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
979 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
980 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
982 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
983 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
984 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
985 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
987 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
988 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
989 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
990 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
992 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
993 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
994 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
995 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
997 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
998 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
999 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
1000 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
1002 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
1003 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
1004 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
1005 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
1007 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
1008 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
1009 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
1010 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
1012 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
1013 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
1014 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
1015 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
1017 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
1018 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
1019 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
1020 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
1022 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1023 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1024 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1025 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
1027 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
1029 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
1031 // Instruction desc.
1032 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1033 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1034 InstrItinClass itin = NoItinerary> {
1035 dag OutOperandList = (outs ROWD:$wd);
1036 dag InOperandList = (ins ROWS:$ws, uimm3:$m);
1037 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1038 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt3:$m))];
1039 InstrItinClass Itinerary = itin;
1042 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1043 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1044 InstrItinClass itin = NoItinerary> {
1045 dag OutOperandList = (outs ROWD:$wd);
1046 dag InOperandList = (ins ROWS:$ws, uimm4:$m);
1047 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1048 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$m))];
1049 InstrItinClass Itinerary = itin;
1052 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1053 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1054 InstrItinClass itin = NoItinerary> {
1055 dag OutOperandList = (outs ROWD:$wd);
1056 dag InOperandList = (ins ROWS:$ws, uimm5:$m);
1057 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1058 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt5:$m))];
1059 InstrItinClass Itinerary = itin;
1062 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1063 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1064 InstrItinClass itin = NoItinerary> {
1065 dag OutOperandList = (outs ROWD:$wd);
1066 dag InOperandList = (ins ROWS:$ws, uimm6:$m);
1067 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1068 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt6:$m))];
1069 InstrItinClass Itinerary = itin;
1072 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1073 SplatComplexPattern SplatImm,
1074 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1075 InstrItinClass itin = NoItinerary> {
1076 dag OutOperandList = (outs ROWD:$wd);
1077 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$m);
1078 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $m");
1079 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$m))];
1080 InstrItinClass Itinerary = itin;
1083 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1084 ValueType VecTy, RegisterOperand ROD,
1085 RegisterOperand ROWS,
1086 InstrItinClass itin = NoItinerary> {
1087 dag OutOperandList = (outs ROD:$rd);
1088 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1089 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1090 list<dag> Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))];
1091 InstrItinClass Itinerary = itin;
1094 class MSA_ELM_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1095 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1096 InstrItinClass itin = NoItinerary> {
1097 dag OutOperandList = (outs ROWD:$wd);
1098 dag InOperandList = (ins ROWS:$ws, uimm4:$n);
1099 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1100 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))];
1101 InstrItinClass Itinerary = itin;
1104 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1105 RegisterClass RCD, RegisterClass RCWS> :
1106 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n),
1107 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> {
1108 bit usesCustomInserter = 1;
1111 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1112 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1113 RegisterOperand ROWS = ROWD,
1114 InstrItinClass itin = NoItinerary> {
1115 dag OutOperandList = (outs ROWD:$wd);
1116 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$imm);
1117 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1118 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$imm))];
1119 InstrItinClass Itinerary = itin;
1122 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1123 SplatComplexPattern SplatImm, RegisterOperand ROWD,
1124 RegisterOperand ROWS = ROWD,
1125 InstrItinClass itin = NoItinerary> {
1126 dag OutOperandList = (outs ROWD:$wd);
1127 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$u8);
1128 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1129 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, SplatImm:$u8))];
1130 InstrItinClass Itinerary = itin;
1133 // This class is deprecated and will be removed in the next few patches
1134 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1135 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1136 InstrItinClass itin = NoItinerary> {
1137 dag OutOperandList = (outs ROWD:$wd);
1138 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1139 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1140 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt8:$u8))];
1141 InstrItinClass Itinerary = itin;
1144 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1145 RegisterOperand ROWS = ROWD,
1146 InstrItinClass itin = NoItinerary> {
1147 dag OutOperandList = (outs ROWD:$wd);
1148 dag InOperandList = (ins ROWS:$ws, uimm8:$u8);
1149 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1150 list<dag> Pattern = [(set ROWD:$wd, (MipsSHF immZExt8:$u8, ROWS:$ws))];
1151 InstrItinClass Itinerary = itin;
1154 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1155 InstrItinClass itin = NoItinerary> {
1156 dag OutOperandList = (outs RCWD:$wd);
1157 dag InOperandList = (ins vsplat_simm10:$i10);
1158 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1159 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1160 list<dag> Pattern = [];
1161 bit hasSideEffects = 0;
1162 InstrItinClass Itinerary = itin;
1165 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1166 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1167 InstrItinClass itin = NoItinerary> {
1168 dag OutOperandList = (outs ROWD:$wd);
1169 dag InOperandList = (ins ROWS:$ws);
1170 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1171 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1172 InstrItinClass Itinerary = itin;
1175 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1176 SDPatternOperator OpNode, RegisterOperand ROWD,
1177 RegisterOperand ROS = ROWD,
1178 InstrItinClass itin = NoItinerary> {
1179 dag OutOperandList = (outs ROWD:$wd);
1180 dag InOperandList = (ins ROS:$rs);
1181 string AsmString = !strconcat(instr_asm, "\t$wd, $rs");
1182 list<dag> Pattern = [(set ROWD:$wd, (VT (OpNode ROS:$rs)))];
1183 InstrItinClass Itinerary = itin;
1186 class MSA_2R_FILL_PSEUDO_BASE<ValueType VT, SDPatternOperator OpNode,
1187 RegisterClass RCWD, RegisterClass RCWS = RCWD> :
1188 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$fs),
1189 [(set RCWD:$wd, (OpNode RCWS:$fs))]> {
1190 let usesCustomInserter = 1;
1193 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1194 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1195 InstrItinClass itin = NoItinerary> {
1196 dag OutOperandList = (outs ROWD:$wd);
1197 dag InOperandList = (ins ROWS:$ws);
1198 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1199 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1200 InstrItinClass Itinerary = itin;
1203 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1204 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1205 RegisterOperand ROWT = ROWD,
1206 InstrItinClass itin = NoItinerary> {
1207 dag OutOperandList = (outs ROWD:$wd);
1208 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1209 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1210 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1211 InstrItinClass Itinerary = itin;
1214 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1215 RegisterOperand ROWS = ROWD,
1216 RegisterOperand ROWT = ROWD,
1217 InstrItinClass itin = NoItinerary> {
1218 dag OutOperandList = (outs ROWD:$wd);
1219 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1220 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1221 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws,
1223 string Constraints = "$wd = $wd_in";
1224 InstrItinClass Itinerary = itin;
1227 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1228 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1229 RegisterOperand ROWT = ROWD,
1230 InstrItinClass itin = NoItinerary> {
1231 dag OutOperandList = (outs ROWD:$wd);
1232 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1233 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1234 list<dag> Pattern = [(set ROWD:$wd,
1235 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))];
1236 InstrItinClass Itinerary = itin;
1237 string Constraints = "$wd = $wd_in";
1240 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1241 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1242 RegisterOperand ROWT = ROWD,
1243 InstrItinClass itin = NoItinerary> :
1244 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1246 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1247 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1248 RegisterOperand ROWT = ROWD,
1249 InstrItinClass itin = NoItinerary> :
1250 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1252 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1253 dag OutOperandList = (outs);
1254 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1255 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1256 list<dag> Pattern = [];
1257 InstrItinClass Itinerary = IIBranch;
1259 bit isTerminator = 1;
1260 bit hasDelaySlot = 1;
1261 list<Register> Defs = [AT];
1264 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1265 RegisterOperand ROWD, RegisterOperand ROS,
1266 InstrItinClass itin = NoItinerary> {
1267 dag OutOperandList = (outs ROWD:$wd);
1268 dag InOperandList = (ins ROWD:$wd_in, ROS:$rs, uimm6:$n);
1269 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1270 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1273 InstrItinClass Itinerary = itin;
1274 string Constraints = "$wd = $wd_in";
1277 class MSA_INSERT_PSEUDO_BASE<SDPatternOperator OpNode, ValueType Ty,
1278 RegisterOperand ROWD, RegisterOperand ROFS> :
1279 MipsPseudo<(outs ROWD:$wd), (ins ROWD:$wd_in, uimm6:$n, ROFS:$fs),
1280 [(set ROWD:$wd, (OpNode (Ty ROWD:$wd_in), ROFS:$fs,
1282 bit usesCustomInserter = 1;
1283 string Constraints = "$wd = $wd_in";
1286 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1287 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1288 InstrItinClass itin = NoItinerary> {
1289 dag OutOperandList = (outs ROWD:$wd);
1290 dag InOperandList = (ins ROWD:$wd_in, uimm6:$n, ROWS:$ws);
1291 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1292 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWD:$wd_in,
1295 InstrItinClass Itinerary = itin;
1296 string Constraints = "$wd = $wd_in";
1299 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1300 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1301 RegisterOperand ROWT = ROWD,
1302 InstrItinClass itin = NoItinerary> {
1303 dag OutOperandList = (outs ROWD:$wd);
1304 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1305 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1306 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1307 InstrItinClass Itinerary = itin;
1310 class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
1311 RegisterOperand ROWD,
1312 RegisterOperand ROWS = ROWD,
1313 InstrItinClass itin = NoItinerary> {
1314 dag OutOperandList = (outs ROWD:$wd);
1315 dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n);
1316 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]");
1317 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws,
1319 InstrItinClass Itinerary = itin;
1322 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterOperand ROWD,
1323 RegisterOperand ROWS = ROWD,
1324 RegisterOperand ROWT = ROWD> :
1325 MipsPseudo<(outs ROWD:$wd), (ins ROWS:$ws, ROWT:$wt),
1326 [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))]>;
1328 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>,
1330 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>,
1332 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>,
1334 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>,
1337 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
1338 MSA128BOpnd>, IsCommutable;
1339 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
1340 MSA128HOpnd>, IsCommutable;
1341 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
1342 MSA128WOpnd>, IsCommutable;
1343 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
1344 MSA128DOpnd>, IsCommutable;
1346 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
1347 MSA128BOpnd>, IsCommutable;
1348 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
1349 MSA128HOpnd>, IsCommutable;
1350 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
1351 MSA128WOpnd>, IsCommutable;
1352 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
1353 MSA128DOpnd>, IsCommutable;
1355 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
1356 MSA128BOpnd>, IsCommutable;
1357 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
1358 MSA128HOpnd>, IsCommutable;
1359 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
1360 MSA128WOpnd>, IsCommutable;
1361 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
1362 MSA128DOpnd>, IsCommutable;
1364 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable;
1365 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable;
1366 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable;
1367 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable;
1369 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5,
1371 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5,
1373 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5,
1375 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5,
1378 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128BOpnd>;
1379 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128HOpnd>;
1380 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128WOpnd>;
1381 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128DOpnd>;
1383 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8,
1386 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
1388 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
1390 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
1392 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
1395 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
1397 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
1399 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
1401 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
1404 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>,
1406 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>,
1408 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>,
1410 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>,
1413 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>,
1415 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>,
1417 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>,
1419 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>,
1422 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
1423 MSA128BOpnd>, IsCommutable;
1424 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
1425 MSA128HOpnd>, IsCommutable;
1426 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
1427 MSA128WOpnd>, IsCommutable;
1428 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
1429 MSA128DOpnd>, IsCommutable;
1431 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
1432 MSA128BOpnd>, IsCommutable;
1433 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
1434 MSA128HOpnd>, IsCommutable;
1435 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
1436 MSA128WOpnd>, IsCommutable;
1437 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
1438 MSA128DOpnd>, IsCommutable;
1440 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>;
1441 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>;
1442 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>;
1443 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>;
1445 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b,
1447 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h,
1449 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w,
1451 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d,
1454 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>;
1455 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>;
1456 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>;
1457 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>;
1459 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1461 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1463 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1465 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1468 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>;
1469 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>;
1470 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>;
1471 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>;
1473 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1475 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1477 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1479 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1482 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128BOpnd>;
1484 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b,
1487 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128BOpnd>;
1489 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128BOpnd>;
1491 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>;
1492 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>;
1493 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>;
1494 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>;
1496 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b,
1498 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h,
1500 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w,
1502 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d,
1505 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1506 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1507 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1508 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1510 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1513 dag OutOperandList = (outs MSA128BOpnd:$wd);
1514 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1516 string AsmString = "bsel.v\t$wd, $ws, $wt";
1517 list<dag> Pattern = [(set MSA128BOpnd:$wd,
1518 (vselect MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1520 InstrItinClass Itinerary = NoItinerary;
1521 string Constraints = "$wd = $wd_in";
1524 class BSELI_B_DESC {
1525 dag OutOperandList = (outs MSA128BOpnd:$wd);
1526 dag InOperandList = (ins MSA128BOpnd:$wd_in, MSA128BOpnd:$ws,
1528 string AsmString = "bseli.b\t$wd, $ws, $u8";
1529 list<dag> Pattern = [(set MSA128BOpnd:$wd, (vselect MSA128BOpnd:$wd_in,
1531 vsplati8_uimm8:$u8))];
1532 InstrItinClass Itinerary = NoItinerary;
1533 string Constraints = "$wd = $wd_in";
1536 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>;
1537 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>;
1538 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>;
1539 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>;
1541 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b,
1543 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h,
1545 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w,
1547 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d,
1550 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1551 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1552 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1553 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1555 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1557 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>,
1559 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>,
1561 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>,
1563 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>,
1566 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1568 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1570 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1572 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1576 dag OutOperandList = (outs GPR32:$rd);
1577 dag InOperandList = (ins MSACtrl:$cs);
1578 string AsmString = "cfcmsa\t$rd, $cs";
1579 InstrItinClass Itinerary = NoItinerary;
1580 bit hasSideEffects = 1;
1583 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>;
1584 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>;
1585 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>;
1586 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>;
1588 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>;
1589 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>;
1590 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>;
1591 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>;
1593 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1594 vsplati8_simm5, MSA128BOpnd>;
1595 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1596 vsplati16_simm5, MSA128HOpnd>;
1597 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1598 vsplati32_simm5, MSA128WOpnd>;
1599 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1600 vsplati64_simm5, MSA128DOpnd>;
1602 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1603 vsplati8_uimm5, MSA128BOpnd>;
1604 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1605 vsplati16_uimm5, MSA128HOpnd>;
1606 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1607 vsplati32_uimm5, MSA128WOpnd>;
1608 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1609 vsplati64_uimm5, MSA128DOpnd>;
1611 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>;
1612 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>;
1613 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>;
1614 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>;
1616 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>;
1617 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>;
1618 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>;
1619 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>;
1621 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1622 vsplati8_simm5, MSA128BOpnd>;
1623 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1624 vsplati16_simm5, MSA128HOpnd>;
1625 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1626 vsplati32_simm5, MSA128WOpnd>;
1627 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1628 vsplati64_simm5, MSA128DOpnd>;
1630 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1631 vsplati8_uimm5, MSA128BOpnd>;
1632 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1633 vsplati16_uimm5, MSA128HOpnd>;
1634 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1635 vsplati32_uimm5, MSA128WOpnd>;
1636 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1637 vsplati64_uimm5, MSA128DOpnd>;
1639 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1640 GPR32Opnd, MSA128BOpnd>;
1641 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1642 GPR32Opnd, MSA128HOpnd>;
1643 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1644 GPR32Opnd, MSA128WOpnd>;
1646 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1647 GPR32Opnd, MSA128BOpnd>;
1648 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1649 GPR32Opnd, MSA128HOpnd>;
1650 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1651 GPR32Opnd, MSA128WOpnd>;
1653 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1655 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1659 dag OutOperandList = (outs);
1660 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1661 string AsmString = "ctcmsa\t$cd, $rs";
1662 InstrItinClass Itinerary = NoItinerary;
1663 bit hasSideEffects = 1;
1666 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>;
1667 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>;
1668 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>;
1669 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>;
1671 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>;
1672 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>;
1673 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>;
1674 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>;
1676 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
1677 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1679 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
1680 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1682 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
1683 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1686 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
1687 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1689 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
1690 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1692 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
1693 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1696 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1697 MSA128HOpnd, MSA128BOpnd,
1698 MSA128BOpnd>, IsCommutable;
1699 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1700 MSA128WOpnd, MSA128HOpnd,
1701 MSA128HOpnd>, IsCommutable;
1702 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1703 MSA128DOpnd, MSA128WOpnd,
1704 MSA128WOpnd>, IsCommutable;
1706 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1707 MSA128HOpnd, MSA128BOpnd,
1708 MSA128BOpnd>, IsCommutable;
1709 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1710 MSA128WOpnd, MSA128HOpnd,
1711 MSA128HOpnd>, IsCommutable;
1712 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1713 MSA128DOpnd, MSA128WOpnd,
1714 MSA128WOpnd>, IsCommutable;
1716 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1717 MSA128HOpnd, MSA128BOpnd,
1719 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1720 MSA128WOpnd, MSA128HOpnd,
1722 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1723 MSA128DOpnd, MSA128WOpnd,
1726 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1727 MSA128HOpnd, MSA128BOpnd,
1729 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1730 MSA128WOpnd, MSA128HOpnd,
1732 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1733 MSA128DOpnd, MSA128WOpnd,
1736 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>,
1738 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>,
1741 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>,
1743 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>,
1746 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>,
1748 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>,
1751 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1753 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1756 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>;
1757 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>;
1759 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>;
1760 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>;
1762 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>,
1764 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>,
1767 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>,
1769 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>,
1772 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>,
1774 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>,
1777 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>,
1779 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>,
1782 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>,
1784 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>,
1787 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>,
1789 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>,
1792 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>,
1794 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>,
1797 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>;
1798 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>;
1800 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1801 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1802 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1803 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1805 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w,
1807 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d,
1810 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1811 MSA128WOpnd, MSA128HOpnd>;
1812 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1813 MSA128DOpnd, MSA128WOpnd>;
1815 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1816 MSA128WOpnd, MSA128HOpnd>;
1817 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1818 MSA128DOpnd, MSA128WOpnd>;
1820 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", sint_to_fp, MSA128WOpnd>;
1821 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", sint_to_fp, MSA128DOpnd>;
1823 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", uint_to_fp, MSA128WOpnd>;
1824 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", uint_to_fp, MSA128DOpnd>;
1826 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1827 MSA128WOpnd, MSA128HOpnd>;
1828 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1829 MSA128DOpnd, MSA128WOpnd>;
1831 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1832 MSA128WOpnd, MSA128HOpnd>;
1833 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1834 MSA128DOpnd, MSA128WOpnd>;
1836 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8,
1837 MSA128BOpnd, GPR32Opnd>;
1838 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16,
1839 MSA128HOpnd, GPR32Opnd>;
1840 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32,
1841 MSA128WOpnd, GPR32Opnd>;
1843 class FILL_FW_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v4f32, vsplatf32, MSA128W,
1845 class FILL_FD_PSEUDO_DESC : MSA_2R_FILL_PSEUDO_BASE<v2f64, vsplatf64, MSA128D,
1848 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>;
1849 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>;
1851 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", fma, MSA128WOpnd>;
1852 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", fma, MSA128DOpnd>;
1854 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>;
1855 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>;
1857 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1859 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1862 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>;
1863 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>;
1865 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1867 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1870 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", fms, MSA128WOpnd>;
1871 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", fms, MSA128DOpnd>;
1873 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>;
1874 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>;
1876 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;
1877 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
1879 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
1880 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
1882 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1884 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1887 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>;
1888 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>;
1890 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>;
1891 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>;
1893 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>;
1894 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>;
1896 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>;
1897 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>;
1899 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>;
1900 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>;
1902 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>;
1903 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>;
1905 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>;
1906 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>;
1908 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>;
1909 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>;
1911 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w,
1913 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d,
1916 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w,
1918 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d,
1921 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w,
1923 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d,
1926 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w,
1928 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d,
1931 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w,
1933 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d,
1936 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1938 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1941 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1943 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1946 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1947 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1948 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1949 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1951 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", fp_to_sint,
1953 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", fp_to_sint,
1956 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", fp_to_uint,
1958 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", fp_to_uint,
1961 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h,
1962 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1963 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w,
1964 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1965 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d,
1966 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1968 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h,
1969 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1970 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w,
1971 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1972 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d,
1973 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1975 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h,
1976 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1977 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w,
1978 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1979 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d,
1980 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1982 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h,
1983 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1984 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w,
1985 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1986 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d,
1987 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1989 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>;
1990 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>;
1991 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>;
1992 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>;
1994 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>;
1995 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>;
1996 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>;
1997 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>;
1999 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>;
2000 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>;
2001 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>;
2002 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>;
2004 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>;
2005 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>;
2006 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>;
2007 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>;
2009 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8,
2010 MSA128BOpnd, GPR32Opnd>;
2011 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16,
2012 MSA128HOpnd, GPR32Opnd>;
2013 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32,
2014 MSA128WOpnd, GPR32Opnd>;
2016 class INSERT_FW_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v4f32,
2017 MSA128WOpnd, FGR32Opnd>;
2018 class INSERT_FD_PSEUDO_DESC : MSA_INSERT_PSEUDO_BASE<vector_insert, v2f64,
2019 MSA128DOpnd, FGR64Opnd>;
2021 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b,
2023 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h,
2025 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w,
2027 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d,
2030 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2031 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2032 ComplexPattern Addr = addrRegImm,
2033 InstrItinClass itin = NoItinerary> {
2034 dag OutOperandList = (outs RCWD:$wd);
2035 dag InOperandList = (ins MemOpnd:$addr);
2036 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2037 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
2038 InstrItinClass Itinerary = itin;
2041 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
2042 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
2043 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
2044 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
2046 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
2047 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
2048 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
2049 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
2051 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2052 ValueType TyNode, RegisterClass RCWD,
2053 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2054 InstrItinClass itin = NoItinerary> {
2055 dag OutOperandList = (outs RCWD:$wd);
2056 dag InOperandList = (ins MemOpnd:$addr);
2057 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2058 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
2059 InstrItinClass Itinerary = itin;
2062 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
2063 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
2064 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
2065 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
2067 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
2069 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
2072 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
2074 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
2077 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", muladd, MSA128BOpnd>;
2078 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", muladd, MSA128HOpnd>;
2079 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", muladd, MSA128WOpnd>;
2080 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", muladd, MSA128DOpnd>;
2082 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>;
2083 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>;
2084 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>;
2085 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>;
2087 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>;
2088 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>;
2089 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>;
2090 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>;
2092 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>;
2093 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>;
2094 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>;
2095 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>;
2097 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
2099 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
2101 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
2103 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
2106 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
2108 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
2110 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
2112 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
2115 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>;
2116 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>;
2117 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>;
2118 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>;
2120 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>;
2121 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>;
2122 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>;
2123 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>;
2125 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>;
2126 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>;
2127 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>;
2128 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>;
2130 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
2132 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
2134 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
2136 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
2139 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
2141 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
2143 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2145 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2148 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", srem, MSA128BOpnd>;
2149 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", srem, MSA128HOpnd>;
2150 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", srem, MSA128WOpnd>;
2151 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", srem, MSA128DOpnd>;
2153 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", urem, MSA128BOpnd>;
2154 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", urem, MSA128HOpnd>;
2155 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", urem, MSA128WOpnd>;
2156 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", urem, MSA128DOpnd>;
2159 dag OutOperandList = (outs MSA128B:$wd);
2160 dag InOperandList = (ins MSA128B:$ws);
2161 string AsmString = "move.v\t$wd, $ws";
2162 list<dag> Pattern = [];
2163 InstrItinClass Itinerary = NoItinerary;
2166 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2168 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2171 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2173 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2176 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", mulsub, MSA128BOpnd>;
2177 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", mulsub, MSA128HOpnd>;
2178 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", mulsub, MSA128WOpnd>;
2179 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", mulsub, MSA128DOpnd>;
2181 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
2183 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
2186 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2188 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2191 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>;
2192 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>;
2193 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>;
2194 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>;
2196 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128BOpnd>;
2197 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128HOpnd>;
2198 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128WOpnd>;
2199 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128DOpnd>;
2201 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128BOpnd>;
2202 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128HOpnd>;
2203 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128WOpnd>;
2204 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128DOpnd>;
2206 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128BOpnd>;
2207 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128HOpnd>;
2208 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128WOpnd>;
2209 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128DOpnd>;
2211 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2214 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128BOpnd>;
2215 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128HOpnd>;
2216 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128WOpnd>;
2217 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128DOpnd>;
2219 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128BOpnd>;
2221 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>;
2222 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>;
2223 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>;
2224 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>;
2226 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>;
2227 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>;
2228 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>;
2229 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>;
2231 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128BOpnd>;
2232 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128HOpnd>;
2233 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128WOpnd>;
2234 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128DOpnd>;
2236 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b,
2238 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h,
2240 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w,
2242 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d,
2245 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b,
2247 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h,
2249 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w,
2251 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d,
2254 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128BOpnd>;
2255 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128HOpnd>;
2256 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128WOpnd>;
2258 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>;
2259 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
2260 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
2261 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
2263 class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>;
2264 class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>;
2265 class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>;
2266 class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>;
2268 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2269 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2270 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2271 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2273 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2275 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2277 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2279 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2282 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd,
2283 MSA128BOpnd, GPR32Opnd>;
2284 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd,
2285 MSA128HOpnd, GPR32Opnd>;
2286 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd,
2287 MSA128WOpnd, GPR32Opnd>;
2288 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd,
2289 MSA128DOpnd, GPR32Opnd>;
2291 class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
2293 class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
2295 class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
2297 class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
2300 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
2301 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
2302 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>;
2303 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>;
2305 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2307 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2309 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2311 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2314 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2315 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2316 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2317 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2319 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b,
2321 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h,
2323 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w,
2325 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d,
2328 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2329 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2330 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2331 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2333 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2335 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2337 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2339 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2342 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2343 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2344 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2345 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2347 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b,
2349 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h,
2351 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w,
2353 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d,
2356 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2357 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2358 ComplexPattern Addr = addrRegImm,
2359 InstrItinClass itin = NoItinerary> {
2360 dag OutOperandList = (outs);
2361 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2362 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2363 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2364 InstrItinClass Itinerary = itin;
2367 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2368 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2369 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2370 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2372 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2373 ValueType TyNode, RegisterClass RCWD,
2374 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2375 InstrItinClass itin = NoItinerary> {
2376 dag OutOperandList = (outs);
2377 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2378 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2379 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2380 InstrItinClass Itinerary = itin;
2383 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
2384 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
2385 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
2386 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
2388 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
2390 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
2392 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
2394 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
2397 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
2399 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
2401 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
2403 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
2406 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2408 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2410 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2412 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2415 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2417 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2419 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2421 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2424 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>;
2425 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>;
2426 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>;
2427 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>;
2429 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5,
2431 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5,
2433 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5,
2435 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5,
2438 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>;
2439 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>;
2440 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>;
2441 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>;
2443 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128BOpnd>;
2444 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128HOpnd>;
2445 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128WOpnd>;
2446 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128DOpnd>;
2448 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8,
2451 // Instruction defs.
2452 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2453 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2454 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2455 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2457 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2458 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2459 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2460 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2462 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2463 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2464 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2465 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2467 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2468 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2469 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2470 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2472 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2473 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2474 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2475 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2477 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2478 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2479 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2480 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2482 def AND_V : AND_V_ENC, AND_V_DESC;
2483 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2484 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2487 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2488 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2491 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2492 PseudoInstExpansion<(AND_V MSA128BOpnd:$wd,
2496 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2498 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2499 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2500 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2501 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2503 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2504 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2505 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2506 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2508 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2509 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2510 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2511 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2513 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2514 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2515 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2516 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2518 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2519 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2520 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2521 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2523 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2524 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2525 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2526 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2528 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2529 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2530 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2531 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2533 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2534 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2535 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2536 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2538 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2539 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2540 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2541 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2543 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2544 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2545 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2546 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2548 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2549 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2550 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2551 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2553 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2554 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2555 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2556 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2558 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2560 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2562 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2564 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2566 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2567 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2568 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2569 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2571 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2572 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2573 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2574 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2576 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2577 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2578 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2579 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2581 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2583 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2585 class MSA_BSEL_PSEUDO_BASE<RegisterOperand RO, ValueType Ty> :
2586 MipsPseudo<(outs RO:$wd), (ins RO:$wd_in, RO:$ws, RO:$wt),
2587 [(set RO:$wd, (Ty (vselect RO:$wd_in, RO:$ws, RO:$wt)))]>,
2588 PseudoInstExpansion<(BSEL_V MSA128BOpnd:$wd, MSA128BOpnd:$wd_in,
2589 MSA128BOpnd:$ws, MSA128BOpnd:$wt)> {
2590 let Constraints = "$wd_in = $wd";
2593 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128HOpnd, v8i16>;
2594 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4i32>;
2595 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2i64>;
2596 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128WOpnd, v4f32>;
2597 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128DOpnd, v2f64>;
2599 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2601 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2602 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2603 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2604 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2606 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2607 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2608 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2609 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2611 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2612 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2613 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2614 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2616 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2618 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2619 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2620 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2621 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2623 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2624 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2625 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2626 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2628 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2630 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2631 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2632 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2633 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2635 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2636 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2637 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2638 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2640 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2641 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2642 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2643 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2645 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2646 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2647 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2648 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2650 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2651 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2652 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2653 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2655 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2656 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2657 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2658 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2660 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2661 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2662 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2663 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2665 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2666 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2667 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2668 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2670 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2671 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2672 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2674 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2675 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2676 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2678 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
2679 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
2681 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2683 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2684 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2685 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2686 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2688 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2689 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2690 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2691 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2693 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2694 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2695 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2697 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2698 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2699 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2701 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2702 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2703 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2705 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2706 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2707 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2709 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2710 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2711 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2713 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2714 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2715 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2717 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2718 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2720 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2721 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2723 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2724 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2726 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2727 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2729 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2730 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2732 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2733 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2735 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2736 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2738 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2739 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2741 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2742 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2744 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2745 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2747 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2748 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2750 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2751 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2753 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2754 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2756 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2757 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2759 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2760 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2762 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2763 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2765 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2766 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2768 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2769 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2771 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2772 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2774 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2775 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2777 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2778 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2780 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2781 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2783 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2784 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2785 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2786 def FILL_FW_PSEUDO : FILL_FW_PSEUDO_DESC;
2787 def FILL_FD_PSEUDO : FILL_FD_PSEUDO_DESC;
2789 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2790 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2792 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2793 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2795 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2796 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2798 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2799 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2801 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2802 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2804 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2805 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2807 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2808 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2810 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2811 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2813 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2814 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2816 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2817 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2819 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2820 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2822 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2823 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2825 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2826 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2828 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2829 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2831 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2832 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2834 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2835 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2837 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2838 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2840 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2841 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2843 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2844 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2846 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2847 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2849 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2850 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2852 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2853 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2855 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2856 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2858 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2859 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2861 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2862 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2864 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2865 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2867 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2868 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2870 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2871 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2873 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2874 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2876 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2877 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2878 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2880 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2881 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2882 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2884 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2885 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2886 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2888 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2889 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2890 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2892 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2893 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2894 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2895 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2897 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2898 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2899 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2900 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2902 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2903 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2904 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2905 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2907 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2908 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2909 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2910 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2912 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2913 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2914 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2916 // INSERT_FW_PSEUDO defined after INSVE_W
2917 // INSERT_FD_PSEUDO defined after INSVE_D
2919 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2920 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2921 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2922 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2924 def INSERT_FW_PSEUDO : INSERT_FW_PSEUDO_DESC;
2925 def INSERT_FD_PSEUDO : INSERT_FD_PSEUDO_DESC;
2927 def LD_B: LD_B_ENC, LD_B_DESC;
2928 def LD_H: LD_H_ENC, LD_H_DESC;
2929 def LD_W: LD_W_ENC, LD_W_DESC;
2930 def LD_D: LD_D_ENC, LD_D_DESC;
2932 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2933 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2934 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2935 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2937 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2938 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2939 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2940 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2942 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2943 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2945 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2946 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2948 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2949 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2950 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2951 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2953 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2954 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2955 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2956 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2958 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2959 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2960 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2961 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2963 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2964 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2965 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2966 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2968 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2969 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2970 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2971 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2973 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2974 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2975 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2976 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2978 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2979 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2980 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2981 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2983 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2984 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2985 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2986 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2988 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2989 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2990 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2991 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2993 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2994 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2995 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2996 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2998 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2999 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
3000 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
3001 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
3003 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
3004 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
3005 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
3006 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
3008 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
3009 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
3010 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
3011 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
3013 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
3015 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
3016 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
3018 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
3019 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
3021 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
3022 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
3023 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
3024 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
3026 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
3027 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
3029 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
3030 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
3032 def MULV_B : MULV_B_ENC, MULV_B_DESC;
3033 def MULV_H : MULV_H_ENC, MULV_H_DESC;
3034 def MULV_W : MULV_W_ENC, MULV_W_DESC;
3035 def MULV_D : MULV_D_ENC, MULV_D_DESC;
3037 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
3038 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
3039 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
3040 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
3042 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
3043 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
3044 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
3045 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
3047 def NOR_V : NOR_V_ENC, NOR_V_DESC;
3048 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
3049 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3052 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
3053 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3056 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
3057 PseudoInstExpansion<(NOR_V MSA128BOpnd:$wd,
3061 def NORI_B : NORI_B_ENC, NORI_B_DESC;
3063 def OR_V : OR_V_ENC, OR_V_DESC;
3064 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
3065 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3068 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
3069 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3072 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
3073 PseudoInstExpansion<(OR_V MSA128BOpnd:$wd,
3077 def ORI_B : ORI_B_ENC, ORI_B_DESC;
3079 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
3080 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
3081 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
3082 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
3084 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
3085 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
3086 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
3087 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
3089 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
3090 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
3091 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
3092 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
3094 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
3095 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
3096 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
3097 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
3099 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
3100 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
3101 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
3102 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
3104 def SHF_B : SHF_B_ENC, SHF_B_DESC;
3105 def SHF_H : SHF_H_ENC, SHF_H_DESC;
3106 def SHF_W : SHF_W_ENC, SHF_W_DESC;
3108 def SLD_B : SLD_B_ENC, SLD_B_DESC;
3109 def SLD_H : SLD_H_ENC, SLD_H_DESC;
3110 def SLD_W : SLD_W_ENC, SLD_W_DESC;
3111 def SLD_D : SLD_D_ENC, SLD_D_DESC;
3113 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
3114 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
3115 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
3116 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
3118 def SLL_B : SLL_B_ENC, SLL_B_DESC;
3119 def SLL_H : SLL_H_ENC, SLL_H_DESC;
3120 def SLL_W : SLL_W_ENC, SLL_W_DESC;
3121 def SLL_D : SLL_D_ENC, SLL_D_DESC;
3123 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
3124 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
3125 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
3126 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
3128 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
3129 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
3130 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
3131 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
3133 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
3134 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
3135 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
3136 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
3138 def SRA_B : SRA_B_ENC, SRA_B_DESC;
3139 def SRA_H : SRA_H_ENC, SRA_H_DESC;
3140 def SRA_W : SRA_W_ENC, SRA_W_DESC;
3141 def SRA_D : SRA_D_ENC, SRA_D_DESC;
3143 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
3144 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
3145 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
3146 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
3148 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
3149 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
3150 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
3151 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
3153 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
3154 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
3155 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
3156 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
3158 def SRL_B : SRL_B_ENC, SRL_B_DESC;
3159 def SRL_H : SRL_H_ENC, SRL_H_DESC;
3160 def SRL_W : SRL_W_ENC, SRL_W_DESC;
3161 def SRL_D : SRL_D_ENC, SRL_D_DESC;
3163 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
3164 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
3165 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
3166 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
3168 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
3169 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
3170 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
3171 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
3173 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
3174 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
3175 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
3176 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
3178 def ST_B: ST_B_ENC, ST_B_DESC;
3179 def ST_H: ST_H_ENC, ST_H_DESC;
3180 def ST_W: ST_W_ENC, ST_W_DESC;
3181 def ST_D: ST_D_ENC, ST_D_DESC;
3183 def STX_B: STX_B_ENC, STX_B_DESC;
3184 def STX_H: STX_H_ENC, STX_H_DESC;
3185 def STX_W: STX_W_ENC, STX_W_DESC;
3186 def STX_D: STX_D_ENC, STX_D_DESC;
3188 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
3189 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
3190 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
3191 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
3193 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
3194 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
3195 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3196 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3198 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3199 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3200 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3201 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3203 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3204 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3205 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3206 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3208 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3209 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3210 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3211 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3213 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3214 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3215 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3216 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3218 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3219 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3220 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3221 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3223 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3224 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3225 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3228 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3229 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3232 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3233 PseudoInstExpansion<(XOR_V MSA128BOpnd:$wd,
3237 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3240 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3241 Pat<pattern, result>, Requires<pred>;
3243 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3244 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3246 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3247 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3248 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3249 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3250 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3251 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3252 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3254 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3255 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3256 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3258 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3259 (ST_B MSA128B:$ws, addr:$addr)>;
3260 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3261 (ST_H MSA128H:$ws, addr:$addr)>;
3262 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3263 (ST_W MSA128W:$ws, addr:$addr)>;
3264 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3265 (ST_D MSA128D:$ws, addr:$addr)>;
3266 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3267 (ST_H MSA128H:$ws, addr:$addr)>;
3268 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3269 (ST_W MSA128W:$ws, addr:$addr)>;
3270 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3271 (ST_D MSA128D:$ws, addr:$addr)>;
3273 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3274 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3275 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3276 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3277 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3278 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3280 class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD,
3281 RegisterOperand ROWS = ROWD,
3282 InstrItinClass itin = NoItinerary> :
3283 MipsPseudo<(outs ROWD:$wd),
3285 [(set ROWD:$wd, (fabs ROWS:$ws))]> {
3286 InstrItinClass Itinerary = itin;
3288 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>,
3289 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws,
3291 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>,
3292 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws,
3295 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3296 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3297 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3298 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3300 // These are endian-independant because the element size doesnt change
3301 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3302 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3303 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3304 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3305 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3306 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3308 // Little endian bitcasts are always no-ops
3309 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3310 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3311 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3312 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3313 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3314 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3316 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3317 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3318 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3319 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3320 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3322 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3323 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3324 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3325 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3326 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3328 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3329 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3330 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3331 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3332 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3334 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3335 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3336 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3337 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3338 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3340 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3341 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3342 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3343 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3344 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3346 // Big endian bitcasts expand to shuffle instructions.
3347 // This is because bitcast is defined to be a store/load sequence and the
3348 // vector store/load instructions are mixed-endian with respect to the vector
3349 // as a whole (little endian with respect to element order, but big endian
3352 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3353 RegisterClass DstRC, MSAInst Insn,
3354 RegisterClass ViaRC> :
3355 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3356 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3360 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3361 RegisterClass DstRC, MSAInst Insn,
3362 RegisterClass ViaRC> :
3363 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3364 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3368 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3369 RegisterClass DstRC> :
3370 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3372 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3373 RegisterClass DstRC> :
3374 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3376 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3377 RegisterClass DstRC> :
3378 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3382 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3387 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3388 RegisterClass DstRC> :
3389 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3391 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3392 RegisterClass DstRC> :
3393 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3395 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3396 RegisterClass DstRC> :
3397 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3399 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3400 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3401 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3402 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3403 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3404 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3406 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3407 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3408 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3409 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3410 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3412 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3413 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3414 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3415 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3416 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3418 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3419 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3420 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3421 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3422 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3424 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3425 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3426 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3427 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3428 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3430 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3431 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3432 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3433 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3434 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3436 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3437 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3438 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3439 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3440 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3442 // Pseudos used to implement BNZ.df, and BZ.df
3444 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3446 InstrItinClass itin = NoItinerary> :
3447 MipsPseudo<(outs GPR32:$dst),
3449 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3450 bit usesCustomInserter = 1;
3453 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3454 MSA128B, NoItinerary>;
3455 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3456 MSA128H, NoItinerary>;
3457 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3458 MSA128W, NoItinerary>;
3459 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3460 MSA128D, NoItinerary>;
3461 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3462 MSA128B, NoItinerary>;
3464 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3465 MSA128B, NoItinerary>;
3466 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3467 MSA128H, NoItinerary>;
3468 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3469 MSA128W, NoItinerary>;
3470 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3471 MSA128D, NoItinerary>;
3472 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3473 MSA128B, NoItinerary>;