1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #include "MipsISelDAGToDAG.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "Mips16ISelDAGToDAG.h"
18 #include "MipsMachineFunction.h"
19 #include "MipsRegisterInfo.h"
20 #include "MipsSEISelDAGToDAG.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/SelectionDAGNodes.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
38 #define DEBUG_TYPE "mips-isel"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
49 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
50 Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget());
51 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
53 processFunctionAfterISel(MF);
58 /// getGlobalBaseReg - Output the instructions required to put the
59 /// GOT address into a register.
60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
61 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
62 return CurDAG->getRegister(GlobalBaseReg,
63 getTargetLowering()->getPointerTy()).getNode();
66 /// ComplexPattern used on MipsInstrInfo
67 /// Used on Mips Load/Store instructions
68 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
69 SDValue &Offset) const {
70 llvm_unreachable("Unimplemented function.");
74 bool MipsDAGToDAGISel::selectAddrRegReg(SDValue Addr, SDValue &Base,
75 SDValue &Offset) const {
76 llvm_unreachable("Unimplemented function.");
80 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
81 SDValue &Offset) const {
82 llvm_unreachable("Unimplemented function.");
86 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
87 SDValue &Offset) const {
88 llvm_unreachable("Unimplemented function.");
92 bool MipsDAGToDAGISel::selectIntAddrMM(SDValue Addr, SDValue &Base,
93 SDValue &Offset) const {
94 llvm_unreachable("Unimplemented function.");
98 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
99 SDValue &Offset) const {
100 llvm_unreachable("Unimplemented function.");
104 bool MipsDAGToDAGISel::selectIntAddrMSA(SDValue Addr, SDValue &Base,
105 SDValue &Offset) const {
106 llvm_unreachable("Unimplemented function.");
110 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base,
111 SDValue &Offset, SDValue &Alias) {
112 llvm_unreachable("Unimplemented function.");
116 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
117 unsigned MinSizeInBits) const {
118 llvm_unreachable("Unimplemented function.");
122 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
123 llvm_unreachable("Unimplemented function.");
127 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
128 llvm_unreachable("Unimplemented function.");
132 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
133 llvm_unreachable("Unimplemented function.");
137 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
138 llvm_unreachable("Unimplemented function.");
142 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
143 llvm_unreachable("Unimplemented function.");
147 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
148 llvm_unreachable("Unimplemented function.");
152 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
153 llvm_unreachable("Unimplemented function.");
157 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
158 llvm_unreachable("Unimplemented function.");
162 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
163 llvm_unreachable("Unimplemented function.");
167 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
168 llvm_unreachable("Unimplemented function.");
172 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
173 llvm_unreachable("Unimplemented function.");
177 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
178 llvm_unreachable("Unimplemented function.");
182 /// Select instructions not customized! Used for
183 /// expanded, promoted and normal instructions
184 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) {
185 unsigned Opcode = Node->getOpcode();
187 // Dump information about the Node being selected
188 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
190 // If we have a custom node, we already have selected!
191 if (Node->isMachineOpcode()) {
192 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
197 // See if subclasses can handle this node.
198 std::pair<bool, SDNode*> Ret = selectNode(Node);
206 // Get target GOT address.
207 case ISD::GLOBAL_OFFSET_TABLE:
208 return getGlobalBaseReg();
213 assert((Subtarget->systemSupportsUnalignedAccess() ||
214 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
215 cast<MemSDNode>(Node)->getAlignment()) &&
216 "Unexpected unaligned loads/stores.");
221 // Select the default instruction
222 SDNode *ResNode = SelectCode(Node);
224 DEBUG(errs() << "=> ");
225 if (ResNode == nullptr || ResNode == Node)
226 DEBUG(Node->dump(CurDAG));
228 DEBUG(ResNode->dump(CurDAG));
229 DEBUG(errs() << "\n");
233 bool MipsDAGToDAGISel::
234 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
235 std::vector<SDValue> &OutOps) {
236 // All memory constraints can at least accept raw pointers.
237 switch(ConstraintID) {
239 llvm_unreachable("Unexpected asm memory constraint");
240 case InlineAsm::Constraint_i:
241 case InlineAsm::Constraint_m:
242 case InlineAsm::Constraint_R:
243 case InlineAsm::Constraint_ZC:
244 OutOps.push_back(Op);