1 //=======- MipsFrameLowering.cpp - Mips Frame Information ------*- C++ -*-====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "MipsFrameLowering.h"
15 #include "MipsInstrInfo.h"
16 #include "MipsMachineFunction.h"
17 #include "llvm/Function.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineModuleInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetOptions.h"
25 #include "llvm/Support/CommandLine.h"
30 //===----------------------------------------------------------------------===//
32 // Stack Frame Processing methods
33 // +----------------------------+
35 // The stack is allocated decrementing the stack pointer on
36 // the first instruction of a function prologue. Once decremented,
37 // all stack references are done thought a positive offset
38 // from the stack/frame pointer, so the stack is considering
39 // to grow up! Otherwise terrible hacks would have to be made
40 // to get this stack ABI compliant :)
42 // The stack frame required by the ABI (after call):
47 // . saved $GP (used in PIC)
48 // . Alloca allocations
50 // . CPU "Callee Saved" Registers
53 // . FPU "Callee Saved" Registers
54 // StackSize -----------
56 // Offset - offset from sp after stack allocation on function prologue
58 // The sp is the stack pointer subtracted/added from the stack size
59 // at the Prologue/Epilogue
61 // References to the previous stack (to obtain arguments) are done
62 // with offsets that exceeds the stack size: (stacksize+(4*(num_arg-1))
65 // - reference to the actual stack frame
66 // for any local area var there is smt like : FI >= 0, StackOffset: 4
69 // - reference to previous stack frame
70 // suppose there's a load to the 5th arguments : FI < 0, StackOffset: 16.
71 // The emitted instruction will be something like:
72 // lw REGX, 16+StackSize(SP)
74 // Since the total stack size is unknown on LowerFormalArguments, all
75 // stack references (ObjectOffset) created to reference the function
76 // arguments, are negative numbers. This way, on eliminateFrameIndex it's
77 // possible to detect those references and the offsets are adjusted to
78 // their real location.
80 //===----------------------------------------------------------------------===//
82 // hasFP - Return true if the specified function should have a dedicated frame
83 // pointer register. This is true if the function has variable sized allocas or
84 // if frame pointer elimination is disabled.
85 bool MipsFrameLowering::hasFP(const MachineFunction &MF) const {
86 const MachineFrameInfo *MFI = MF.getFrameInfo();
87 return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
90 bool MipsFrameLowering::targetHandlesStackFrameRounding() const {
94 static unsigned AlignOffset(unsigned Offset, unsigned Align) {
95 return (Offset + Align - 1) / Align * Align;
98 // expand pair of register and immediate if the immediate doesn't fit in the
99 // 16-bit offset field.
101 // if OrigImm = 0x10000, OrigReg = $sp:
102 // generate the following sequence of instrs:
103 // lui $at, hi(0x10000)
104 // addu $at, $sp, $at
106 // (NewReg, NewImm) = ($at, lo(Ox10000))
108 static bool expandRegLargeImmPair(unsigned OrigReg, int OrigImm,
109 unsigned& NewReg, int& NewImm,
110 MachineBasicBlock& MBB,
111 MachineBasicBlock::iterator I) {
112 // OrigImm fits in the 16-bit field
113 if (OrigImm < 0x8000 && OrigImm >= -0x8000) {
119 MachineFunction* MF = MBB.getParent();
120 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
121 DebugLoc DL = I->getDebugLoc();
122 int ImmLo = OrigImm & 0xffff;
123 int ImmHi = (((unsigned)OrigImm & 0xffff0000) >> 16) +
124 ((OrigImm & 0x8000) != 0);
126 // FIXME: change this when mips goes MC".
127 BuildMI(MBB, I, DL, TII->get(Mips::NOAT));
128 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::AT).addImm(ImmHi);
129 BuildMI(MBB, I, DL, TII->get(Mips::ADDu), Mips::AT).addReg(OrigReg)
137 void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
138 MachineBasicBlock &MBB = MF.front();
139 MachineFrameInfo *MFI = MF.getFrameInfo();
140 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
141 const MipsRegisterInfo *RegInfo =
142 static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
143 const MipsInstrInfo &TII =
144 *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
145 MachineBasicBlock::iterator MBBI = MBB.begin();
146 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
147 bool isPIC = (MF.getTarget().getRelocationModel() == Reloc::PIC_);
152 // First, compute final stack size.
153 unsigned RegSize = STI.isGP32bit() ? 4 : 8;
154 unsigned StackAlign = getStackAlignment();
155 unsigned LocalVarAreaOffset = MipsFI->needGPSaveRestore() ?
156 (MFI->getObjectOffset(MipsFI->getGPFI()) + RegSize) :
157 MFI->getMaxCallFrameSize();
158 unsigned StackSize = AlignOffset(LocalVarAreaOffset, StackAlign) +
159 AlignOffset(MFI->getStackSize(), StackAlign);
162 MFI->setStackSize(StackSize);
164 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOREORDER));
166 // TODO: check need from GP here.
167 if (isPIC && STI.isABI_O32())
168 BuildMI(MBB, MBBI, dl, TII.get(Mips::CPLOAD))
169 .addReg(RegInfo->getPICCallReg());
170 BuildMI(MBB, MBBI, dl, TII.get(Mips::NOMACRO));
172 // No need to allocate space on the stack.
173 if (StackSize == 0 && !MFI->adjustsStack()) return;
175 // Adjust stack : addi sp, sp, (-imm)
176 ATUsed = expandRegLargeImmPair(Mips::SP, -StackSize, NewReg, NewImm, MBB,
178 BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP)
179 .addReg(NewReg).addImm(NewImm);
181 // FIXME: change this when mips goes MC".
183 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
185 // if framepointer enabled, set it to point to the stack pointer.
187 // Find the instruction past the last instruction that saves a callee-saved
188 // register to the stack.
189 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
191 for (unsigned i = 0; i < CSI.size(); ++i)
194 // Insert instruction "move $fp, $sp" at this location.
195 BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDu), Mips::FP)
196 .addReg(Mips::SP).addReg(Mips::ZERO);
199 // Restore GP from the saved stack location
200 if (MipsFI->needGPSaveRestore())
201 BuildMI(MBB, MBBI, dl, TII.get(Mips::CPRESTORE))
202 .addImm(MFI->getObjectOffset(MipsFI->getGPFI()));
205 void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
206 MachineBasicBlock &MBB) const {
207 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
208 MachineFrameInfo *MFI = MF.getFrameInfo();
209 const MipsInstrInfo &TII =
210 *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
211 DebugLoc dl = MBBI->getDebugLoc();
213 // Get the number of bytes from FrameInfo
214 unsigned StackSize = MFI->getStackSize();
220 // if framepointer enabled, restore the stack pointer.
222 // Find the first instruction that restores a callee-saved register.
223 MachineBasicBlock::iterator I = MBBI;
225 for (unsigned i = 0; i < MFI->getCalleeSavedInfo().size(); ++i)
228 // Insert instruction "move $sp, $fp" at this location.
229 BuildMI(MBB, I, dl, TII.get(Mips::ADDu), Mips::SP)
230 .addReg(Mips::FP).addReg(Mips::ZERO);
233 // adjust stack : insert addi sp, sp, (imm)
235 ATUsed = expandRegLargeImmPair(Mips::SP, StackSize, NewReg, NewImm, MBB,
237 BuildMI(MBB, MBBI, dl, TII.get(Mips::ADDiu), Mips::SP)
238 .addReg(NewReg).addImm(NewImm);
240 // FIXME: change this when mips goes MC".
242 BuildMI(MBB, MBBI, dl, TII.get(Mips::ATMACRO));
246 void MipsFrameLowering::
247 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
248 RegScavenger *RS) const {
249 MachineRegisterInfo& MRI = MF.getRegInfo();
250 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
252 // FIXME: remove this code if register allocator can correctly mark
253 // $fp and $ra used or unused.
255 // Mark $fp and $ra as used or unused.
257 MRI.setPhysRegUsed(Mips::FP);
259 // The register allocator might determine $ra is used after seeing
260 // instruction "jr $ra", but we do not want PrologEpilogInserter to insert
261 // instructions to save/restore $ra unless there is a function call.
262 // To correct this, $ra is explicitly marked unused if there is no
264 if (MipsFI->hasCall())
265 MRI.setPhysRegUsed(Mips::RA);
267 MRI.setPhysRegUnused(Mips::RA);