1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32 : MCTargetStreamer(S), canHaveModuleDirective(true) {
33 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
35 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
37 void MipsTargetStreamer::emitDirectiveSetMips16() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
39 void MipsTargetStreamer::emitDirectiveSetReorder() {}
40 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
41 void MipsTargetStreamer::emitDirectiveSetMacro() {}
42 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
43 void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
44 void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
45 void MipsTargetStreamer::emitDirectiveSetAt() {}
46 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
47 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
48 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
49 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
50 void MipsTargetStreamer::emitDirectiveNaN2008() {}
51 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
52 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
53 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
54 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
55 unsigned ReturnReg) {}
56 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
57 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
59 void MipsTargetStreamer::emitDirectiveSetMips1() {}
60 void MipsTargetStreamer::emitDirectiveSetMips2() {}
61 void MipsTargetStreamer::emitDirectiveSetMips3() {}
62 void MipsTargetStreamer::emitDirectiveSetMips4() {}
63 void MipsTargetStreamer::emitDirectiveSetMips5() {}
64 void MipsTargetStreamer::emitDirectiveSetMips32() {}
65 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
66 void MipsTargetStreamer::emitDirectiveSetMips32R6() {}
67 void MipsTargetStreamer::emitDirectiveSetMips64() {}
68 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
69 void MipsTargetStreamer::emitDirectiveSetMips64R6() {}
70 void MipsTargetStreamer::emitDirectiveSetDsp() {}
71 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
72 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
73 const MCSymbol &Sym, bool IsReg) {
75 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
77 if (!Enabled && !IsO32ABI)
78 report_fatal_error("+nooddspreg is only valid for O32");
81 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
82 formatted_raw_ostream &OS)
83 : MipsTargetStreamer(S), OS(OS) {}
85 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
86 OS << "\t.set\tmicromips\n";
87 setCanHaveModuleDir(false);
90 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
91 OS << "\t.set\tnomicromips\n";
92 setCanHaveModuleDir(false);
95 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
96 OS << "\t.set\tmips16\n";
97 setCanHaveModuleDir(false);
100 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
101 OS << "\t.set\tnomips16\n";
102 setCanHaveModuleDir(false);
105 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
106 OS << "\t.set\treorder\n";
107 setCanHaveModuleDir(false);
110 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
111 OS << "\t.set\tnoreorder\n";
112 setCanHaveModuleDir(false);
115 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
116 OS << "\t.set\tmacro\n";
117 setCanHaveModuleDir(false);
120 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
121 OS << "\t.set\tnomacro\n";
122 setCanHaveModuleDir(false);
125 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
126 OS << "\t.set\tmsa\n";
127 MipsTargetStreamer::emitDirectiveSetMsa();
130 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
131 OS << "\t.set\tnomsa\n";
132 MipsTargetStreamer::emitDirectiveSetNoMsa();
135 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
136 OS << "\t.set\tat\n";
137 setCanHaveModuleDir(false);
140 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
141 OS << "\t.set\tnoat\n";
142 setCanHaveModuleDir(false);
145 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
146 OS << "\t.end\t" << Name << '\n';
149 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
150 OS << "\t.ent\t" << Symbol.getName() << '\n';
153 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
155 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
157 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
158 OS << "\t.nan\tlegacy\n";
161 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
162 OS << "\t.option\tpic0\n";
165 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
166 OS << "\t.option\tpic2\n";
169 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
170 unsigned ReturnReg) {
172 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
174 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
177 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
178 OS << "\t.set\tmips1\n";
179 setCanHaveModuleDir(false);
182 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
183 OS << "\t.set\tmips2\n";
184 setCanHaveModuleDir(false);
187 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
188 OS << "\t.set\tmips3\n";
189 setCanHaveModuleDir(false);
192 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
193 OS << "\t.set\tmips4\n";
194 setCanHaveModuleDir(false);
197 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
198 OS << "\t.set\tmips5\n";
199 setCanHaveModuleDir(false);
202 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
203 OS << "\t.set\tmips32\n";
204 setCanHaveModuleDir(false);
207 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
208 OS << "\t.set\tmips32r2\n";
209 setCanHaveModuleDir(false);
212 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
213 OS << "\t.set\tmips32r6\n";
214 setCanHaveModuleDir(false);
217 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
218 OS << "\t.set\tmips64\n";
219 setCanHaveModuleDir(false);
222 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
223 OS << "\t.set\tmips64r2\n";
224 setCanHaveModuleDir(false);
227 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
228 OS << "\t.set\tmips64r6\n";
229 setCanHaveModuleDir(false);
232 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
233 OS << "\t.set\tdsp\n";
234 setCanHaveModuleDir(false);
236 // Print a 32 bit hex number with all numbers.
237 static void printHex32(unsigned Value, raw_ostream &OS) {
239 for (int i = 7; i >= 0; i--)
240 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
243 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
244 int CPUTopSavedRegOff) {
246 printHex32(CPUBitmask, OS);
247 OS << ',' << CPUTopSavedRegOff << '\n';
250 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
251 int FPUTopSavedRegOff) {
253 printHex32(FPUBitmask, OS);
254 OS << "," << FPUTopSavedRegOff << '\n';
257 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
259 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
260 setCanHaveModuleDir(false);
263 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
267 OS << "\t.cpsetup\t$"
268 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
272 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
278 OS << Sym.getName() << "\n";
279 setCanHaveModuleDir(false);
282 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
283 MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
284 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
286 StringRef ModuleValue;
287 OS << "\t.module\tfp=";
288 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
291 void MipsTargetAsmStreamer::emitDirectiveSetFp(
292 MipsABIFlagsSection::FpABIKind Value) {
293 StringRef ModuleValue;
295 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
298 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
299 // No action required for text output.
302 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
304 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
306 OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
309 // This part is for ELF object output.
310 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
311 const MCSubtargetInfo &STI)
312 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
313 MCAssembler &MCA = getStreamer().getAssembler();
314 uint64_t Features = STI.getFeatureBits();
315 Triple T(STI.getTargetTriple());
316 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
320 // Update e_header flags
324 if (Features & Mips::FeatureMips64r6)
325 EFlags |= ELF::EF_MIPS_ARCH_64R6;
326 else if (Features & Mips::FeatureMips64r2)
327 EFlags |= ELF::EF_MIPS_ARCH_64R2;
328 else if (Features & Mips::FeatureMips64)
329 EFlags |= ELF::EF_MIPS_ARCH_64;
330 else if (Features & Mips::FeatureMips5)
331 EFlags |= ELF::EF_MIPS_ARCH_5;
332 else if (Features & Mips::FeatureMips4)
333 EFlags |= ELF::EF_MIPS_ARCH_4;
334 else if (Features & Mips::FeatureMips3)
335 EFlags |= ELF::EF_MIPS_ARCH_3;
336 else if (Features & Mips::FeatureMips32r6)
337 EFlags |= ELF::EF_MIPS_ARCH_32R6;
338 else if (Features & Mips::FeatureMips32r2)
339 EFlags |= ELF::EF_MIPS_ARCH_32R2;
340 else if (Features & Mips::FeatureMips32)
341 EFlags |= ELF::EF_MIPS_ARCH_32;
342 else if (Features & Mips::FeatureMips2)
343 EFlags |= ELF::EF_MIPS_ARCH_2;
345 EFlags |= ELF::EF_MIPS_ARCH_1;
348 // N64 does not require any ABI bits.
349 if (Features & Mips::FeatureO32)
350 EFlags |= ELF::EF_MIPS_ABI_O32;
351 else if (Features & Mips::FeatureN32)
352 EFlags |= ELF::EF_MIPS_ABI2;
354 if (Features & Mips::FeatureGP64Bit) {
355 if (Features & Mips::FeatureO32)
356 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
357 } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
358 EFlags |= ELF::EF_MIPS_32BITMODE;
361 if (Features & Mips::FeatureNaN2008)
362 EFlags |= ELF::EF_MIPS_NAN2008;
364 // -mabicalls and -mplt are not implemented but we should act as if they were
366 EFlags |= ELF::EF_MIPS_CPIC;
367 if (Features & Mips::FeatureN64)
368 EFlags |= ELF::EF_MIPS_PIC;
370 MCA.setELFHeaderEFlags(EFlags);
373 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
374 if (!isMicroMipsEnabled())
376 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
377 uint8_t Type = MCELF::GetType(Data);
378 if (Type != ELF::STT_FUNC)
381 // The "other" values are stored in the last 6 bits of the second byte
382 // The traditional defines for STO values assume the full byte and thus
383 // the shift to pack it.
384 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
387 void MipsTargetELFStreamer::finish() {
388 MCAssembler &MCA = getStreamer().getAssembler();
389 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
391 // .bss, .text and .data are always at least 16-byte aligned.
392 MCSectionData &TextSectionData =
393 MCA.getOrCreateSectionData(*OFI.getTextSection());
394 MCSectionData &DataSectionData =
395 MCA.getOrCreateSectionData(*OFI.getDataSection());
396 MCSectionData &BSSSectionData =
397 MCA.getOrCreateSectionData(*OFI.getBSSSection());
399 TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
400 DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
401 BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
403 // Emit all the option records.
404 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
406 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
407 MEF.EmitMipsOptionRecords();
412 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
413 const MCExpr *Value) {
414 // If on rhs is micromips symbol then mark Symbol as microMips.
415 if (Value->getKind() != MCExpr::SymbolRef)
417 const MCSymbol &RhsSym =
418 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
419 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
420 uint8_t Type = MCELF::GetType(Data);
421 if ((Type != ELF::STT_FUNC) ||
422 !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
425 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
426 // The "other" values are stored in the last 6 bits of the second byte.
427 // The traditional defines for STO values assume the full byte and thus
428 // the shift to pack it.
429 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
432 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
433 return static_cast<MCELFStreamer &>(Streamer);
436 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
437 MicroMipsEnabled = true;
439 MCAssembler &MCA = getStreamer().getAssembler();
440 unsigned Flags = MCA.getELFHeaderEFlags();
441 Flags |= ELF::EF_MIPS_MICROMIPS;
442 MCA.setELFHeaderEFlags(Flags);
445 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
446 MicroMipsEnabled = false;
447 setCanHaveModuleDir(false);
450 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
451 MCAssembler &MCA = getStreamer().getAssembler();
452 unsigned Flags = MCA.getELFHeaderEFlags();
453 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
454 MCA.setELFHeaderEFlags(Flags);
455 setCanHaveModuleDir(false);
458 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
460 setCanHaveModuleDir(false);
463 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
465 setCanHaveModuleDir(false);
468 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
469 MCAssembler &MCA = getStreamer().getAssembler();
470 unsigned Flags = MCA.getELFHeaderEFlags();
471 Flags |= ELF::EF_MIPS_NOREORDER;
472 MCA.setELFHeaderEFlags(Flags);
473 setCanHaveModuleDir(false);
476 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
478 setCanHaveModuleDir(false);
481 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
483 setCanHaveModuleDir(false);
486 void MipsTargetELFStreamer::emitDirectiveSetAt() {
488 setCanHaveModuleDir(false);
491 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
493 setCanHaveModuleDir(false);
496 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
497 MCAssembler &MCA = getStreamer().getAssembler();
498 MCContext &Context = MCA.getContext();
499 MCStreamer &OS = getStreamer();
501 const MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
502 ELF::SHF_ALLOC | ELF::SHT_REL,
503 SectionKind::getMetadata());
505 const MCSymbolRefExpr *ExprRef =
506 MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
508 MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
509 SecData.setAlignment(4);
513 OS.SwitchSection(Sec);
515 OS.EmitValueImpl(ExprRef, 4);
517 OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
518 OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
520 OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
521 OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
523 OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
524 OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
525 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
527 // The .end directive marks the end of a procedure. Invalidate
528 // the information gathered up until this point.
529 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
534 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
535 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
538 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
539 MCAssembler &MCA = getStreamer().getAssembler();
540 unsigned Flags = MCA.getELFHeaderEFlags();
541 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
542 MCA.setELFHeaderEFlags(Flags);
545 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
546 MCAssembler &MCA = getStreamer().getAssembler();
547 unsigned Flags = MCA.getELFHeaderEFlags();
548 Flags |= ELF::EF_MIPS_NAN2008;
549 MCA.setELFHeaderEFlags(Flags);
552 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
553 MCAssembler &MCA = getStreamer().getAssembler();
554 unsigned Flags = MCA.getELFHeaderEFlags();
555 Flags &= ~ELF::EF_MIPS_NAN2008;
556 MCA.setELFHeaderEFlags(Flags);
559 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
560 MCAssembler &MCA = getStreamer().getAssembler();
561 unsigned Flags = MCA.getELFHeaderEFlags();
562 // This option overrides other PIC options like -KPIC.
564 Flags &= ~ELF::EF_MIPS_PIC;
565 MCA.setELFHeaderEFlags(Flags);
568 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
569 MCAssembler &MCA = getStreamer().getAssembler();
570 unsigned Flags = MCA.getELFHeaderEFlags();
572 // NOTE: We are following the GAS behaviour here which means the directive
573 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
574 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
575 // EF_MIPS_CPIC to be mutually exclusive.
576 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
577 MCA.setELFHeaderEFlags(Flags);
580 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
581 unsigned ReturnReg_) {
582 MCContext &Context = getStreamer().getAssembler().getContext();
583 const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
586 FrameReg = RegInfo->getEncodingValue(StackReg);
587 FrameOffset = StackSize;
588 ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
591 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
592 int CPUTopSavedRegOff) {
594 GPRBitMask = CPUBitmask;
595 GPROffset = CPUTopSavedRegOff;
598 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
599 int FPUTopSavedRegOff) {
601 FPRBitMask = FPUBitmask;
602 FPROffset = FPUTopSavedRegOff;
605 void MipsTargetELFStreamer::emitDirectiveSetMips1() {
606 setCanHaveModuleDir(false);
609 void MipsTargetELFStreamer::emitDirectiveSetMips2() {
610 setCanHaveModuleDir(false);
613 void MipsTargetELFStreamer::emitDirectiveSetMips3() {
614 setCanHaveModuleDir(false);
617 void MipsTargetELFStreamer::emitDirectiveSetMips4() {
618 setCanHaveModuleDir(false);
621 void MipsTargetELFStreamer::emitDirectiveSetMips5() {
622 setCanHaveModuleDir(false);
625 void MipsTargetELFStreamer::emitDirectiveSetMips32() {
626 setCanHaveModuleDir(false);
629 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
630 setCanHaveModuleDir(false);
633 void MipsTargetELFStreamer::emitDirectiveSetMips32R6() {
634 setCanHaveModuleDir(false);
637 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
638 setCanHaveModuleDir(false);
641 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
642 setCanHaveModuleDir(false);
645 void MipsTargetELFStreamer::emitDirectiveSetMips64R6() {
646 setCanHaveModuleDir(false);
649 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
650 setCanHaveModuleDir(false);
653 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
655 // This directive expands to:
656 // lui $gp, %hi(_gp_disp)
657 // addui $gp, $gp, %lo(_gp_disp)
658 // addu $gp, $gp, $reg
659 // when support for position independent code is enabled.
660 if (!Pic || (isN32() || isN64()))
663 // There's a GNU extension controlled by -mno-shared that allows
664 // locally-binding symbols to be accessed using absolute addresses.
665 // This is currently not supported. When supported -mno-shared makes
666 // .cpload expand to:
667 // lui $gp, %hi(__gnu_local_gp)
668 // addiu $gp, $gp, %lo(__gnu_local_gp)
670 StringRef SymName("_gp_disp");
671 MCAssembler &MCA = getStreamer().getAssembler();
672 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
673 MCA.getOrCreateSymbolData(*GP_Disp);
676 TmpInst.setOpcode(Mips::LUi);
677 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
678 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
679 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
680 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
681 getStreamer().EmitInstruction(TmpInst, STI);
685 TmpInst.setOpcode(Mips::ADDiu);
686 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
687 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
688 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
689 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
690 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
691 getStreamer().EmitInstruction(TmpInst, STI);
695 TmpInst.setOpcode(Mips::ADDu);
696 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
697 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
698 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
699 getStreamer().EmitInstruction(TmpInst, STI);
701 setCanHaveModuleDir(false);
704 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
708 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
709 if (!Pic || !(isN32() || isN64()))
712 MCAssembler &MCA = getStreamer().getAssembler();
715 // Either store the old $gp in a register or on the stack
717 // move $save, $gpreg
718 Inst.setOpcode(Mips::DADDu);
719 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
720 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
721 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
723 // sd $gpreg, offset($sp)
724 Inst.setOpcode(Mips::SD);
725 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
726 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
727 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
729 getStreamer().EmitInstruction(Inst, STI);
732 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
733 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
734 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
735 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
736 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
737 Inst.setOpcode(Mips::LUi);
738 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
739 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
740 getStreamer().EmitInstruction(Inst, STI);
743 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
744 Inst.setOpcode(Mips::ADDiu);
745 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
746 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
747 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
748 getStreamer().EmitInstruction(Inst, STI);
751 // daddu $gp, $gp, $funcreg
752 Inst.setOpcode(Mips::DADDu);
753 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
754 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
755 Inst.addOperand(MCOperand::CreateReg(RegNo));
756 getStreamer().EmitInstruction(Inst, STI);
758 setCanHaveModuleDir(false);
761 void MipsTargetELFStreamer::emitMipsAbiFlags() {
762 MCAssembler &MCA = getStreamer().getAssembler();
763 MCContext &Context = MCA.getContext();
764 MCStreamer &OS = getStreamer();
765 const MCSectionELF *Sec =
766 Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
767 ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
768 MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
769 ABIShndxSD.setAlignment(8);
770 OS.SwitchSection(Sec);
772 OS << ABIFlagsSection;
775 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
777 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
779 ABIFlagsSection.OddSPReg = Enabled;