1 //===-- MipsAsmPrinter.cpp - Mips LLVM assembly writer --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "mips-asm-printer"
18 #include "MipsSubtarget.h"
19 #include "MipsInstrInfo.h"
20 #include "MipsTargetMachine.h"
21 #include "MipsMachineFunction.h"
22 #include "llvm/Constants.h"
23 #include "llvm/DerivedTypes.h"
24 #include "llvm/Module.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/DwarfWriter.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineInstr.h"
31 #include "llvm/MC/MCStreamer.h"
32 #include "llvm/MC/MCAsmInfo.h"
33 #include "llvm/MC/MCSymbol.h"
34 #include "llvm/Target/TargetData.h"
35 #include "llvm/Target/TargetLoweringObjectFile.h"
36 #include "llvm/Target/TargetMachine.h"
37 #include "llvm/Target/TargetOptions.h"
38 #include "llvm/Target/TargetRegistry.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/ADT/StringExtras.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/CommandLine.h"
43 #include "llvm/Support/FormattedStream.h"
44 #include "llvm/Support/MathExtras.h"
49 class MipsAsmPrinter : public AsmPrinter {
50 const MipsSubtarget *Subtarget;
52 explicit MipsAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
53 const MCAsmInfo *T, bool V)
54 : AsmPrinter(O, TM, T, V) {
55 Subtarget = &TM.getSubtarget<MipsSubtarget>();
58 virtual const char *getPassName() const {
59 return "Mips Assembly Printer";
62 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
63 unsigned AsmVariant, const char *ExtraCode);
64 void printOperand(const MachineInstr *MI, int opNum);
65 void printUnsignedImm(const MachineInstr *MI, int opNum);
66 void printMemOperand(const MachineInstr *MI, int opNum,
67 const char *Modifier = 0);
68 void printFCCOperand(const MachineInstr *MI, int opNum,
69 const char *Modifier = 0);
70 void printSavedRegsBitmask();
71 void printHex32(unsigned int Value);
73 const char *emitCurrentABIString();
74 void emitFrameDirective();
76 void printInstruction(const MachineInstr *MI); // autogenerated.
77 void EmitInstruction(const MachineInstr *MI) { printInstruction(MI); }
78 virtual void EmitFunctionBodyStart();
79 virtual void EmitFunctionBodyEnd();
80 static const char *getRegisterName(unsigned RegNo);
82 virtual void EmitFunctionEntryLabel();
83 void EmitStartOfAsmFile(Module &M);
85 } // end of anonymous namespace
87 #include "MipsGenAsmWriter.inc"
89 //===----------------------------------------------------------------------===//
91 // Mips Asm Directives
93 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
94 // Describe the stack frame.
96 // -- Mask directives "(f)mask bitmask, offset"
97 // Tells the assembler which registers are saved and where.
98 // bitmask - contain a little endian bitset indicating which registers are
99 // saved on function prologue (e.g. with a 0x80000000 mask, the
100 // assembler knows the register 31 (RA) is saved at prologue.
101 // offset - the position before stack pointer subtraction indicating where
102 // the first saved register on prologue is located. (e.g. with a
104 // Consider the following function prologue:
107 // .mask 0xc0000000,-8
108 // addiu $sp, $sp, -48
112 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
113 // 30 (FP) are saved at prologue. As the save order on prologue is from
114 // left to right, RA is saved first. A -8 offset means that after the
115 // stack pointer subtration, the first register in the mask (RA) will be
116 // saved at address 48-8=40.
118 //===----------------------------------------------------------------------===//
120 //===----------------------------------------------------------------------===//
122 //===----------------------------------------------------------------------===//
124 // Create a bitmask with all callee saved registers for CPU or Floating Point
125 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
126 void MipsAsmPrinter::printSavedRegsBitmask() {
127 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
128 const MipsFunctionInfo *MipsFI = MF->getInfo<MipsFunctionInfo>();
130 // CPU and FPU Saved Registers Bitmasks
131 unsigned int CPUBitmask = 0;
132 unsigned int FPUBitmask = 0;
134 // Set the CPU and FPU Bitmasks
135 const MachineFrameInfo *MFI = MF->getFrameInfo();
136 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
137 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
138 unsigned RegNum = MipsRegisterInfo::getRegisterNumbering(CSI[i].getReg());
139 if (CSI[i].getRegClass() == Mips::CPURegsRegisterClass)
140 CPUBitmask |= (1 << RegNum);
142 FPUBitmask |= (1 << RegNum);
145 // Return Address and Frame registers must also be set in CPUBitmask.
147 CPUBitmask |= (1 << MipsRegisterInfo::
148 getRegisterNumbering(RI.getFrameRegister(*MF)));
151 CPUBitmask |= (1 << MipsRegisterInfo::
152 getRegisterNumbering(RI.getRARegister()));
155 O << "\t.mask \t"; printHex32(CPUBitmask); O << ','
156 << MipsFI->getCPUTopSavedRegOff() << '\n';
159 O << "\t.fmask\t"; printHex32(FPUBitmask); O << ","
160 << MipsFI->getFPUTopSavedRegOff() << '\n';
163 // Print a 32 bit hex number with all numbers.
164 void MipsAsmPrinter::
165 printHex32(unsigned int Value)
168 for (int i = 7; i >= 0; i--)
169 O << utohexstr( (Value & (0xF << (i*4))) >> (i*4) );
172 //===----------------------------------------------------------------------===//
173 // Frame and Set directives
174 //===----------------------------------------------------------------------===//
177 void MipsAsmPrinter::emitFrameDirective() {
178 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
180 unsigned stackReg = RI.getFrameRegister(*MF);
181 unsigned returnReg = RI.getRARegister();
182 unsigned stackSize = MF->getFrameInfo()->getStackSize();
185 O << "\t.frame\t" << '$' << LowercaseString(getRegisterName(stackReg))
186 << ',' << stackSize << ','
187 << '$' << LowercaseString(getRegisterName(returnReg))
191 /// Emit Set directives.
192 const char *MipsAsmPrinter::emitCurrentABIString() {
193 switch(Subtarget->getTargetABI()) {
194 case MipsSubtarget::O32: return "abi32";
195 case MipsSubtarget::O64: return "abiO64";
196 case MipsSubtarget::N32: return "abiN32";
197 case MipsSubtarget::N64: return "abi64";
198 case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
202 llvm_unreachable("Unknown Mips ABI");
206 void MipsAsmPrinter::EmitFunctionEntryLabel() {
207 O << "\t.ent\t" << *CurrentFnSym << '\n';
208 OutStreamer.EmitLabel(CurrentFnSym);
211 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
212 /// the first basic block in the function.
213 void MipsAsmPrinter::EmitFunctionBodyStart() {
214 emitFrameDirective();
215 printSavedRegsBitmask();
218 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
219 /// the last basic block in the function.
220 void MipsAsmPrinter::EmitFunctionBodyEnd() {
221 // There are instruction for this macros, but they must
222 // always be at the function end, and we can't emit and
223 // break with BB logic.
224 O << "\t.set\tmacro\n";
225 O << "\t.set\treorder\n";
227 O << "\t.end\t" << *CurrentFnSym << '\n';
231 // Print out an operand for an inline asm expression.
232 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
233 unsigned AsmVariant,const char *ExtraCode){
234 // Does this asm operand have a single letter operand modifier?
235 if (ExtraCode && ExtraCode[0])
236 return true; // Unknown modifier.
238 printOperand(MI, OpNo);
242 void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
243 const MachineOperand &MO = MI->getOperand(opNum);
246 if (MO.getTargetFlags())
249 switch(MO.getTargetFlags()) {
250 case MipsII::MO_GPREL: O << "%gp_rel("; break;
251 case MipsII::MO_GOT_CALL: O << "%call16("; break;
253 if (MI->getOpcode() == Mips::LW)
258 case MipsII::MO_ABS_HILO:
259 if (MI->getOpcode() == Mips::LUi)
266 switch (MO.getType()) {
267 case MachineOperand::MO_Register:
268 O << '$' << LowercaseString(getRegisterName(MO.getReg()));
271 case MachineOperand::MO_Immediate:
272 O << (short int)MO.getImm();
275 case MachineOperand::MO_MachineBasicBlock:
276 O << *MO.getMBB()->getSymbol(OutContext);
279 case MachineOperand::MO_GlobalAddress:
280 O << *GetGlobalValueSymbol(MO.getGlobal());
283 case MachineOperand::MO_ExternalSymbol:
284 O << *GetExternalSymbolSymbol(MO.getSymbolName());
287 case MachineOperand::MO_JumpTableIndex:
288 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
289 << '_' << MO.getIndex();
292 case MachineOperand::MO_ConstantPoolIndex:
293 O << MAI->getPrivateGlobalPrefix() << "CPI"
294 << getFunctionNumber() << "_" << MO.getIndex();
296 O << "+" << MO.getOffset();
300 llvm_unreachable("<unknown operand type>");
303 if (closeP) O << ")";
306 void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum) {
307 const MachineOperand &MO = MI->getOperand(opNum);
308 if (MO.getType() == MachineOperand::MO_Immediate)
309 O << (unsigned short int)MO.getImm();
311 printOperand(MI, opNum);
314 void MipsAsmPrinter::
315 printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
316 // when using stack locations for not load/store instructions
317 // print the same way as all normal 3 operand instructions.
318 if (Modifier && !strcmp(Modifier, "stackloc")) {
319 printOperand(MI, opNum+1);
321 printOperand(MI, opNum);
325 // Load/Store memory operands -- imm($reg)
326 // If PIC target the target is loaded as the
327 // pattern lw $25,%call16($28)
328 printOperand(MI, opNum);
330 printOperand(MI, opNum+1);
334 void MipsAsmPrinter::
335 printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
336 const MachineOperand& MO = MI->getOperand(opNum);
337 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
340 void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
341 // FIXME: Use SwitchSection.
343 // Tell the assembler which ABI we are using
344 O << "\t.section .mdebug." << emitCurrentABIString() << '\n';
346 // TODO: handle O64 ABI
347 if (Subtarget->isABI_EABI())
348 O << "\t.section .gcc_compiled_long" <<
349 (Subtarget->isGP32bit() ? "32" : "64") << '\n';
351 // return to previous section
352 O << "\t.previous" << '\n';
355 // Force static initialization.
356 extern "C" void LLVMInitializeMipsAsmPrinter() {
357 RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
358 RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);