1 //===-- MBlazeAsmParser.cpp - Parse MBlaze asm to MCInst instructions -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MBlazeBaseInfo.h"
11 #include "llvm/ADT/SmallVector.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/MC/MCInst.h"
15 #include "llvm/MC/MCParser/MCAsmLexer.h"
16 #include "llvm/MC/MCParser/MCAsmParser.h"
17 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
18 #include "llvm/MC/MCStreamer.h"
19 #include "llvm/MC/MCTargetAsmParser.h"
20 #include "llvm/Support/SourceMgr.h"
21 #include "llvm/Support/TargetRegistry.h"
22 #include "llvm/Support/raw_ostream.h"
28 class MBlazeAsmParser : public MCTargetAsmParser {
31 MCAsmParser &getParser() const { return Parser; }
32 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
34 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
35 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
37 MBlazeOperand *ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
38 MBlazeOperand *ParseRegister();
39 MBlazeOperand *ParseRegister(SMLoc &StartLoc, SMLoc &EndLoc);
40 MBlazeOperand *ParseImmediate();
41 MBlazeOperand *ParseFsl();
42 MBlazeOperand* ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
44 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
46 bool ParseDirectiveWord(unsigned Size, SMLoc L);
48 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
49 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
50 MCStreamer &Out, unsigned &ErrorInfo,
51 bool MatchingInlineAsm);
53 /// @name Auto-generated Match Functions
56 #define GET_ASSEMBLER_HEADER
57 #include "MBlazeGenAsmMatcher.inc"
62 MBlazeAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)
63 : MCTargetAsmParser(), Parser(_Parser) {}
65 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
67 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
69 virtual bool ParseDirective(AsmToken DirectiveID);
72 /// MBlazeOperand - Instances of this class represent a parsed MBlaze machine
74 struct MBlazeOperand : public MCParsedAsmOperand {
83 SMLoc StartLoc, EndLoc;
110 MBlazeOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
112 MBlazeOperand(const MBlazeOperand &o) : MCParsedAsmOperand() {
114 StartLoc = o.StartLoc;
135 /// getStartLoc - Get the location of the first token of this operand.
136 SMLoc getStartLoc() const { return StartLoc; }
138 /// getEndLoc - Get the location of the last token of this operand.
139 SMLoc getEndLoc() const { return EndLoc; }
141 unsigned getReg() const {
142 assert(Kind == Register && "Invalid access!");
146 const MCExpr *getImm() const {
147 assert(Kind == Immediate && "Invalid access!");
151 const MCExpr *getFslImm() const {
152 assert(Kind == Fsl && "Invalid access!");
156 unsigned getMemBase() const {
157 assert(Kind == Memory && "Invalid access!");
161 const MCExpr* getMemOff() const {
162 assert(Kind == Memory && "Invalid access!");
166 unsigned getMemOffReg() const {
167 assert(Kind == Memory && "Invalid access!");
171 bool isToken() const { return Kind == Token; }
172 bool isImm() const { return Kind == Immediate; }
173 bool isMem() const { return Kind == Memory; }
174 bool isFsl() const { return Kind == Fsl; }
175 bool isReg() const { return Kind == Register; }
177 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
178 // Add as immediates when possible. Null MCExpr = 0.
180 Inst.addOperand(MCOperand::CreateImm(0));
181 else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
182 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
184 Inst.addOperand(MCOperand::CreateExpr(Expr));
187 void addRegOperands(MCInst &Inst, unsigned N) const {
188 assert(N == 1 && "Invalid number of operands!");
189 Inst.addOperand(MCOperand::CreateReg(getReg()));
192 void addImmOperands(MCInst &Inst, unsigned N) const {
193 assert(N == 1 && "Invalid number of operands!");
194 addExpr(Inst, getImm());
197 void addFslOperands(MCInst &Inst, unsigned N) const {
198 assert(N == 1 && "Invalid number of operands!");
199 addExpr(Inst, getFslImm());
202 void addMemOperands(MCInst &Inst, unsigned N) const {
203 assert(N == 2 && "Invalid number of operands!");
205 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
207 unsigned RegOff = getMemOffReg();
209 Inst.addOperand(MCOperand::CreateReg(RegOff));
211 addExpr(Inst, getMemOff());
214 StringRef getToken() const {
215 assert(Kind == Token && "Invalid access!");
216 return StringRef(Tok.Data, Tok.Length);
219 virtual void print(raw_ostream &OS) const;
221 static MBlazeOperand *CreateToken(StringRef Str, SMLoc S) {
222 MBlazeOperand *Op = new MBlazeOperand(Token);
223 Op->Tok.Data = Str.data();
224 Op->Tok.Length = Str.size();
230 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
231 MBlazeOperand *Op = new MBlazeOperand(Register);
232 Op->Reg.RegNum = RegNum;
238 static MBlazeOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) {
239 MBlazeOperand *Op = new MBlazeOperand(Immediate);
246 static MBlazeOperand *CreateFslImm(const MCExpr *Val, SMLoc S, SMLoc E) {
247 MBlazeOperand *Op = new MBlazeOperand(Fsl);
254 static MBlazeOperand *CreateMem(unsigned Base, const MCExpr *Off, SMLoc S,
256 MBlazeOperand *Op = new MBlazeOperand(Memory);
265 static MBlazeOperand *CreateMem(unsigned Base, unsigned Off, SMLoc S,
267 MBlazeOperand *Op = new MBlazeOperand(Memory);
269 Op->Mem.OffReg = Off;
277 } // end anonymous namespace.
279 void MBlazeOperand::print(raw_ostream &OS) const {
286 OS << getMBlazeRegisterNumbering(getReg()) << ">";
289 OS << "'" << getToken() << "'";
293 OS << getMBlazeRegisterNumbering(getMemBase());
296 unsigned RegOff = getMemOffReg();
298 OS << "R" << getMBlazeRegisterNumbering(RegOff);
305 getFslImm()->print(OS);
310 /// @name Auto-generated Match Functions
313 static unsigned MatchRegisterName(StringRef Name);
317 bool MBlazeAsmParser::
318 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
319 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
320 MCStreamer &Out, unsigned &ErrorInfo,
321 bool MatchingInlineAsm) {
323 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo,
324 MatchingInlineAsm)) {
327 Out.EmitInstruction(Inst);
329 case Match_MissingFeature:
330 return Error(IDLoc, "instruction use requires an option to be enabled");
331 case Match_MnemonicFail:
332 return Error(IDLoc, "unrecognized instruction mnemonic");
333 case Match_InvalidOperand: {
334 SMLoc ErrorLoc = IDLoc;
335 if (ErrorInfo != ~0U) {
336 if (ErrorInfo >= Operands.size())
337 return Error(IDLoc, "too few operands for instruction");
339 ErrorLoc = ((MBlazeOperand*)Operands[ErrorInfo])->getStartLoc();
340 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
343 return Error(ErrorLoc, "invalid operand for instruction");
347 llvm_unreachable("Implement any new match types added!");
350 MBlazeOperand *MBlazeAsmParser::
351 ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
352 if (Operands.size() != 4)
355 MBlazeOperand &Base = *(MBlazeOperand*)Operands[2];
356 MBlazeOperand &Offset = *(MBlazeOperand*)Operands[3];
358 SMLoc S = Base.getStartLoc();
359 SMLoc O = Offset.getStartLoc();
360 SMLoc E = Offset.getEndLoc();
363 Error(S, "base address must be a register");
367 if (!Offset.isReg() && !Offset.isImm()) {
368 Error(O, "offset must be a register or immediate");
374 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getReg(), S, E);
376 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getImm(), S, E);
378 delete Operands.pop_back_val();
379 delete Operands.pop_back_val();
380 Operands.push_back(Op);
385 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo,
386 SMLoc &StartLoc, SMLoc &EndLoc) {
387 MBlazeOperand *Reg = ParseRegister(StartLoc, EndLoc);
390 RegNo = Reg->getReg();
394 MBlazeOperand *MBlazeAsmParser::ParseRegister() {
396 return ParseRegister(S, E);
399 MBlazeOperand *MBlazeAsmParser::ParseRegister(SMLoc &StartLoc, SMLoc &EndLoc) {
400 StartLoc = Parser.getTok().getLoc();
401 EndLoc = Parser.getTok().getEndLoc();
403 if (getLexer().getKind() != AsmToken::Identifier)
406 unsigned RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
411 return MBlazeOperand::CreateReg(RegNo, StartLoc, EndLoc);
414 static unsigned MatchFslRegister(StringRef String) {
415 if (!String.startswith("rfsl"))
419 if (String.substr(4).getAsInteger(10,regNum))
425 MBlazeOperand *MBlazeAsmParser::ParseFsl() {
426 SMLoc S = Parser.getTok().getLoc();
427 SMLoc E = Parser.getTok().getEndLoc();
429 switch (getLexer().getKind()) {
431 case AsmToken::Identifier:
432 unsigned reg = MatchFslRegister(getLexer().getTok().getIdentifier());
437 const MCExpr *EVal = MCConstantExpr::Create(reg,getContext());
438 return MBlazeOperand::CreateFslImm(EVal,S,E);
442 MBlazeOperand *MBlazeAsmParser::ParseImmediate() {
443 SMLoc S = Parser.getTok().getLoc();
444 SMLoc E = Parser.getTok().getEndLoc();
447 switch (getLexer().getKind()) {
449 case AsmToken::LParen:
451 case AsmToken::Minus:
452 case AsmToken::Integer:
453 case AsmToken::Identifier:
454 if (getParser().ParseExpression(EVal))
457 return MBlazeOperand::CreateImm(EVal, S, E);
461 MBlazeOperand *MBlazeAsmParser::
462 ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
465 // Attempt to parse the next token as a register name
466 Op = ParseRegister();
468 // Attempt to parse the next token as an FSL immediate
472 // Attempt to parse the next token as an immediate
474 Op = ParseImmediate();
476 // If the token could not be parsed then fail
478 Error(Parser.getTok().getLoc(), "unknown operand");
482 // Push the parsed operand into the list of operands
483 Operands.push_back(Op);
487 /// Parse an mblaze instruction mnemonic followed by its operands.
488 bool MBlazeAsmParser::
489 ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc,
490 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
491 // The first operands is the token for the instruction name
492 size_t dotLoc = Name.find('.');
493 Operands.push_back(MBlazeOperand::CreateToken(Name.substr(0,dotLoc),NameLoc));
494 if (dotLoc < Name.size())
495 Operands.push_back(MBlazeOperand::CreateToken(Name.substr(dotLoc),NameLoc));
497 // If there are no more operands then finish
498 if (getLexer().is(AsmToken::EndOfStatement))
501 // Parse the first operand
502 if (!ParseOperand(Operands))
505 while (getLexer().isNot(AsmToken::EndOfStatement) &&
506 getLexer().is(AsmToken::Comma)) {
507 // Consume the comma token
510 // Parse the next operand
511 if (!ParseOperand(Operands))
515 // If the instruction requires a memory operand then we need to
516 // replace the last two operands (base+offset) with a single
518 if (Name.startswith("lw") || Name.startswith("sw") ||
519 Name.startswith("lh") || Name.startswith("sh") ||
520 Name.startswith("lb") || Name.startswith("sb"))
521 return (ParseMemory(Operands) == NULL);
526 /// ParseDirective parses the MBlaze specific directives
527 bool MBlazeAsmParser::ParseDirective(AsmToken DirectiveID) {
528 StringRef IDVal = DirectiveID.getIdentifier();
529 if (IDVal == ".word")
530 return ParseDirectiveWord(2, DirectiveID.getLoc());
534 /// ParseDirectiveWord
535 /// ::= .word [ expression (, expression)* ]
536 bool MBlazeAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
537 if (getLexer().isNot(AsmToken::EndOfStatement)) {
540 if (getParser().ParseExpression(Value))
543 getParser().getStreamer().EmitValue(Value, Size, 0 /*addrspace*/);
545 if (getLexer().is(AsmToken::EndOfStatement))
548 // FIXME: Improve diagnostic.
549 if (getLexer().isNot(AsmToken::Comma))
550 return Error(L, "unexpected token in directive");
559 /// Force static initialization.
560 extern "C" void LLVMInitializeMBlazeAsmParser() {
561 RegisterMCAsmParser<MBlazeAsmParser> X(TheMBlazeTarget);
564 #define GET_REGISTER_MATCHER
565 #define GET_MATCHER_IMPLEMENTATION
566 #include "MBlazeGenAsmMatcher.inc"