1 //===-- HexagonMCTargetDesc.cpp - Hexagon Target Descriptions -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Hexagon specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "HexagonMCTargetDesc.h"
15 #include "HexagonMCAsmInfo.h"
16 #include "InstPrinter/HexagonInstPrinter.h"
17 #include "llvm/MC/MCCodeGenInfo.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCStreamer.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MachineLocation.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
28 #define GET_INSTRINFO_MC_DESC
29 #include "HexagonGenInstrInfo.inc"
31 #define GET_SUBTARGETINFO_MC_DESC
32 #include "HexagonGenSubtargetInfo.inc"
34 #define GET_REGINFO_MC_DESC
35 #include "HexagonGenRegisterInfo.inc"
37 static llvm::MCInstrInfo *createHexagonMCInstrInfo() {
38 MCInstrInfo *X = new MCInstrInfo();
39 InitHexagonMCInstrInfo(X);
43 static MCRegisterInfo *createHexagonMCRegisterInfo(StringRef TT) {
44 MCRegisterInfo *X = new MCRegisterInfo();
45 InitHexagonMCRegisterInfo(X, Hexagon::R0);
49 static MCSubtargetInfo *
50 createHexagonMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) {
51 MCSubtargetInfo *X = new MCSubtargetInfo();
52 InitHexagonMCSubtargetInfo(X, TT, CPU, FS);
56 static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
58 MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
60 // VirtualFP = (R30 + #0).
61 MCCFIInstruction Inst =
62 MCCFIInstruction::createDefCfa(nullptr, Hexagon::R30, 0);
63 MAI->addInitialFrameState(Inst);
68 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM,
70 CodeGenOpt::Level OL) {
71 MCCodeGenInfo *X = new MCCodeGenInfo();
72 // For the time being, use static relocations, since there's really no
73 // support for PIC yet.
74 X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
77 static MCInstPrinter *createHexagonMCInstPrinter(const Target &T,
78 unsigned SyntaxVariant,
80 const MCInstrInfo &MII,
81 const MCRegisterInfo &MRI,
82 const MCSubtargetInfo &STI) {
83 return new HexagonInstPrinter(MAI, MII, MRI);
86 // Force static initialization.
87 extern "C" void LLVMInitializeHexagonTargetMC() {
88 // Register the MC asm info.
89 RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
91 // Register the MC codegen info.
92 TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget,
93 createHexagonMCCodeGenInfo);
95 // Register the MC instruction info.
96 TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget,
97 createHexagonMCInstrInfo);
99 // Register the MC register info.
100 TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
101 createHexagonMCRegisterInfo);
103 // Register the MC subtarget info.
104 TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
105 createHexagonMCSubtargetInfo);
107 // Register the MC Code Emitter
108 TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
109 createHexagonMCCodeEmitter);
111 // Register the MC Inst Printer
112 TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
113 createHexagonMCInstPrinter);