1 //=- HexagonIntrinsicsV3.td - Target Description for Hexagon -*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the Hexagon V3 Compiler Intrinsics in TableGen format.
12 //===----------------------------------------------------------------------===//
17 // MTYPE / COMPLEX / Vector reduce complex multiply real or imaginary.
18 def Hexagon_M2_vrcmpys_s1:
19 di_MInst_disi_s1_sat <"vrcmpys", int_hexagon_M2_vrcmpys_s1>;
20 def Hexagon_M2_vrcmpys_acc_s1:
21 di_MInst_didisi_acc_s1_sat <"vrcmpys", int_hexagon_M2_vrcmpys_acc_s1>;
22 def Hexagon_M2_vrcmpys_s1rp:
23 si_MInst_disi_s1_rnd_sat <"vrcmpys", int_hexagon_M2_vrcmpys_s1rp>;
26 /********************************************************************
28 *********************************************************************/
30 // MTYPE / VB / Vector reduce add unsigned bytes.
31 def Hexagon_M2_vradduh:
32 si_MInst_didi <"vradduh", int_hexagon_M2_vradduh>;
35 def: T_RP_pat<A2_addsp, int_hexagon_A2_addsp>;
36 def: T_PP_pat<A2_addpsat, int_hexagon_A2_addpsat>;
37 def: T_PP_pat<A2_minp, int_hexagon_A2_minp>;
38 def: T_PP_pat<A2_minup, int_hexagon_A2_minup>;
39 def: T_PP_pat<A2_maxp, int_hexagon_A2_maxp>;
40 def: T_PP_pat<A2_maxup, int_hexagon_A2_maxup>;