1 //===-- SPUTargetMachine.cpp - Define TargetMachine for Cell SPU ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the Cell SPU target.
12 //===----------------------------------------------------------------------===//
14 #include "SPUTargetMachine.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/SchedulerRegistry.h"
18 #include "llvm/Support/DynamicLibrary.h"
19 #include "llvm/Support/TargetRegistry.h"
23 extern "C" void LLVMInitializeCellSPUTarget() {
24 // Register the target.
25 RegisterTargetMachine<SPUTargetMachine> X(TheCellSPUTarget);
28 const std::pair<unsigned, int> *
29 SPUFrameLowering::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
34 SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT,
35 StringRef CPU, StringRef FS,
36 const TargetOptions &Options,
37 Reloc::Model RM, CodeModel::Model CM,
39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
40 Subtarget(TT, CPU, FS),
41 DataLayout(Subtarget.getTargetDataString()),
43 FrameLowering(Subtarget),
46 InstrItins(Subtarget.getInstrItineraryData()) {
49 //===----------------------------------------------------------------------===//
50 // Pass Pipeline Configuration
51 //===----------------------------------------------------------------------===//
54 /// SPU Code Generator Pass Configuration Options.
55 class SPUPassConfig : public TargetPassConfig {
57 SPUPassConfig(SPUTargetMachine *TM, PassManagerBase &PM)
58 : TargetPassConfig(TM, PM) {}
60 SPUTargetMachine &getSPUTargetMachine() const {
61 return getTM<SPUTargetMachine>();
64 virtual bool addInstSelector();
65 virtual bool addPreEmitPass();
69 TargetPassConfig *SPUTargetMachine::createPassConfig(PassManagerBase &PM) {
70 return new SPUPassConfig(this, PM);
73 bool SPUPassConfig::addInstSelector() {
74 // Install an instruction selector.
75 PM->add(createSPUISelDag(getSPUTargetMachine()));
79 // passes to run just before printing the assembly
80 bool SPUPassConfig::addPreEmitPass() {
81 // load the TCE instruction scheduler, if available via
83 typedef llvm::FunctionPass* (*BuilderFunc)(const char*);
84 BuilderFunc schedulerCreator =
85 (BuilderFunc)(intptr_t)sys::DynamicLibrary::SearchForAddressOfSymbol(
86 "createTCESchedulerPass");
87 if (schedulerCreator != NULL)
88 PM->add(schedulerCreator("cellspu"));
90 //align instructions with nops/lnops for dual issue
91 PM->add(createSPUNopFillerPass(getSPUTargetMachine()));