1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the BPFMCCodeEmitter class.
12 //===----------------------------------------------------------------------===//
14 #include "MCTargetDesc/BPFMCTargetDesc.h"
15 #include "llvm/MC/MCCodeEmitter.h"
16 #include "llvm/MC/MCFixup.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/MCSymbol.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/Support/raw_ostream.h"
26 #define DEBUG_TYPE "mccodeemitter"
29 class BPFMCCodeEmitter : public MCCodeEmitter {
30 BPFMCCodeEmitter(const BPFMCCodeEmitter &) = delete;
31 void operator=(const BPFMCCodeEmitter &) = delete;
32 const MCRegisterInfo &MRI;
36 BPFMCCodeEmitter(const MCRegisterInfo &mri, bool IsLittleEndian)
37 : MRI(mri), IsLittleEndian(IsLittleEndian) {}
39 ~BPFMCCodeEmitter() {}
41 // getBinaryCodeForInstr - TableGen'erated function for getting the
42 // binary encoding for an instruction.
43 uint64_t getBinaryCodeForInstr(const MCInst &MI,
44 SmallVectorImpl<MCFixup> &Fixups,
45 const MCSubtargetInfo &STI) const;
47 // getMachineOpValue - Return binary encoding of operand. If the machin
48 // operand requires relocation, record the relocation and return zero.
49 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
50 SmallVectorImpl<MCFixup> &Fixups,
51 const MCSubtargetInfo &STI) const;
53 uint64_t getMemoryOpValue(const MCInst &MI, unsigned Op,
54 SmallVectorImpl<MCFixup> &Fixups,
55 const MCSubtargetInfo &STI) const;
57 void encodeInstruction(const MCInst &MI, raw_ostream &OS,
58 SmallVectorImpl<MCFixup> &Fixups,
59 const MCSubtargetInfo &STI) const override;
63 MCCodeEmitter *llvm::createBPFMCCodeEmitter(const MCInstrInfo &MCII,
64 const MCRegisterInfo &MRI,
66 return new BPFMCCodeEmitter(MRI, true);
69 MCCodeEmitter *llvm::createBPFbeMCCodeEmitter(const MCInstrInfo &MCII,
70 const MCRegisterInfo &MRI,
72 return new BPFMCCodeEmitter(MRI, false);
75 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
77 SmallVectorImpl<MCFixup> &Fixups,
78 const MCSubtargetInfo &STI) const {
80 return MRI.getEncodingValue(MO.getReg());
82 return static_cast<unsigned>(MO.getImm());
86 const MCExpr *Expr = MO.getExpr();
88 assert(Expr->getKind() == MCExpr::SymbolRef);
90 if (MI.getOpcode() == BPF::JAL)
92 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_4));
93 else if (MI.getOpcode() == BPF::LD_imm64)
94 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8));
97 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2));
102 static uint8_t SwapBits(uint8_t Val)
104 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4;
107 void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
108 SmallVectorImpl<MCFixup> &Fixups,
109 const MCSubtargetInfo &STI) const {
110 unsigned Opcode = MI.getOpcode();
111 support::endian::Writer<support::little> LE(OS);
112 support::endian::Writer<support::big> BE(OS);
114 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
115 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
116 LE.write<uint8_t>(Value >> 56);
118 LE.write<uint8_t>((Value >> 48) & 0xff);
120 LE.write<uint8_t>(SwapBits((Value >> 48) & 0xff));
121 LE.write<uint16_t>(0);
123 LE.write<uint32_t>(Value & 0xffffFFFF);
125 BE.write<uint32_t>(Value & 0xffffFFFF);
127 const MCOperand &MO = MI.getOperand(1);
128 uint64_t Imm = MO.isImm() ? MO.getImm() : 0;
129 LE.write<uint8_t>(0);
130 LE.write<uint8_t>(0);
131 LE.write<uint16_t>(0);
133 LE.write<uint32_t>(Imm >> 32);
135 BE.write<uint32_t>(Imm >> 32);
137 // Get instruction encoding and emit it
138 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
139 LE.write<uint8_t>(Value >> 56);
140 if (IsLittleEndian) {
141 LE.write<uint8_t>((Value >> 48) & 0xff);
142 LE.write<uint16_t>((Value >> 32) & 0xffff);
143 LE.write<uint32_t>(Value & 0xffffFFFF);
145 LE.write<uint8_t>(SwapBits((Value >> 48) & 0xff));
146 BE.write<uint16_t>((Value >> 32) & 0xffff);
147 BE.write<uint32_t>(Value & 0xffffFFFF);
152 // Encode BPF Memory Operand
153 uint64_t BPFMCCodeEmitter::getMemoryOpValue(const MCInst &MI, unsigned Op,
154 SmallVectorImpl<MCFixup> &Fixups,
155 const MCSubtargetInfo &STI) const {
157 const MCOperand Op1 = MI.getOperand(1);
158 assert(Op1.isReg() && "First operand is not register.");
159 Encoding = MRI.getEncodingValue(Op1.getReg());
161 MCOperand Op2 = MI.getOperand(2);
162 assert(Op2.isImm() && "Second operand is not immediate.");
163 Encoding |= Op2.getImm() & 0xffff;
167 #include "BPFGenMCCodeEmitter.inc"