1 //===-- ARM64MCTargetDesc.cpp - ARM64 Target Descriptions -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides ARM64 specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "ARM64MCTargetDesc.h"
15 #include "ARM64ELFStreamer.h"
16 #include "ARM64MCAsmInfo.h"
17 #include "InstPrinter/ARM64InstPrinter.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
28 #define GET_INSTRINFO_MC_DESC
29 #include "ARM64GenInstrInfo.inc"
31 #define GET_SUBTARGETINFO_MC_DESC
32 #include "ARM64GenSubtargetInfo.inc"
34 #define GET_REGINFO_MC_DESC
35 #include "ARM64GenRegisterInfo.inc"
37 static MCInstrInfo *createARM64MCInstrInfo() {
38 MCInstrInfo *X = new MCInstrInfo();
39 InitARM64MCInstrInfo(X);
43 static MCSubtargetInfo *createARM64MCSubtargetInfo(StringRef TT, StringRef CPU,
45 MCSubtargetInfo *X = new MCSubtargetInfo();
50 InitARM64MCSubtargetInfo(X, TT, CPU, FS);
54 static MCRegisterInfo *createARM64MCRegisterInfo(StringRef Triple) {
55 MCRegisterInfo *X = new MCRegisterInfo();
56 InitARM64MCRegisterInfo(X, ARM64::LR);
60 static MCAsmInfo *createARM64MCAsmInfo(const MCRegisterInfo &MRI,
65 if (TheTriple.isOSDarwin())
66 MAI = new ARM64MCAsmInfoDarwin();
68 assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
69 MAI = new ARM64MCAsmInfoELF(TT);
72 // Initial state of the frame pointer is SP.
73 unsigned Reg = MRI.getDwarfRegNum(ARM64::SP, true);
74 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
75 MAI->addInitialFrameState(Inst);
80 static MCCodeGenInfo *createARM64MCCodeGenInfo(StringRef TT, Reloc::Model RM,
82 CodeGenOpt::Level OL) {
84 assert((TheTriple.isOSBinFormatELF() || TheTriple.isOSBinFormatMachO()) &&
85 "Only expect Darwin and ELF targets");
87 if (CM == CodeModel::Default)
88 CM = CodeModel::Small;
89 // The default MCJIT memory managers make no guarantees about where they can
90 // find an executable page; JITed code needs to be able to refer to globals
91 // no matter how far away they are.
92 else if (CM == CodeModel::JITDefault)
93 CM = CodeModel::Large;
94 else if (CM != CodeModel::Small && CM != CodeModel::Large)
95 report_fatal_error("Only small and large code models are allowed on ARM64");
97 // ARM64 Darwin is always PIC.
98 if (TheTriple.isOSDarwin())
100 // On ELF platforms the default static relocation model has a smart enough
101 // linker to cope with referencing external symbols defined in a shared
102 // library. Hence DynamicNoPIC doesn't need to be promoted to PIC.
103 else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
106 MCCodeGenInfo *X = new MCCodeGenInfo();
107 X->InitMCCodeGenInfo(RM, CM, OL);
111 static MCInstPrinter *createARM64MCInstPrinter(const Target &T,
112 unsigned SyntaxVariant,
113 const MCAsmInfo &MAI,
114 const MCInstrInfo &MII,
115 const MCRegisterInfo &MRI,
116 const MCSubtargetInfo &STI) {
117 if (SyntaxVariant == 0)
118 return new ARM64InstPrinter(MAI, MII, MRI, STI);
119 if (SyntaxVariant == 1)
120 return new ARM64AppleInstPrinter(MAI, MII, MRI, STI);
125 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
126 MCContext &Ctx, MCAsmBackend &TAB,
127 raw_ostream &OS, MCCodeEmitter *Emitter,
128 const MCSubtargetInfo &STI, bool RelaxAll,
130 Triple TheTriple(TT);
132 if (TheTriple.isOSDarwin())
133 return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
134 /*LabelSections*/ true);
136 return createARM64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll, NoExecStack);
139 // Force static initialization.
140 extern "C" void LLVMInitializeARM64TargetMC() {
141 // Register the MC asm info.
142 RegisterMCAsmInfoFn X(TheARM64leTarget, createARM64MCAsmInfo);
143 RegisterMCAsmInfoFn Y(TheARM64beTarget, createARM64MCAsmInfo);
145 // Register the MC codegen info.
146 TargetRegistry::RegisterMCCodeGenInfo(TheARM64leTarget,
147 createARM64MCCodeGenInfo);
148 TargetRegistry::RegisterMCCodeGenInfo(TheARM64beTarget,
149 createARM64MCCodeGenInfo);
151 // Register the MC instruction info.
152 TargetRegistry::RegisterMCInstrInfo(TheARM64leTarget, createARM64MCInstrInfo);
153 TargetRegistry::RegisterMCInstrInfo(TheARM64beTarget, createARM64MCInstrInfo);
155 // Register the MC register info.
156 TargetRegistry::RegisterMCRegInfo(TheARM64leTarget, createARM64MCRegisterInfo);
157 TargetRegistry::RegisterMCRegInfo(TheARM64beTarget, createARM64MCRegisterInfo);
159 // Register the MC subtarget info.
160 TargetRegistry::RegisterMCSubtargetInfo(TheARM64leTarget,
161 createARM64MCSubtargetInfo);
162 TargetRegistry::RegisterMCSubtargetInfo(TheARM64beTarget,
163 createARM64MCSubtargetInfo);
165 // Register the asm backend.
166 TargetRegistry::RegisterMCAsmBackend(TheARM64leTarget, createARM64leAsmBackend);
167 TargetRegistry::RegisterMCAsmBackend(TheARM64beTarget, createARM64beAsmBackend);
169 // Register the MC Code Emitter
170 TargetRegistry::RegisterMCCodeEmitter(TheARM64leTarget,
171 createARM64MCCodeEmitter);
172 TargetRegistry::RegisterMCCodeEmitter(TheARM64beTarget,
173 createARM64MCCodeEmitter);
175 // Register the object streamer.
176 TargetRegistry::RegisterMCObjectStreamer(TheARM64leTarget, createMCStreamer);
177 TargetRegistry::RegisterMCObjectStreamer(TheARM64beTarget, createMCStreamer);
179 // Register the MCInstPrinter.
180 TargetRegistry::RegisterMCInstPrinter(TheARM64leTarget,
181 createARM64MCInstPrinter);
182 TargetRegistry::RegisterMCInstPrinter(TheARM64beTarget,
183 createARM64MCInstPrinter);