1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides ARM specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMMCTARGETDESC_H
15 #define ARMMCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
27 class MCSubtargetInfo;
32 extern Target TheARMTarget, TheThumbTarget;
35 std::string ParseARMTriple(StringRef TT, StringRef CPU);
37 /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
38 /// This is exposed so Asm parser, etc. do not need to go through
40 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
44 MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII,
45 const MCRegisterInfo &MRI,
46 const MCSubtargetInfo &STI,
49 MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU);
51 /// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
52 MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,
55 /// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
56 MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
61 } // End llvm namespace
63 // Defines symbolic names for ARM registers. This defines a mapping from
64 // register name to register number.
66 #define GET_REGINFO_ENUM
67 #include "ARMGenRegisterInfo.inc"
69 // Defines symbolic names for the ARM instructions.
71 #define GET_INSTRINFO_ENUM
72 #include "ARMGenInstrInfo.inc"
74 #define GET_SUBTARGETINFO_ENUM
75 #include "ARMGenSubtargetInfo.inc"