1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMTargetMachine.h"
18 #include "ARMAddressingModes.h"
19 #include "ARMConstantPoolValue.h"
20 #include "ARMMachineFunctionInfo.h"
21 #include "llvm/Constants.h"
22 #include "llvm/Module.h"
23 #include "llvm/CodeGen/AsmPrinter.h"
24 #include "llvm/CodeGen/DwarfWriter.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/Target/TargetAsmInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/ADT/SmallPtrSet.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/Support/Compiler.h"
36 #include "llvm/Support/Mangler.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/raw_ostream.h"
42 STATISTIC(EmittedInsts, "Number of machine instrs printed");
45 struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
46 ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
47 : AsmPrinter(O, TM, T), DW(O, this, T), MMI(NULL), AFI(NULL), MCP(NULL),
49 Subtarget = &TM.getSubtarget<ARMSubtarget>();
53 MachineModuleInfo *MMI;
55 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
56 /// make the right decision when printing asm code for different targets.
57 const ARMSubtarget *Subtarget;
59 /// AFI - Keep a pointer to ARMFunctionInfo for the current
63 /// MCP - Keep a pointer to constantpool entries of the current
65 const MachineConstantPool *MCP;
67 /// We name each basic block in a Function with a unique number, so
68 /// that we can consistently refer to them later. This is cleared
69 /// at the beginning of each call to runOnMachineFunction().
71 typedef std::map<const Value *, unsigned> ValueMapTy;
72 ValueMapTy NumberForBB;
74 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
75 /// non-lazy-pointers for indirect access.
76 std::set<std::string> GVNonLazyPtrs;
78 /// FnStubs - Keeps the set of external function GlobalAddresses that the
79 /// asm printer should generate stubs for.
80 std::set<std::string> FnStubs;
82 /// PCRelGVs - Keeps the set of GlobalValues used in pc relative
84 SmallPtrSet<const GlobalValue*, 8> PCRelGVs;
86 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
89 virtual const char *getPassName() const {
90 return "ARM Assembly Printer";
93 void printOperand(const MachineInstr *MI, int opNum,
94 const char *Modifier = 0);
95 void printSOImmOperand(const MachineInstr *MI, int opNum);
96 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
97 void printSORegOperand(const MachineInstr *MI, int opNum);
98 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
99 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
100 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
101 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
102 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
103 const char *Modifier = 0);
104 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
105 const char *Modifier = 0);
106 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
107 const char *Modifier = 0);
108 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
109 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
111 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
112 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
113 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
114 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
115 void printPredicateOperand(const MachineInstr *MI, int opNum);
116 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
117 void printPCLabel(const MachineInstr *MI, int opNum);
118 void printRegisterList(const MachineInstr *MI, int opNum);
119 void printCPInstOperand(const MachineInstr *MI, int opNum,
120 const char *Modifier);
121 void printJTBlockOperand(const MachineInstr *MI, int opNum);
123 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
124 unsigned AsmVariant, const char *ExtraCode);
126 void printModuleLevelGV(const GlobalVariable* GVar);
127 bool printInstruction(const MachineInstr *MI); // autogenerated.
128 void printMachineInstruction(const MachineInstr *MI);
129 bool runOnMachineFunction(MachineFunction &F);
130 bool doInitialization(Module &M);
131 bool doFinalization(Module &M);
133 /// getSectionForFunction - Return the section that we should emit the
134 /// specified function body into.
135 virtual std::string getSectionForFunction(const Function &F) const;
137 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
139 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
140 printDataDirective(MCPV->getType());
142 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
143 GlobalValue *GV = ACPV->getGV();
144 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
146 Name += ACPV->getSymbol();
147 if (ACPV->isNonLazyPointer()) {
148 GVNonLazyPtrs.insert(Name);
149 printSuffixedName(Name, "$non_lazy_ptr");
150 } else if (ACPV->isStub()) {
151 FnStubs.insert(Name);
152 printSuffixedName(Name, "$stub");
155 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
156 if (ACPV->getPCAdjustment() != 0) {
157 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
158 << utostr(ACPV->getLabelId())
159 << "+" << (unsigned)ACPV->getPCAdjustment();
160 if (ACPV->mustAddCurrentAddress())
166 // If the constant pool value is a extern weak symbol, remember to emit
167 // the weak reference.
168 if (GV && GV->hasExternalWeakLinkage())
169 ExtWeakSymbols.insert(GV);
172 void getAnalysisUsage(AnalysisUsage &AU) const {
173 AsmPrinter::getAnalysisUsage(AU);
174 AU.setPreservesAll();
175 AU.addRequired<MachineModuleInfo>();
178 } // end of anonymous namespace
180 #include "ARMGenAsmWriter.inc"
182 // Substitute old hook with new one temporary
183 std::string ARMAsmPrinter::getSectionForFunction(const Function &F) const {
184 return TAI->SectionForGlobal(&F);
187 /// runOnMachineFunction - This uses the printInstruction()
188 /// method to print assembly for each instruction.
190 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
191 AFI = MF.getInfo<ARMFunctionInfo>();
192 MCP = MF.getConstantPool();
194 SetupMachineFunction(MF);
197 // NOTE: we don't print out constant pools here, they are handled as
201 // Print out labels for the function.
202 const Function *F = MF.getFunction();
203 switch (F->getLinkage()) {
204 default: assert(0 && "Unknown linkage type!");
205 case Function::InternalLinkage:
206 SwitchToTextSection("\t.text", F);
208 case Function::ExternalLinkage:
209 SwitchToTextSection("\t.text", F);
210 O << "\t.globl\t" << CurrentFnName << "\n";
212 case Function::WeakLinkage:
213 case Function::LinkOnceLinkage:
214 if (Subtarget->isTargetDarwin()) {
216 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
217 O << "\t.globl\t" << CurrentFnName << "\n";
218 O << "\t.weak_definition\t" << CurrentFnName << "\n";
220 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
225 printVisibility(CurrentFnName, F->getVisibility());
227 if (AFI->isThumbFunction()) {
228 EmitAlignment(1, F, AFI->getAlign());
229 O << "\t.code\t16\n";
230 O << "\t.thumb_func";
231 if (Subtarget->isTargetDarwin())
232 O << "\t" << CurrentFnName;
238 O << CurrentFnName << ":\n";
239 // Emit pre-function debug information.
240 // FIXME: Dwarf support.
241 //DW.BeginFunction(&MF);
243 if (Subtarget->isTargetDarwin()) {
244 // If the function is empty, then we need to emit *something*. Otherwise,
245 // the function's label might be associated with something that it wasn't
246 // meant to be associated with. We emit a noop in this situation.
247 MachineFunction::iterator I = MF.begin();
249 if (++I == MF.end() && MF.front().empty())
253 // Print out code for the function.
254 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
256 // Print a label for the basic block.
257 if (I != MF.begin()) {
258 printBasicBlockLabel(I, true, true);
261 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
263 // Print the assembly for the instruction.
264 printMachineInstruction(II);
268 if (TAI->hasDotTypeDotSizeDirective())
269 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
271 // Emit post-function debug information.
272 // FIXME: Dwarf support.
278 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
279 const char *Modifier) {
280 const MachineOperand &MO = MI->getOperand(opNum);
281 switch (MO.getType()) {
282 case MachineOperand::MO_Register:
283 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
284 O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
286 assert(0 && "not implemented");
288 case MachineOperand::MO_Immediate: {
289 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
292 O << (int)MO.getImm();
295 case MachineOperand::MO_MachineBasicBlock:
296 printBasicBlockLabel(MO.getMBB());
298 case MachineOperand::MO_GlobalAddress: {
299 bool isCallOp = Modifier && !strcmp(Modifier, "call");
300 GlobalValue *GV = MO.getGlobal();
301 std::string Name = Mang->getValueName(GV);
302 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
303 GV->hasLinkOnceLinkage());
304 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
305 TM.getRelocationModel() != Reloc::Static) {
306 printSuffixedName(Name, "$stub");
307 FnStubs.insert(Name);
311 if (MO.getOffset() > 0)
312 O << '+' << MO.getOffset();
313 else if (MO.getOffset() < 0)
316 if (isCallOp && Subtarget->isTargetELF() &&
317 TM.getRelocationModel() == Reloc::PIC_)
319 if (GV->hasExternalWeakLinkage())
320 ExtWeakSymbols.insert(GV);
323 case MachineOperand::MO_ExternalSymbol: {
324 bool isCallOp = Modifier && !strcmp(Modifier, "call");
325 std::string Name(TAI->getGlobalPrefix());
326 Name += MO.getSymbolName();
327 if (isCallOp && Subtarget->isTargetDarwin() &&
328 TM.getRelocationModel() != Reloc::Static) {
329 printSuffixedName(Name, "$stub");
330 FnStubs.insert(Name);
333 if (isCallOp && Subtarget->isTargetELF() &&
334 TM.getRelocationModel() == Reloc::PIC_)
338 case MachineOperand::MO_ConstantPoolIndex:
339 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
340 << '_' << MO.getIndex();
342 case MachineOperand::MO_JumpTableIndex:
343 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
344 << '_' << MO.getIndex();
347 O << "<unknown operand type>"; abort (); break;
351 static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
352 assert(V < (1 << 12) && "Not a valid so_imm value!");
353 unsigned Imm = ARM_AM::getSOImmValImm(V);
354 unsigned Rot = ARM_AM::getSOImmValRot(V);
356 // Print low-level immediate formation info, per
357 // A5.1.3: "Data-processing operands - Immediate".
359 O << "#" << Imm << ", " << Rot;
360 // Pretty printed version.
361 O << ' ' << TAI->getCommentString() << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
367 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
368 /// immediate in bits 0-7.
369 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
370 const MachineOperand &MO = MI->getOperand(OpNum);
371 assert(MO.isImmediate() && "Not a valid so_imm value!");
372 printSOImm(O, MO.getImm(), TAI);
375 /// printSOImm2PartOperand - SOImm is broken into two pieces using a mov
376 /// followed by a or to materialize.
377 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
378 const MachineOperand &MO = MI->getOperand(OpNum);
379 assert(MO.isImmediate() && "Not a valid so_imm value!");
380 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
381 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
382 printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
384 printPredicateOperand(MI, 2);
390 printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
393 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
394 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
396 // REG REG 0,SH_OPC - e.g. R5, ROR R3
397 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
398 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
399 const MachineOperand &MO1 = MI->getOperand(Op);
400 const MachineOperand &MO2 = MI->getOperand(Op+1);
401 const MachineOperand &MO3 = MI->getOperand(Op+2);
403 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
404 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
406 // Print the shift opc.
408 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
412 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
413 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
414 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
416 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
420 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
421 const MachineOperand &MO1 = MI->getOperand(Op);
422 const MachineOperand &MO2 = MI->getOperand(Op+1);
423 const MachineOperand &MO3 = MI->getOperand(Op+2);
425 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
426 printOperand(MI, Op);
430 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
433 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
435 << (char)ARM_AM::getAM2Op(MO3.getImm())
436 << ARM_AM::getAM2Offset(MO3.getImm());
442 << (char)ARM_AM::getAM2Op(MO3.getImm())
443 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
445 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
447 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
452 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
453 const MachineOperand &MO1 = MI->getOperand(Op);
454 const MachineOperand &MO2 = MI->getOperand(Op+1);
457 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
458 assert(ImmOffs && "Malformed indexed load / store!");
460 << (char)ARM_AM::getAM2Op(MO2.getImm())
465 O << (char)ARM_AM::getAM2Op(MO2.getImm())
466 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
468 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
470 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
474 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
475 const MachineOperand &MO1 = MI->getOperand(Op);
476 const MachineOperand &MO2 = MI->getOperand(Op+1);
477 const MachineOperand &MO3 = MI->getOperand(Op+2);
479 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
480 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
484 << (char)ARM_AM::getAM3Op(MO3.getImm())
485 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
490 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
492 << (char)ARM_AM::getAM3Op(MO3.getImm())
497 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
498 const MachineOperand &MO1 = MI->getOperand(Op);
499 const MachineOperand &MO2 = MI->getOperand(Op+1);
502 O << (char)ARM_AM::getAM3Op(MO2.getImm())
503 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
507 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
508 assert(ImmOffs && "Malformed indexed load / store!");
510 << (char)ARM_AM::getAM3Op(MO2.getImm())
514 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
515 const char *Modifier) {
516 const MachineOperand &MO1 = MI->getOperand(Op);
517 const MachineOperand &MO2 = MI->getOperand(Op+1);
518 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
519 if (Modifier && strcmp(Modifier, "submode") == 0) {
520 if (MO1.getReg() == ARM::SP) {
521 bool isLDM = (MI->getOpcode() == ARM::LDM ||
522 MI->getOpcode() == ARM::LDM_RET);
523 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
525 O << ARM_AM::getAMSubModeStr(Mode);
527 printOperand(MI, Op);
528 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
533 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
534 const char *Modifier) {
535 const MachineOperand &MO1 = MI->getOperand(Op);
536 const MachineOperand &MO2 = MI->getOperand(Op+1);
538 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
539 printOperand(MI, Op);
543 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
545 if (Modifier && strcmp(Modifier, "submode") == 0) {
546 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
547 if (MO1.getReg() == ARM::SP) {
548 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
549 MI->getOpcode() == ARM::FLDMS);
550 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
552 O << ARM_AM::getAMSubModeStr(Mode);
554 } else if (Modifier && strcmp(Modifier, "base") == 0) {
555 // Used for FSTM{D|S} and LSTM{D|S} operations.
556 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
557 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
562 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
564 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
566 << (char)ARM_AM::getAM5Op(MO2.getImm())
572 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
573 const char *Modifier) {
574 if (Modifier && strcmp(Modifier, "label") == 0) {
575 printPCLabel(MI, Op+1);
579 const MachineOperand &MO1 = MI->getOperand(Op);
580 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
581 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
585 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
586 const MachineOperand &MO1 = MI->getOperand(Op);
587 const MachineOperand &MO2 = MI->getOperand(Op+1);
588 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
589 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
593 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
595 const MachineOperand &MO1 = MI->getOperand(Op);
596 const MachineOperand &MO2 = MI->getOperand(Op+1);
597 const MachineOperand &MO3 = MI->getOperand(Op+2);
599 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
600 printOperand(MI, Op);
604 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
606 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
607 else if (unsigned ImmOffs = MO2.getImm()) {
608 O << ", #" << ImmOffs;
616 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
617 printThumbAddrModeRI5Operand(MI, Op, 1);
620 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
621 printThumbAddrModeRI5Operand(MI, Op, 2);
624 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
625 printThumbAddrModeRI5Operand(MI, Op, 4);
628 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
629 const MachineOperand &MO1 = MI->getOperand(Op);
630 const MachineOperand &MO2 = MI->getOperand(Op+1);
631 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
632 if (unsigned ImmOffs = MO2.getImm())
633 O << ", #" << ImmOffs << " * 4";
637 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
638 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
640 O << ARMCondCodeToString(CC);
643 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
644 unsigned Reg = MI->getOperand(opNum).getReg();
646 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
651 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
652 int Id = (int)MI->getOperand(opNum).getImm();
653 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
656 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
658 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
660 if (i != e-1) O << ", ";
665 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
666 const char *Modifier) {
667 assert(Modifier && "This operand only works with a modifier!");
668 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
670 if (!strcmp(Modifier, "label")) {
671 unsigned ID = MI->getOperand(OpNo).getImm();
672 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
673 << '_' << ID << ":\n";
675 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
676 unsigned CPI = MI->getOperand(OpNo).getIndex();
678 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
680 if (MCPE.isMachineConstantPoolEntry()) {
681 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
682 ARMConstantPoolValue *ACPV =
683 static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
684 if (ACPV->getPCAdjustment() != 0) {
685 const GlobalValue *GV = ACPV->getGV();
689 EmitGlobalConstant(MCPE.Val.ConstVal);
690 // remember to emit the weak reference
691 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
692 if (GV->hasExternalWeakLinkage())
693 ExtWeakSymbols.insert(GV);
698 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
699 const MachineOperand &MO1 = MI->getOperand(OpNo);
700 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
701 unsigned JTI = MO1.getIndex();
702 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
703 << '_' << JTI << '_' << MO2.getImm() << ":\n";
705 const char *JTEntryDirective = TAI->getJumpTableDirective();
706 if (!JTEntryDirective)
707 JTEntryDirective = TAI->getData32bitsDirective();
709 const MachineFunction *MF = MI->getParent()->getParent();
710 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
711 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
712 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
713 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
714 std::set<MachineBasicBlock*> JTSets;
715 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
716 MachineBasicBlock *MBB = JTBBs[i];
717 if (UseSet && JTSets.insert(MBB).second)
718 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
720 O << JTEntryDirective << ' ';
722 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
723 << '_' << JTI << '_' << MO2.getImm()
724 << "_set_" << MBB->getNumber();
725 else if (TM.getRelocationModel() == Reloc::PIC_) {
726 printBasicBlockLabel(MBB, false, false, false);
727 // If the arch uses custom Jump Table directives, don't calc relative to JT
728 if (!TAI->getJumpTableDirective())
729 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
730 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
732 printBasicBlockLabel(MBB, false, false, false);
739 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
740 unsigned AsmVariant, const char *ExtraCode){
741 // Does this asm operand have a single letter operand modifier?
742 if (ExtraCode && ExtraCode[0]) {
743 if (ExtraCode[1] != 0) return true; // Unknown modifier.
745 switch (ExtraCode[0]) {
746 default: return true; // Unknown modifier.
747 case 'c': // Don't print "$" before a global var name or constant.
748 case 'P': // Print a VFP double precision register.
749 printOperand(MI, OpNo);
752 if (TM.getTargetData()->isLittleEndian())
756 if (TM.getTargetData()->isBigEndian())
759 case 'H': // Write second word of DI / DF reference.
760 // Verify that this operand has two consecutive registers.
761 if (!MI->getOperand(OpNo).isRegister() ||
762 OpNo+1 == MI->getNumOperands() ||
763 !MI->getOperand(OpNo+1).isRegister())
765 ++OpNo; // Return the high-part.
769 printOperand(MI, OpNo);
773 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
776 int Opc = MI->getOpcode();
778 case ARM::CONSTPOOL_ENTRY:
779 if (!InCPMode && AFI->isThumbFunction()) {
785 if (InCPMode && AFI->isThumbFunction())
806 // Call the autogenerated instruction printer routines.
807 printInstruction(MI);
810 bool ARMAsmPrinter::doInitialization(Module &M) {
811 // Emit initial debug information.
812 // FIXME: Dwarf support.
813 //DW.BeginModule(&M);
815 bool Result = AsmPrinter::doInitialization(M);
817 // AsmPrinter::doInitialization should have done this analysis.
818 MMI = getAnalysisToUpdate<MachineModuleInfo>();
820 // FIXME: Dwarf support.
821 //DW.SetModuleInfo(MMI);
823 // Darwin wants symbols to be quoted if they have complex names.
824 if (Subtarget->isTargetDarwin())
825 Mang->setUseQuotes(true);
830 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
831 /// Don't print things like \n or \0.
832 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
833 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
839 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
840 const TargetData *TD = TM.getTargetData();
842 if (!GVar->hasInitializer()) // External global require no code
845 // Check to see if this is a special global used by LLVM, if so, emit it.
847 if (EmitSpecialLLVMGlobal(GVar)) {
848 if (Subtarget->isTargetDarwin() &&
849 TM.getRelocationModel() == Reloc::Static) {
850 if (GVar->getName() == "llvm.global_ctors")
851 O << ".reference .constructors_used\n";
852 else if (GVar->getName() == "llvm.global_dtors")
853 O << ".reference .destructors_used\n";
858 std::string SectionName = TAI->SectionForGlobal(GVar);
859 std::string name = Mang->getValueName(GVar);
860 Constant *C = GVar->getInitializer();
861 const Type *Type = C->getType();
862 unsigned Size = TD->getABITypeSize(Type);
863 unsigned Align = TD->getPreferredAlignmentLog(GVar);
865 printVisibility(name, GVar->getVisibility());
867 if (Subtarget->isTargetELF())
868 O << "\t.type " << name << ",%object\n";
870 SwitchToDataSection(SectionName.c_str());
872 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal()) {
873 // FIXME: This seems to be pretty darwin-specific
875 if (GVar->hasExternalLinkage()) {
876 if (const char *Directive = TAI->getZeroFillDirective()) {
877 O << "\t.globl\t" << name << "\n";
878 O << Directive << "__DATA, __common, " << name << ", "
879 << Size << ", " << Align << "\n";
884 if (GVar->hasInternalLinkage() || GVar->isWeakForLinker()) {
885 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
887 if (TAI->getLCOMMDirective() != NULL) {
888 if (PCRelGVs.count(GVar) || GVar->hasInternalLinkage()) {
889 O << TAI->getLCOMMDirective() << name << "," << Size;
890 if (Subtarget->isTargetDarwin())
893 O << TAI->getCOMMDirective() << name << "," << Size;
895 if (GVar->hasInternalLinkage())
896 O << "\t.local\t" << name << "\n";
897 O << TAI->getCOMMDirective() << name << "," << Size;
898 if (TAI->getCOMMDirectiveTakesAlignment())
899 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
901 O << "\t\t" << TAI->getCommentString() << " ";
902 PrintUnmangledNameSafely(GVar, O);
908 switch (GVar->getLinkage()) {
909 case GlobalValue::LinkOnceLinkage:
910 case GlobalValue::WeakLinkage:
911 if (Subtarget->isTargetDarwin()) {
912 O << "\t.globl " << name << "\n"
913 << "\t.weak_definition " << name << "\n";
915 O << "\t.weak " << name << "\n";
918 case GlobalValue::AppendingLinkage:
919 // FIXME: appending linkage variables should go into a section of
920 // their name or something. For now, just emit them as external.
921 case GlobalValue::ExternalLinkage:
922 O << "\t.globl " << name << "\n";
924 case GlobalValue::InternalLinkage:
927 assert(0 && "Unknown linkage type!");
931 EmitAlignment(Align, GVar);
932 O << name << ":\t\t\t\t" << TAI->getCommentString() << " ";
933 PrintUnmangledNameSafely(GVar, O);
935 if (TAI->hasDotTypeDotSizeDirective())
936 O << "\t.size " << name << ", " << Size << "\n";
938 // If the initializer is a extern weak symbol, remember to emit the weak
940 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
941 if (GV->hasExternalWeakLinkage())
942 ExtWeakSymbols.insert(GV);
944 EmitGlobalConstant(C);
949 bool ARMAsmPrinter::doFinalization(Module &M) {
950 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
952 printModuleLevelGV(I);
954 if (Subtarget->isTargetDarwin()) {
955 SwitchToDataSection("");
957 // Output stubs for dynamically-linked functions
959 for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
961 if (TM.getRelocationModel() == Reloc::PIC_)
962 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
965 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
969 O << "\t.code\t32\n";
972 printSuffixedName(p, "$stub");
974 O << "\t.indirect_symbol " << *i << "\n";
976 printSuffixedName(p, "$slp");
978 if (TM.getRelocationModel() == Reloc::PIC_) {
979 printSuffixedName(p, "$scv");
981 O << "\tadd ip, pc, ip\n";
983 O << "\tldr pc, [ip, #0]\n";
984 printSuffixedName(p, "$slp");
987 printSuffixedName(p, "$lazy_ptr");
988 if (TM.getRelocationModel() == Reloc::PIC_) {
990 printSuffixedName(p, "$scv");
994 SwitchToDataSection(".lazy_symbol_pointer", 0);
995 printSuffixedName(p, "$lazy_ptr");
997 O << "\t.indirect_symbol " << *i << "\n";
998 O << "\t.long\tdyld_stub_binding_helper\n";
1002 // Output non-lazy-pointers for external and common global variables.
1003 if (!GVNonLazyPtrs.empty())
1004 SwitchToDataSection(".non_lazy_symbol_pointer", 0);
1005 for (std::set<std::string>::iterator i = GVNonLazyPtrs.begin(),
1006 e = GVNonLazyPtrs.end(); i != e; ++i) {
1008 printSuffixedName(p, "$non_lazy_ptr");
1010 O << "\t.indirect_symbol " << *i << "\n";
1011 O << "\t.long\t0\n";
1014 // Emit initial debug information.
1015 // FIXME: Dwarf support.
1018 // Funny Darwin hack: This flag tells the linker that no global symbols
1019 // contain code that falls through to other global symbols (e.g. the obvious
1020 // implementation of multiple entry points). If this doesn't occur, the
1021 // linker can safely perform dead code stripping. Since LLVM never
1022 // generates code that does this, it is always safe to set.
1023 O << "\t.subsections_via_symbols\n";
1025 // Emit final debug information for ELF.
1026 // FIXME: Dwarf support.
1030 return AsmPrinter::doFinalization(M);
1033 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1034 /// assembly code for a MachineFunction to the given output stream,
1035 /// using the given target machine description. This should work
1036 /// regardless of whether the function is in SSA form.
1038 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1039 ARMTargetMachine &tm) {
1040 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
1044 static struct Register {
1046 ARMTargetMachine::registerAsmPrinter(createARMCodePrinterPass);