1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/CodeGen/AsmPrinter.h"
25 #include "llvm/CodeGen/DwarfWriter.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineJumpTableInfo.h"
29 #include "llvm/Target/TargetAsmInfo.h"
30 #include "llvm/Target/TargetData.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/ADT/StringSet.h"
36 #include "llvm/Support/Compiler.h"
37 #include "llvm/Support/Mangler.h"
38 #include "llvm/Support/MathExtras.h"
39 #include "llvm/Support/raw_ostream.h"
43 STATISTIC(EmittedInsts, "Number of machine instrs printed");
46 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
49 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
50 /// make the right decision when printing asm code for different targets.
51 const ARMSubtarget *Subtarget;
53 /// AFI - Keep a pointer to ARMFunctionInfo for the current
57 /// MCP - Keep a pointer to constantpool entries of the current
59 const MachineConstantPool *MCP;
61 /// We name each basic block in a Function with a unique number, so
62 /// that we can consistently refer to them later. This is cleared
63 /// at the beginning of each call to runOnMachineFunction().
65 typedef std::map<const Value *, unsigned> ValueMapTy;
66 ValueMapTy NumberForBB;
68 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
69 /// non-lazy-pointers for indirect access.
70 StringSet<> GVNonLazyPtrs;
72 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
73 /// visibility that require non-lazy-pointers for indirect access.
74 StringSet<> HiddenGVNonLazyPtrs;
76 /// FnStubs - Keeps the set of external function GlobalAddresses that the
77 /// asm printer should generate stubs for.
80 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
83 explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
84 const TargetAsmInfo *T, CodeGenOpt::Level OL,
86 : AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL),
88 Subtarget = &TM.getSubtarget<ARMSubtarget>();
91 virtual const char *getPassName() const {
92 return "ARM Assembly Printer";
95 void printOperand(const MachineInstr *MI, int opNum,
96 const char *Modifier = 0);
97 void printSOImmOperand(const MachineInstr *MI, int opNum);
98 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
99 void printSOOperand(const MachineInstr *MI, int OpNum);
100 void printSORegOperand(const MachineInstr *MI, int opNum);
101 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
102 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
103 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
104 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
105 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
106 const char *Modifier = 0);
107 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
108 const char *Modifier = 0);
109 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
110 const char *Modifier = 0);
111 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
112 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
114 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
115 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
116 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
117 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
118 void printPredicateOperand(const MachineInstr *MI, int opNum);
119 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
120 void printPCLabel(const MachineInstr *MI, int opNum);
121 void printRegisterList(const MachineInstr *MI, int opNum);
122 void printCPInstOperand(const MachineInstr *MI, int opNum,
123 const char *Modifier);
124 void printJTBlockOperand(const MachineInstr *MI, int opNum);
126 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
127 unsigned AsmVariant, const char *ExtraCode);
128 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
130 const char *ExtraCode);
132 void printModuleLevelGV(const GlobalVariable* GVar);
133 bool printInstruction(const MachineInstr *MI); // autogenerated.
134 void printMachineInstruction(const MachineInstr *MI);
135 bool runOnMachineFunction(MachineFunction &F);
136 bool doInitialization(Module &M);
137 bool doFinalization(Module &M);
139 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
141 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
142 printDataDirective(MCPV->getType());
144 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
145 GlobalValue *GV = ACPV->getGV();
146 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
148 Name += ACPV->getSymbol();
149 if (ACPV->isNonLazyPointer()) {
150 if (GV->hasHiddenVisibility())
151 HiddenGVNonLazyPtrs.insert(Name);
153 GVNonLazyPtrs.insert(Name);
154 printSuffixedName(Name, "$non_lazy_ptr");
155 } else if (ACPV->isStub()) {
156 FnStubs.insert(Name);
157 printSuffixedName(Name, "$stub");
160 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
161 if (ACPV->getPCAdjustment() != 0) {
162 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
163 << utostr(ACPV->getLabelId())
164 << "+" << (unsigned)ACPV->getPCAdjustment();
165 if (ACPV->mustAddCurrentAddress())
171 // If the constant pool value is a extern weak symbol, remember to emit
172 // the weak reference.
173 if (GV && GV->hasExternalWeakLinkage())
174 ExtWeakSymbols.insert(GV);
177 void getAnalysisUsage(AnalysisUsage &AU) const {
178 AsmPrinter::getAnalysisUsage(AU);
179 AU.setPreservesAll();
180 AU.addRequired<MachineModuleInfo>();
181 AU.addRequired<DwarfWriter>();
184 } // end of anonymous namespace
186 #include "ARMGenAsmWriter.inc"
188 /// runOnMachineFunction - This uses the printInstruction()
189 /// method to print assembly for each instruction.
191 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
194 AFI = MF.getInfo<ARMFunctionInfo>();
195 MCP = MF.getConstantPool();
197 SetupMachineFunction(MF);
200 // NOTE: we don't print out constant pools here, they are handled as
204 // Print out labels for the function.
205 const Function *F = MF.getFunction();
206 switch (F->getLinkage()) {
207 default: assert(0 && "Unknown linkage type!");
208 case Function::PrivateLinkage:
209 case Function::InternalLinkage:
210 SwitchToTextSection("\t.text", F);
212 case Function::ExternalLinkage:
213 SwitchToTextSection("\t.text", F);
214 O << "\t.globl\t" << CurrentFnName << "\n";
216 case Function::WeakAnyLinkage:
217 case Function::WeakODRLinkage:
218 case Function::LinkOnceAnyLinkage:
219 case Function::LinkOnceODRLinkage:
220 if (Subtarget->isTargetDarwin()) {
222 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
223 O << "\t.globl\t" << CurrentFnName << "\n";
224 O << "\t.weak_definition\t" << CurrentFnName << "\n";
226 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
231 printVisibility(CurrentFnName, F->getVisibility());
233 if (AFI->isThumbFunction()) {
234 EmitAlignment(1, F, AFI->getAlign());
235 O << "\t.code\t16\n";
236 O << "\t.thumb_func";
237 if (Subtarget->isTargetDarwin())
238 O << "\t" << CurrentFnName;
244 O << CurrentFnName << ":\n";
245 // Emit pre-function debug information.
246 DW->BeginFunction(&MF);
248 if (Subtarget->isTargetDarwin()) {
249 // If the function is empty, then we need to emit *something*. Otherwise,
250 // the function's label might be associated with something that it wasn't
251 // meant to be associated with. We emit a noop in this situation.
252 MachineFunction::iterator I = MF.begin();
254 if (++I == MF.end() && MF.front().empty())
258 // Print out code for the function.
259 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
261 // Print a label for the basic block.
262 if (I != MF.begin()) {
263 printBasicBlockLabel(I, true, true, VerboseAsm);
266 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
268 // Print the assembly for the instruction.
269 printMachineInstruction(II);
273 if (TAI->hasDotTypeDotSizeDirective())
274 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
276 // Emit post-function debug information.
277 DW->EndFunction(&MF);
284 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
285 const char *Modifier) {
286 const MachineOperand &MO = MI->getOperand(opNum);
287 switch (MO.getType()) {
288 case MachineOperand::MO_Register:
289 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
290 O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
292 assert(0 && "not implemented");
294 case MachineOperand::MO_Immediate: {
295 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
301 case MachineOperand::MO_MachineBasicBlock:
302 printBasicBlockLabel(MO.getMBB());
304 case MachineOperand::MO_GlobalAddress: {
305 bool isCallOp = Modifier && !strcmp(Modifier, "call");
306 GlobalValue *GV = MO.getGlobal();
307 std::string Name = Mang->getValueName(GV);
308 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
309 GV->hasLinkOnceLinkage());
310 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
311 TM.getRelocationModel() != Reloc::Static) {
312 printSuffixedName(Name, "$stub");
313 FnStubs.insert(Name);
317 printOffset(MO.getOffset());
319 if (isCallOp && Subtarget->isTargetELF() &&
320 TM.getRelocationModel() == Reloc::PIC_)
322 if (GV->hasExternalWeakLinkage())
323 ExtWeakSymbols.insert(GV);
326 case MachineOperand::MO_ExternalSymbol: {
327 bool isCallOp = Modifier && !strcmp(Modifier, "call");
328 std::string Name(TAI->getGlobalPrefix());
329 Name += MO.getSymbolName();
330 if (isCallOp && Subtarget->isTargetDarwin() &&
331 TM.getRelocationModel() != Reloc::Static) {
332 printSuffixedName(Name, "$stub");
333 FnStubs.insert(Name);
336 if (isCallOp && Subtarget->isTargetELF() &&
337 TM.getRelocationModel() == Reloc::PIC_)
341 case MachineOperand::MO_ConstantPoolIndex:
342 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
343 << '_' << MO.getIndex();
345 case MachineOperand::MO_JumpTableIndex:
346 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
347 << '_' << MO.getIndex();
350 O << "<unknown operand type>"; abort (); break;
354 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
355 const TargetAsmInfo *TAI) {
356 assert(V < (1 << 12) && "Not a valid so_imm value!");
357 unsigned Imm = ARM_AM::getSOImmValImm(V);
358 unsigned Rot = ARM_AM::getSOImmValRot(V);
360 // Print low-level immediate formation info, per
361 // A5.1.3: "Data-processing operands - Immediate".
363 O << "#" << Imm << ", " << Rot;
364 // Pretty printed version.
366 O << ' ' << TAI->getCommentString()
367 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
373 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
374 /// immediate in bits 0-7.
375 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
376 const MachineOperand &MO = MI->getOperand(OpNum);
377 assert(MO.isImm() && "Not a valid so_imm value!");
378 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
381 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
382 /// followed by an 'orr' to materialize.
383 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
384 const MachineOperand &MO = MI->getOperand(OpNum);
385 assert(MO.isImm() && "Not a valid so_imm value!");
386 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
387 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
388 printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
390 printPredicateOperand(MI, 2);
396 printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
399 // Constant shifts so_reg is a 3-operand unit corresponding to register forms of
400 // the A5.1 "Addressing Mode 1 - Data-processing operands" forms. This
403 // REG IMM, SH_OPC - e.g. R5, LSL #3
404 void ARMAsmPrinter::printSOOperand(const MachineInstr *MI, int OpNum) {
405 const MachineOperand &MO1 = MI->getOperand(OpNum);
406 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
408 unsigned Reg = MO1.getReg();
409 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
410 O << TM.getRegisterInfo()->getAsmName(Reg);
412 // Print the shift opc.
414 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
417 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
418 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
421 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
422 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
424 // REG REG 0,SH_OPC - e.g. R5, ROR R3
425 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
426 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
427 const MachineOperand &MO1 = MI->getOperand(Op);
428 const MachineOperand &MO2 = MI->getOperand(Op+1);
429 const MachineOperand &MO3 = MI->getOperand(Op+2);
431 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
432 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
434 // Print the shift opc.
436 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
440 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
441 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
442 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
444 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
448 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
449 const MachineOperand &MO1 = MI->getOperand(Op);
450 const MachineOperand &MO2 = MI->getOperand(Op+1);
451 const MachineOperand &MO3 = MI->getOperand(Op+2);
453 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
454 printOperand(MI, Op);
458 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
461 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
463 << (char)ARM_AM::getAM2Op(MO3.getImm())
464 << ARM_AM::getAM2Offset(MO3.getImm());
470 << (char)ARM_AM::getAM2Op(MO3.getImm())
471 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
473 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
475 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
480 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
481 const MachineOperand &MO1 = MI->getOperand(Op);
482 const MachineOperand &MO2 = MI->getOperand(Op+1);
485 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
486 assert(ImmOffs && "Malformed indexed load / store!");
488 << (char)ARM_AM::getAM2Op(MO2.getImm())
493 O << (char)ARM_AM::getAM2Op(MO2.getImm())
494 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
496 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
498 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
502 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
503 const MachineOperand &MO1 = MI->getOperand(Op);
504 const MachineOperand &MO2 = MI->getOperand(Op+1);
505 const MachineOperand &MO3 = MI->getOperand(Op+2);
507 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
508 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
512 << (char)ARM_AM::getAM3Op(MO3.getImm())
513 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
518 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
520 << (char)ARM_AM::getAM3Op(MO3.getImm())
525 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
526 const MachineOperand &MO1 = MI->getOperand(Op);
527 const MachineOperand &MO2 = MI->getOperand(Op+1);
530 O << (char)ARM_AM::getAM3Op(MO2.getImm())
531 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
535 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
536 assert(ImmOffs && "Malformed indexed load / store!");
538 << (char)ARM_AM::getAM3Op(MO2.getImm())
542 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
543 const char *Modifier) {
544 const MachineOperand &MO1 = MI->getOperand(Op);
545 const MachineOperand &MO2 = MI->getOperand(Op+1);
546 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
547 if (Modifier && strcmp(Modifier, "submode") == 0) {
548 if (MO1.getReg() == ARM::SP) {
549 bool isLDM = (MI->getOpcode() == ARM::LDM ||
550 MI->getOpcode() == ARM::LDM_RET);
551 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
553 O << ARM_AM::getAMSubModeStr(Mode);
555 printOperand(MI, Op);
556 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
561 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
562 const char *Modifier) {
563 const MachineOperand &MO1 = MI->getOperand(Op);
564 const MachineOperand &MO2 = MI->getOperand(Op+1);
566 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
567 printOperand(MI, Op);
571 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
573 if (Modifier && strcmp(Modifier, "submode") == 0) {
574 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
575 if (MO1.getReg() == ARM::SP) {
576 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
577 MI->getOpcode() == ARM::FLDMS);
578 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
580 O << ARM_AM::getAMSubModeStr(Mode);
582 } else if (Modifier && strcmp(Modifier, "base") == 0) {
583 // Used for FSTM{D|S} and LSTM{D|S} operations.
584 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
585 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
590 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
592 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
594 << (char)ARM_AM::getAM5Op(MO2.getImm())
600 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
601 const char *Modifier) {
602 if (Modifier && strcmp(Modifier, "label") == 0) {
603 printPCLabel(MI, Op+1);
607 const MachineOperand &MO1 = MI->getOperand(Op);
608 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
609 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
613 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
614 const MachineOperand &MO1 = MI->getOperand(Op);
615 const MachineOperand &MO2 = MI->getOperand(Op+1);
616 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
617 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
621 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
623 const MachineOperand &MO1 = MI->getOperand(Op);
624 const MachineOperand &MO2 = MI->getOperand(Op+1);
625 const MachineOperand &MO3 = MI->getOperand(Op+2);
627 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
628 printOperand(MI, Op);
632 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
634 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
635 else if (unsigned ImmOffs = MO2.getImm()) {
636 O << ", #" << ImmOffs;
644 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
645 printThumbAddrModeRI5Operand(MI, Op, 1);
648 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
649 printThumbAddrModeRI5Operand(MI, Op, 2);
652 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
653 printThumbAddrModeRI5Operand(MI, Op, 4);
656 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
657 const MachineOperand &MO1 = MI->getOperand(Op);
658 const MachineOperand &MO2 = MI->getOperand(Op+1);
659 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
660 if (unsigned ImmOffs = MO2.getImm())
661 O << ", #" << ImmOffs << " * 4";
665 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
666 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
668 O << ARMCondCodeToString(CC);
671 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
672 unsigned Reg = MI->getOperand(opNum).getReg();
674 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
679 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
680 int Id = (int)MI->getOperand(opNum).getImm();
681 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
684 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
686 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
688 if (i != e-1) O << ", ";
693 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
694 const char *Modifier) {
695 assert(Modifier && "This operand only works with a modifier!");
696 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
698 if (!strcmp(Modifier, "label")) {
699 unsigned ID = MI->getOperand(OpNo).getImm();
700 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
701 << '_' << ID << ":\n";
703 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
704 unsigned CPI = MI->getOperand(OpNo).getIndex();
706 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
708 if (MCPE.isMachineConstantPoolEntry()) {
709 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
711 EmitGlobalConstant(MCPE.Val.ConstVal);
712 // remember to emit the weak reference
713 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
714 if (GV->hasExternalWeakLinkage())
715 ExtWeakSymbols.insert(GV);
720 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
721 const MachineOperand &MO1 = MI->getOperand(OpNo);
722 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
723 unsigned JTI = MO1.getIndex();
724 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
725 << '_' << JTI << '_' << MO2.getImm() << ":\n";
727 const char *JTEntryDirective = TAI->getJumpTableDirective();
728 if (!JTEntryDirective)
729 JTEntryDirective = TAI->getData32bitsDirective();
731 const MachineFunction *MF = MI->getParent()->getParent();
732 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
733 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
734 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
735 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
736 std::set<MachineBasicBlock*> JTSets;
737 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
738 MachineBasicBlock *MBB = JTBBs[i];
739 if (UseSet && JTSets.insert(MBB).second)
740 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
742 O << JTEntryDirective << ' ';
744 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
745 << '_' << JTI << '_' << MO2.getImm()
746 << "_set_" << MBB->getNumber();
747 else if (TM.getRelocationModel() == Reloc::PIC_) {
748 printBasicBlockLabel(MBB, false, false, false);
749 // If the arch uses custom Jump Table directives, don't calc relative to JT
750 if (!TAI->getJumpTableDirective())
751 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
752 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
754 printBasicBlockLabel(MBB, false, false, false);
761 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
762 unsigned AsmVariant, const char *ExtraCode){
763 // Does this asm operand have a single letter operand modifier?
764 if (ExtraCode && ExtraCode[0]) {
765 if (ExtraCode[1] != 0) return true; // Unknown modifier.
767 switch (ExtraCode[0]) {
768 default: return true; // Unknown modifier.
769 case 'a': // Don't print "#" before a global var name or constant.
770 case 'c': // Don't print "$" before a global var name or constant.
771 printOperand(MI, OpNo, "no_hash");
773 case 'P': // Print a VFP double precision register.
774 printOperand(MI, OpNo);
777 if (TM.getTargetData()->isLittleEndian())
781 if (TM.getTargetData()->isBigEndian())
784 case 'H': // Write second word of DI / DF reference.
785 // Verify that this operand has two consecutive registers.
786 if (!MI->getOperand(OpNo).isReg() ||
787 OpNo+1 == MI->getNumOperands() ||
788 !MI->getOperand(OpNo+1).isReg())
790 ++OpNo; // Return the high-part.
794 printOperand(MI, OpNo);
798 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
799 unsigned OpNo, unsigned AsmVariant,
800 const char *ExtraCode) {
801 if (ExtraCode && ExtraCode[0])
802 return true; // Unknown modifier.
803 printAddrMode2Operand(MI, OpNo);
807 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
810 int Opc = MI->getOpcode();
812 case ARM::CONSTPOOL_ENTRY:
813 if (!InCPMode && AFI->isThumbFunction()) {
819 if (InCPMode && AFI->isThumbFunction())
823 // Call the autogenerated instruction printer routines.
824 printInstruction(MI);
827 bool ARMAsmPrinter::doInitialization(Module &M) {
829 bool Result = AsmPrinter::doInitialization(M);
830 DW = getAnalysisIfAvailable<DwarfWriter>();
832 // Thumb-2 instructions are supported only in unified assembler syntax mode.
833 if (Subtarget->hasThumb2())
834 O << "\t.syntax unified\n";
836 // Emit ARM Build Attributes
837 if (Subtarget->isTargetELF()) {
839 std::string CPUString = Subtarget->getCPUString();
840 if (CPUString != "generic")
841 O << "\t.cpu " << CPUString << '\n';
843 // FIXME: Emit FPU type
844 if (Subtarget->hasVFP2())
845 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
847 // Signal various FP modes.
849 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
850 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
852 if (FiniteOnlyFPMath())
853 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
855 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
857 // 8-bytes alignment stuff.
858 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
859 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
861 // FIXME: Should we signal R9 usage?
867 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
868 /// Don't print things like \\n or \\0.
869 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
870 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
876 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
877 const TargetData *TD = TM.getTargetData();
879 if (!GVar->hasInitializer()) // External global require no code
882 // Check to see if this is a special global used by LLVM, if so, emit it.
884 if (EmitSpecialLLVMGlobal(GVar)) {
885 if (Subtarget->isTargetDarwin() &&
886 TM.getRelocationModel() == Reloc::Static) {
887 if (GVar->getName() == "llvm.global_ctors")
888 O << ".reference .constructors_used\n";
889 else if (GVar->getName() == "llvm.global_dtors")
890 O << ".reference .destructors_used\n";
895 std::string name = Mang->getValueName(GVar);
896 Constant *C = GVar->getInitializer();
897 const Type *Type = C->getType();
898 unsigned Size = TD->getTypeAllocSize(Type);
899 unsigned Align = TD->getPreferredAlignmentLog(GVar);
900 bool isDarwin = Subtarget->isTargetDarwin();
902 printVisibility(name, GVar->getVisibility());
904 if (Subtarget->isTargetELF())
905 O << "\t.type " << name << ",%object\n";
907 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
909 TAI->SectionKindForGlobal(GVar) == SectionKind::RODataMergeStr)) {
910 // FIXME: This seems to be pretty darwin-specific
912 if (GVar->hasExternalLinkage()) {
913 SwitchToSection(TAI->SectionForGlobal(GVar));
914 if (const char *Directive = TAI->getZeroFillDirective()) {
915 O << "\t.globl\t" << name << "\n";
916 O << Directive << "__DATA, __common, " << name << ", "
917 << Size << ", " << Align << "\n";
922 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
923 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
926 if (GVar->hasLocalLinkage()) {
927 O << TAI->getLCOMMDirective() << name << "," << Size
929 } else if (GVar->hasCommonLinkage()) {
930 O << TAI->getCOMMDirective() << name << "," << Size
933 SwitchToSection(TAI->SectionForGlobal(GVar));
934 O << "\t.globl " << name << '\n'
935 << TAI->getWeakDefDirective() << name << '\n';
936 EmitAlignment(Align, GVar);
939 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
940 PrintUnmangledNameSafely(GVar, O);
943 EmitGlobalConstant(C);
946 } else if (TAI->getLCOMMDirective() != NULL) {
947 if (GVar->hasLocalLinkage()) {
948 O << TAI->getLCOMMDirective() << name << "," << Size;
950 O << TAI->getCOMMDirective() << name << "," << Size;
951 if (TAI->getCOMMDirectiveTakesAlignment())
952 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
955 SwitchToSection(TAI->SectionForGlobal(GVar));
956 if (GVar->hasLocalLinkage())
957 O << "\t.local\t" << name << "\n";
958 O << TAI->getCOMMDirective() << name << "," << Size;
959 if (TAI->getCOMMDirectiveTakesAlignment())
960 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
963 O << "\t\t" << TAI->getCommentString() << " ";
964 PrintUnmangledNameSafely(GVar, O);
971 SwitchToSection(TAI->SectionForGlobal(GVar));
972 switch (GVar->getLinkage()) {
973 case GlobalValue::CommonLinkage:
974 case GlobalValue::LinkOnceAnyLinkage:
975 case GlobalValue::LinkOnceODRLinkage:
976 case GlobalValue::WeakAnyLinkage:
977 case GlobalValue::WeakODRLinkage:
979 O << "\t.globl " << name << "\n"
980 << "\t.weak_definition " << name << "\n";
982 O << "\t.weak " << name << "\n";
985 case GlobalValue::AppendingLinkage:
986 // FIXME: appending linkage variables should go into a section of
987 // their name or something. For now, just emit them as external.
988 case GlobalValue::ExternalLinkage:
989 O << "\t.globl " << name << "\n";
991 case GlobalValue::PrivateLinkage:
992 case GlobalValue::InternalLinkage:
995 assert(0 && "Unknown linkage type!");
999 EmitAlignment(Align, GVar);
1002 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1003 PrintUnmangledNameSafely(GVar, O);
1006 if (TAI->hasDotTypeDotSizeDirective())
1007 O << "\t.size " << name << ", " << Size << "\n";
1009 // If the initializer is a extern weak symbol, remember to emit the weak
1011 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
1012 if (GV->hasExternalWeakLinkage())
1013 ExtWeakSymbols.insert(GV);
1015 EmitGlobalConstant(C);
1020 bool ARMAsmPrinter::doFinalization(Module &M) {
1021 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
1023 printModuleLevelGV(I);
1025 if (Subtarget->isTargetDarwin()) {
1026 SwitchToDataSection("");
1028 // Output stubs for dynamically-linked functions
1029 for (StringSet<>::iterator i = FnStubs.begin(), e = FnStubs.end();
1031 if (TM.getRelocationModel() == Reloc::PIC_)
1032 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1035 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1039 O << "\t.code\t32\n";
1041 const char *p = i->getKeyData();
1042 printSuffixedName(p, "$stub");
1044 O << "\t.indirect_symbol " << p << "\n";
1046 printSuffixedName(p, "$slp");
1048 if (TM.getRelocationModel() == Reloc::PIC_) {
1049 printSuffixedName(p, "$scv");
1051 O << "\tadd ip, pc, ip\n";
1053 O << "\tldr pc, [ip, #0]\n";
1054 printSuffixedName(p, "$slp");
1057 printSuffixedName(p, "$lazy_ptr");
1058 if (TM.getRelocationModel() == Reloc::PIC_) {
1060 printSuffixedName(p, "$scv");
1064 SwitchToDataSection(".lazy_symbol_pointer", 0);
1065 printSuffixedName(p, "$lazy_ptr");
1067 O << "\t.indirect_symbol " << p << "\n";
1068 O << "\t.long\tdyld_stub_binding_helper\n";
1072 // Output non-lazy-pointers for external and common global variables.
1073 if (!GVNonLazyPtrs.empty()) {
1074 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1075 for (StringSet<>::iterator i = GVNonLazyPtrs.begin(),
1076 e = GVNonLazyPtrs.end(); i != e; ++i) {
1077 const char *p = i->getKeyData();
1078 printSuffixedName(p, "$non_lazy_ptr");
1080 O << "\t.indirect_symbol " << p << "\n";
1081 O << "\t.long\t0\n";
1085 if (!HiddenGVNonLazyPtrs.empty()) {
1086 SwitchToSection(TAI->getDataSection());
1087 for (StringSet<>::iterator i = HiddenGVNonLazyPtrs.begin(),
1088 e = HiddenGVNonLazyPtrs.end(); i != e; ++i) {
1089 const char *p = i->getKeyData();
1091 printSuffixedName(p, "$non_lazy_ptr");
1093 O << "\t.long " << p << "\n";
1098 // Emit initial debug information.
1101 // Funny Darwin hack: This flag tells the linker that no global symbols
1102 // contain code that falls through to other global symbols (e.g. the obvious
1103 // implementation of multiple entry points). If this doesn't occur, the
1104 // linker can safely perform dead code stripping. Since LLVM never
1105 // generates code that does this, it is always safe to set.
1106 O << "\t.subsections_via_symbols\n";
1108 // Emit final debug information for ELF.
1112 return AsmPrinter::doFinalization(M);
1115 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1116 /// assembly code for a MachineFunction to the given output stream,
1117 /// using the given target machine description. This should work
1118 /// regardless of whether the function is in SSA form.
1120 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1121 ARMTargetMachine &tm,
1122 CodeGenOpt::Level OptLevel,
1124 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
1128 static struct Register {
1130 ARMTargetMachine::registerAsmPrinter(createARMCodePrinterPass);
1135 // Force static initialization when called from
1136 // llvm/InitializeAllAsmPrinters.h
1138 void InitializeARMAsmPrinter() { }