1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/MDNode.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/DwarfWriter.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/CodeGen/MachineFunctionPass.h"
29 #include "llvm/CodeGen/MachineJumpTableInfo.h"
30 #include "llvm/Target/TargetAsmInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Target/TargetOptions.h"
34 #include "llvm/ADT/Statistic.h"
35 #include "llvm/ADT/StringExtras.h"
36 #include "llvm/ADT/StringSet.h"
37 #include "llvm/Support/Compiler.h"
38 #include "llvm/Support/Mangler.h"
39 #include "llvm/Support/MathExtras.h"
40 #include "llvm/Support/raw_ostream.h"
44 STATISTIC(EmittedInsts, "Number of machine instrs printed");
47 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
50 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
51 /// make the right decision when printing asm code for different targets.
52 const ARMSubtarget *Subtarget;
54 /// AFI - Keep a pointer to ARMFunctionInfo for the current
58 /// MCP - Keep a pointer to constantpool entries of the current
60 const MachineConstantPool *MCP;
62 /// We name each basic block in a Function with a unique number, so
63 /// that we can consistently refer to them later. This is cleared
64 /// at the beginning of each call to runOnMachineFunction().
66 typedef std::map<const Value *, unsigned> ValueMapTy;
67 ValueMapTy NumberForBB;
69 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
70 /// non-lazy-pointers for indirect access.
71 StringSet<> GVNonLazyPtrs;
73 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
74 /// visibility that require non-lazy-pointers for indirect access.
75 StringSet<> HiddenGVNonLazyPtrs;
77 /// FnStubs - Keeps the set of external function GlobalAddresses that the
78 /// asm printer should generate stubs for.
81 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
84 explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
85 const TargetAsmInfo *T, bool V)
86 : AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL),
88 Subtarget = &TM.getSubtarget<ARMSubtarget>();
91 virtual const char *getPassName() const {
92 return "ARM Assembly Printer";
95 void printOperand(const MachineInstr *MI, int OpNum,
96 const char *Modifier = 0);
97 void printSOImmOperand(const MachineInstr *MI, int OpNum);
98 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum);
99 void printSORegOperand(const MachineInstr *MI, int OpNum);
100 void printAddrMode2Operand(const MachineInstr *MI, int OpNum);
101 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum);
102 void printAddrMode3Operand(const MachineInstr *MI, int OpNum);
103 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum);
104 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,
105 const char *Modifier = 0);
106 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,
107 const char *Modifier = 0);
108 void printAddrMode6Operand(const MachineInstr *MI, int OpNum);
109 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
110 const char *Modifier = 0);
111 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
113 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
114 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
116 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum);
117 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum);
118 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum);
119 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum);
121 void printT2SOImmOperand(const MachineInstr *MI, int OpNum);
122 void printT2SOOperand(const MachineInstr *MI, int OpNum);
123 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum);
124 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
125 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
127 void printPredicateOperand(const MachineInstr *MI, int OpNum);
128 void printSBitModifierOperand(const MachineInstr *MI, int OpNum);
129 void printPCLabel(const MachineInstr *MI, int OpNum);
130 void printRegisterList(const MachineInstr *MI, int OpNum);
131 void printCPInstOperand(const MachineInstr *MI, int OpNum,
132 const char *Modifier);
133 void printJTBlockOperand(const MachineInstr *MI, int OpNum);
135 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
136 unsigned AsmVariant, const char *ExtraCode);
137 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
139 const char *ExtraCode);
141 void printModuleLevelGV(const GlobalVariable* GVar);
142 bool printInstruction(const MachineInstr *MI); // autogenerated.
143 void printMachineInstruction(const MachineInstr *MI);
144 bool runOnMachineFunction(MachineFunction &F);
145 bool doInitialization(Module &M);
146 bool doFinalization(Module &M);
148 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
150 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
151 printDataDirective(MCPV->getType());
153 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
154 GlobalValue *GV = ACPV->getGV();
155 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
157 Name += ACPV->getSymbol();
158 if (ACPV->isNonLazyPointer()) {
159 if (GV->hasHiddenVisibility())
160 HiddenGVNonLazyPtrs.insert(Name);
162 GVNonLazyPtrs.insert(Name);
163 printSuffixedName(Name, "$non_lazy_ptr");
164 } else if (ACPV->isStub()) {
165 FnStubs.insert(Name);
166 printSuffixedName(Name, "$stub");
169 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
170 if (ACPV->getPCAdjustment() != 0) {
171 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
172 << utostr(ACPV->getLabelId())
173 << "+" << (unsigned)ACPV->getPCAdjustment();
174 if (ACPV->mustAddCurrentAddress())
181 void getAnalysisUsage(AnalysisUsage &AU) const {
182 AsmPrinter::getAnalysisUsage(AU);
183 AU.setPreservesAll();
184 AU.addRequired<MachineModuleInfo>();
185 AU.addRequired<DwarfWriter>();
188 } // end of anonymous namespace
190 #include "ARMGenAsmWriter.inc"
192 /// runOnMachineFunction - This uses the printInstruction()
193 /// method to print assembly for each instruction.
195 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
198 AFI = MF.getInfo<ARMFunctionInfo>();
199 MCP = MF.getConstantPool();
201 SetupMachineFunction(MF);
204 // NOTE: we don't print out constant pools here, they are handled as
208 // Print out labels for the function.
209 const Function *F = MF.getFunction();
210 switch (F->getLinkage()) {
211 default: assert(0 && "Unknown linkage type!");
212 case Function::PrivateLinkage:
213 case Function::InternalLinkage:
214 SwitchToTextSection("\t.text", F);
216 case Function::ExternalLinkage:
217 SwitchToTextSection("\t.text", F);
218 O << "\t.globl\t" << CurrentFnName << "\n";
220 case Function::WeakAnyLinkage:
221 case Function::WeakODRLinkage:
222 case Function::LinkOnceAnyLinkage:
223 case Function::LinkOnceODRLinkage:
224 if (Subtarget->isTargetDarwin()) {
226 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
227 O << "\t.globl\t" << CurrentFnName << "\n";
228 O << "\t.weak_definition\t" << CurrentFnName << "\n";
230 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
235 printVisibility(CurrentFnName, F->getVisibility());
237 if (AFI->isThumbFunction()) {
238 EmitAlignment(MF.getAlignment(), F, AFI->getAlign());
239 O << "\t.code\t16\n";
240 O << "\t.thumb_func";
241 if (Subtarget->isTargetDarwin())
242 O << "\t" << CurrentFnName;
246 EmitAlignment(MF.getAlignment(), F);
249 O << CurrentFnName << ":\n";
250 // Emit pre-function debug information.
251 DW->BeginFunction(&MF);
253 if (Subtarget->isTargetDarwin()) {
254 // If the function is empty, then we need to emit *something*. Otherwise,
255 // the function's label might be associated with something that it wasn't
256 // meant to be associated with. We emit a noop in this situation.
257 MachineFunction::iterator I = MF.begin();
259 if (++I == MF.end() && MF.front().empty())
263 // Print out code for the function.
264 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
266 // Print a label for the basic block.
267 if (I != MF.begin()) {
268 printBasicBlockLabel(I, true, true, VerboseAsm);
271 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
273 // Print the assembly for the instruction.
274 printMachineInstruction(II);
278 if (TAI->hasDotTypeDotSizeDirective())
279 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
281 // Emit post-function debug information.
282 DW->EndFunction(&MF);
289 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
290 const char *Modifier) {
291 const MachineOperand &MO = MI->getOperand(OpNum);
292 switch (MO.getType()) {
293 case MachineOperand::MO_Register: {
294 unsigned Reg = MO.getReg();
295 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
296 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
297 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
298 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
300 << TRI->getAsmName(DRegLo) << "-" << TRI->getAsmName(DRegHi)
303 O << TRI->getAsmName(Reg);
306 assert(0 && "not implemented");
309 case MachineOperand::MO_Immediate: {
310 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
316 case MachineOperand::MO_MachineBasicBlock:
317 printBasicBlockLabel(MO.getMBB());
319 case MachineOperand::MO_GlobalAddress: {
320 bool isCallOp = Modifier && !strcmp(Modifier, "call");
321 GlobalValue *GV = MO.getGlobal();
322 std::string Name = Mang->getValueName(GV);
323 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
324 GV->hasLinkOnceLinkage());
325 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
326 TM.getRelocationModel() != Reloc::Static) {
327 printSuffixedName(Name, "$stub");
328 FnStubs.insert(Name);
332 printOffset(MO.getOffset());
334 if (isCallOp && Subtarget->isTargetELF() &&
335 TM.getRelocationModel() == Reloc::PIC_)
339 case MachineOperand::MO_ExternalSymbol: {
340 bool isCallOp = Modifier && !strcmp(Modifier, "call");
341 std::string Name(TAI->getGlobalPrefix());
342 Name += MO.getSymbolName();
343 if (isCallOp && Subtarget->isTargetDarwin() &&
344 TM.getRelocationModel() != Reloc::Static) {
345 printSuffixedName(Name, "$stub");
346 FnStubs.insert(Name);
349 if (isCallOp && Subtarget->isTargetELF() &&
350 TM.getRelocationModel() == Reloc::PIC_)
354 case MachineOperand::MO_ConstantPoolIndex:
355 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
356 << '_' << MO.getIndex();
358 case MachineOperand::MO_JumpTableIndex:
359 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
360 << '_' << MO.getIndex();
363 O << "<unknown operand type>"; abort (); break;
367 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
368 const TargetAsmInfo *TAI) {
369 assert(V < (1 << 12) && "Not a valid so_imm value!");
370 unsigned Imm = ARM_AM::getSOImmValImm(V);
371 unsigned Rot = ARM_AM::getSOImmValRot(V);
373 // Print low-level immediate formation info, per
374 // A5.1.3: "Data-processing operands - Immediate".
376 O << "#" << Imm << ", " << Rot;
377 // Pretty printed version.
379 O << ' ' << TAI->getCommentString()
380 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
386 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
387 /// immediate in bits 0-7.
388 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
389 const MachineOperand &MO = MI->getOperand(OpNum);
390 assert(MO.isImm() && "Not a valid so_imm value!");
391 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
394 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
395 /// followed by an 'orr' to materialize.
396 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
397 const MachineOperand &MO = MI->getOperand(OpNum);
398 assert(MO.isImm() && "Not a valid so_imm value!");
399 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
400 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
401 printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
403 printPredicateOperand(MI, 2);
409 printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
412 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
413 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
415 // REG REG 0,SH_OPC - e.g. R5, ROR R3
416 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
417 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
418 const MachineOperand &MO1 = MI->getOperand(Op);
419 const MachineOperand &MO2 = MI->getOperand(Op+1);
420 const MachineOperand &MO3 = MI->getOperand(Op+2);
422 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
423 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
425 // Print the shift opc.
427 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
431 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
432 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
433 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
435 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
439 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
440 const MachineOperand &MO1 = MI->getOperand(Op);
441 const MachineOperand &MO2 = MI->getOperand(Op+1);
442 const MachineOperand &MO3 = MI->getOperand(Op+2);
444 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
445 printOperand(MI, Op);
449 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
452 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
454 << (char)ARM_AM::getAM2Op(MO3.getImm())
455 << ARM_AM::getAM2Offset(MO3.getImm());
461 << (char)ARM_AM::getAM2Op(MO3.getImm())
462 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
464 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
466 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
471 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
472 const MachineOperand &MO1 = MI->getOperand(Op);
473 const MachineOperand &MO2 = MI->getOperand(Op+1);
476 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
477 assert(ImmOffs && "Malformed indexed load / store!");
479 << (char)ARM_AM::getAM2Op(MO2.getImm())
484 O << (char)ARM_AM::getAM2Op(MO2.getImm())
485 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
487 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
489 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
493 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
494 const MachineOperand &MO1 = MI->getOperand(Op);
495 const MachineOperand &MO2 = MI->getOperand(Op+1);
496 const MachineOperand &MO3 = MI->getOperand(Op+2);
498 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
499 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
503 << (char)ARM_AM::getAM3Op(MO3.getImm())
504 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
509 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
511 << (char)ARM_AM::getAM3Op(MO3.getImm())
516 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
517 const MachineOperand &MO1 = MI->getOperand(Op);
518 const MachineOperand &MO2 = MI->getOperand(Op+1);
521 O << (char)ARM_AM::getAM3Op(MO2.getImm())
522 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
526 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
527 assert(ImmOffs && "Malformed indexed load / store!");
529 << (char)ARM_AM::getAM3Op(MO2.getImm())
533 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
534 const char *Modifier) {
535 const MachineOperand &MO1 = MI->getOperand(Op);
536 const MachineOperand &MO2 = MI->getOperand(Op+1);
537 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
538 if (Modifier && strcmp(Modifier, "submode") == 0) {
539 if (MO1.getReg() == ARM::SP) {
540 bool isLDM = (MI->getOpcode() == ARM::LDM ||
541 MI->getOpcode() == ARM::LDM_RET);
542 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
544 O << ARM_AM::getAMSubModeStr(Mode);
546 printOperand(MI, Op);
547 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
552 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
553 const char *Modifier) {
554 const MachineOperand &MO1 = MI->getOperand(Op);
555 const MachineOperand &MO2 = MI->getOperand(Op+1);
557 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
558 printOperand(MI, Op);
562 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
564 if (Modifier && strcmp(Modifier, "submode") == 0) {
565 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
566 if (MO1.getReg() == ARM::SP) {
567 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
568 MI->getOpcode() == ARM::FLDMS);
569 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
571 O << ARM_AM::getAMSubModeStr(Mode);
573 } else if (Modifier && strcmp(Modifier, "base") == 0) {
574 // Used for FSTM{D|S} and LSTM{D|S} operations.
575 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
576 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
581 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
583 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
585 << (char)ARM_AM::getAM5Op(MO2.getImm())
591 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) {
592 const MachineOperand &MO1 = MI->getOperand(Op);
593 const MachineOperand &MO2 = MI->getOperand(Op+1);
594 const MachineOperand &MO3 = MI->getOperand(Op+2);
596 // FIXME: No support yet for specifying alignment.
597 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
599 if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
600 if (MO2.getReg() == 0)
603 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
607 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
608 const char *Modifier) {
609 if (Modifier && strcmp(Modifier, "label") == 0) {
610 printPCLabel(MI, Op+1);
614 const MachineOperand &MO1 = MI->getOperand(Op);
615 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
616 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
620 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
621 const MachineOperand &MO = MI->getOperand(Op);
622 uint32_t v = ~MO.getImm();
623 int32_t lsb = CountTrailingZeros_32(v);
624 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
625 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
626 O << "#" << lsb << ", #" << width;
629 //===--------------------------------------------------------------------===//
632 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
633 const MachineOperand &MO1 = MI->getOperand(Op);
634 const MachineOperand &MO2 = MI->getOperand(Op+1);
635 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
636 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
640 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
642 const MachineOperand &MO1 = MI->getOperand(Op);
643 const MachineOperand &MO2 = MI->getOperand(Op+1);
644 const MachineOperand &MO3 = MI->getOperand(Op+2);
646 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
647 printOperand(MI, Op);
651 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
653 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
654 else if (unsigned ImmOffs = MO2.getImm()) {
655 O << ", #" << ImmOffs;
663 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
664 printThumbAddrModeRI5Operand(MI, Op, 1);
667 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
668 printThumbAddrModeRI5Operand(MI, Op, 2);
671 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
672 printThumbAddrModeRI5Operand(MI, Op, 4);
675 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
676 const MachineOperand &MO1 = MI->getOperand(Op);
677 const MachineOperand &MO2 = MI->getOperand(Op+1);
678 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
679 if (unsigned ImmOffs = MO2.getImm())
680 O << ", #" << ImmOffs << " * 4";
684 //===--------------------------------------------------------------------===//
686 /// printT2SOImmOperand - T2SOImm is:
687 /// 1. a 4-bit splat control value and 8 bit immediate value
688 /// 2. a 5-bit rotate amount and a non-zero 8-bit immediate value
689 /// represented by a normalizedin 7-bit value (msb is always 1)
690 void ARMAsmPrinter::printT2SOImmOperand(const MachineInstr *MI, int OpNum) {
691 const MachineOperand &MO = MI->getOperand(OpNum);
692 assert(MO.isImm() && "Not a valid so_imm value!");
694 unsigned Imm = ARM_AM::getT2SOImmValDecode(MO.getImm());
695 // Always print the immediate directly, as the "rotate" form
696 // is deprecated in some contexts.
700 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
701 // register with shift forms.
703 // REG IMM, SH_OPC - e.g. R5, LSL #3
704 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) {
705 const MachineOperand &MO1 = MI->getOperand(OpNum);
706 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
708 unsigned Reg = MO1.getReg();
709 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
710 O << TM.getRegisterInfo()->getAsmName(Reg);
712 // Print the shift opc.
714 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
717 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
718 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
721 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
723 const MachineOperand &MO1 = MI->getOperand(OpNum);
724 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
726 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
728 unsigned OffImm = MO2.getImm();
729 if (OffImm) // Don't print +0.
730 O << ", #+" << OffImm;
734 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
736 const MachineOperand &MO1 = MI->getOperand(OpNum);
737 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
739 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
741 int32_t OffImm = (int32_t)MO2.getImm();
744 O << ", #-" << -OffImm;
746 O << ", #+" << OffImm;
750 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
752 const MachineOperand &MO1 = MI->getOperand(OpNum);
753 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
754 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
756 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
760 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
762 unsigned ShAmt = MO3.getImm();
764 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
765 O << ", lsl #" << ShAmt;
772 //===--------------------------------------------------------------------===//
774 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) {
775 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
777 O << ARMCondCodeToString(CC);
780 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){
781 unsigned Reg = MI->getOperand(OpNum).getReg();
783 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
788 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) {
789 int Id = (int)MI->getOperand(OpNum).getImm();
790 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
793 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) {
795 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
797 if (i != e-1) O << ", ";
802 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
803 const char *Modifier) {
804 assert(Modifier && "This operand only works with a modifier!");
805 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
807 if (!strcmp(Modifier, "label")) {
808 unsigned ID = MI->getOperand(OpNum).getImm();
809 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
810 << '_' << ID << ":\n";
812 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
813 unsigned CPI = MI->getOperand(OpNum).getIndex();
815 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
817 if (MCPE.isMachineConstantPoolEntry()) {
818 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
820 EmitGlobalConstant(MCPE.Val.ConstVal);
825 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) {
826 const MachineOperand &MO1 = MI->getOperand(OpNum);
827 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
828 unsigned JTI = MO1.getIndex();
829 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
830 << '_' << JTI << '_' << MO2.getImm() << ":\n";
832 const char *JTEntryDirective = TAI->getJumpTableDirective();
833 if (!JTEntryDirective)
834 JTEntryDirective = TAI->getData32bitsDirective();
836 const MachineFunction *MF = MI->getParent()->getParent();
837 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
838 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
839 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
840 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
841 std::set<MachineBasicBlock*> JTSets;
842 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
843 MachineBasicBlock *MBB = JTBBs[i];
844 if (UseSet && JTSets.insert(MBB).second)
845 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
847 O << JTEntryDirective << ' ';
849 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
850 << '_' << JTI << '_' << MO2.getImm()
851 << "_set_" << MBB->getNumber();
852 else if (TM.getRelocationModel() == Reloc::PIC_) {
853 printBasicBlockLabel(MBB, false, false, false);
854 // If the arch uses custom Jump Table directives, don't calc relative to JT
855 if (!TAI->getJumpTableDirective())
856 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
857 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
859 printBasicBlockLabel(MBB, false, false, false);
866 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
867 unsigned AsmVariant, const char *ExtraCode){
868 // Does this asm operand have a single letter operand modifier?
869 if (ExtraCode && ExtraCode[0]) {
870 if (ExtraCode[1] != 0) return true; // Unknown modifier.
872 switch (ExtraCode[0]) {
873 default: return true; // Unknown modifier.
874 case 'a': // Don't print "#" before a global var name or constant.
875 case 'c': // Don't print "$" before a global var name or constant.
876 printOperand(MI, OpNum, "no_hash");
878 case 'P': // Print a VFP double precision register.
879 printOperand(MI, OpNum);
882 if (TM.getTargetData()->isLittleEndian())
886 if (TM.getTargetData()->isBigEndian())
889 case 'H': // Write second word of DI / DF reference.
890 // Verify that this operand has two consecutive registers.
891 if (!MI->getOperand(OpNum).isReg() ||
892 OpNum+1 == MI->getNumOperands() ||
893 !MI->getOperand(OpNum+1).isReg())
895 ++OpNum; // Return the high-part.
899 printOperand(MI, OpNum);
903 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
904 unsigned OpNum, unsigned AsmVariant,
905 const char *ExtraCode) {
906 if (ExtraCode && ExtraCode[0])
907 return true; // Unknown modifier.
908 printAddrMode2Operand(MI, OpNum);
912 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
915 int Opc = MI->getOpcode();
917 case ARM::CONSTPOOL_ENTRY:
918 if (!InCPMode && AFI->isThumbFunction()) {
924 if (InCPMode && AFI->isThumbFunction())
928 // Call the autogenerated instruction printer routines.
929 printInstruction(MI);
932 bool ARMAsmPrinter::doInitialization(Module &M) {
934 bool Result = AsmPrinter::doInitialization(M);
935 DW = getAnalysisIfAvailable<DwarfWriter>();
937 // Thumb-2 instructions are supported only in unified assembler syntax mode.
938 if (Subtarget->hasThumb2())
939 O << "\t.syntax unified\n";
941 // Emit ARM Build Attributes
942 if (Subtarget->isTargetELF()) {
944 std::string CPUString = Subtarget->getCPUString();
945 if (CPUString != "generic")
946 O << "\t.cpu " << CPUString << '\n';
948 // FIXME: Emit FPU type
949 if (Subtarget->hasVFP2())
950 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
952 // Signal various FP modes.
954 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
955 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
957 if (FiniteOnlyFPMath())
958 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
960 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
962 // 8-bytes alignment stuff.
963 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
964 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
966 // FIXME: Should we signal R9 usage?
972 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
973 /// Don't print things like \\n or \\0.
974 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
975 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
981 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
982 const TargetData *TD = TM.getTargetData();
984 if (!GVar->hasInitializer()) // External global require no code
987 // Check to see if this is a special global used by LLVM, if so, emit it.
989 if (EmitSpecialLLVMGlobal(GVar)) {
990 if (Subtarget->isTargetDarwin() &&
991 TM.getRelocationModel() == Reloc::Static) {
992 if (GVar->getName() == "llvm.global_ctors")
993 O << ".reference .constructors_used\n";
994 else if (GVar->getName() == "llvm.global_dtors")
995 O << ".reference .destructors_used\n";
1000 std::string name = Mang->getValueName(GVar);
1001 Constant *C = GVar->getInitializer();
1002 if (isa<MDNode>(C) || isa<MDString>(C))
1004 const Type *Type = C->getType();
1005 unsigned Size = TD->getTypeAllocSize(Type);
1006 unsigned Align = TD->getPreferredAlignmentLog(GVar);
1007 bool isDarwin = Subtarget->isTargetDarwin();
1009 printVisibility(name, GVar->getVisibility());
1011 if (Subtarget->isTargetELF())
1012 O << "\t.type " << name << ",%object\n";
1014 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
1016 TAI->SectionKindForGlobal(GVar) == SectionKind::RODataMergeStr)) {
1017 // FIXME: This seems to be pretty darwin-specific
1019 if (GVar->hasExternalLinkage()) {
1020 SwitchToSection(TAI->SectionForGlobal(GVar));
1021 if (const char *Directive = TAI->getZeroFillDirective()) {
1022 O << "\t.globl\t" << name << "\n";
1023 O << Directive << "__DATA, __common, " << name << ", "
1024 << Size << ", " << Align << "\n";
1029 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
1030 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
1033 if (GVar->hasLocalLinkage()) {
1034 O << TAI->getLCOMMDirective() << name << "," << Size
1036 } else if (GVar->hasCommonLinkage()) {
1037 O << TAI->getCOMMDirective() << name << "," << Size
1040 SwitchToSection(TAI->SectionForGlobal(GVar));
1041 O << "\t.globl " << name << '\n'
1042 << TAI->getWeakDefDirective() << name << '\n';
1043 EmitAlignment(Align, GVar);
1046 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
1047 PrintUnmangledNameSafely(GVar, O);
1050 EmitGlobalConstant(C);
1053 } else if (TAI->getLCOMMDirective() != NULL) {
1054 if (GVar->hasLocalLinkage()) {
1055 O << TAI->getLCOMMDirective() << name << "," << Size;
1057 O << TAI->getCOMMDirective() << name << "," << Size;
1058 if (TAI->getCOMMDirectiveTakesAlignment())
1059 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1062 SwitchToSection(TAI->SectionForGlobal(GVar));
1063 if (GVar->hasLocalLinkage())
1064 O << "\t.local\t" << name << "\n";
1065 O << TAI->getCOMMDirective() << name << "," << Size;
1066 if (TAI->getCOMMDirectiveTakesAlignment())
1067 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1070 O << "\t\t" << TAI->getCommentString() << " ";
1071 PrintUnmangledNameSafely(GVar, O);
1078 SwitchToSection(TAI->SectionForGlobal(GVar));
1079 switch (GVar->getLinkage()) {
1080 case GlobalValue::CommonLinkage:
1081 case GlobalValue::LinkOnceAnyLinkage:
1082 case GlobalValue::LinkOnceODRLinkage:
1083 case GlobalValue::WeakAnyLinkage:
1084 case GlobalValue::WeakODRLinkage:
1086 O << "\t.globl " << name << "\n"
1087 << "\t.weak_definition " << name << "\n";
1089 O << "\t.weak " << name << "\n";
1092 case GlobalValue::AppendingLinkage:
1093 // FIXME: appending linkage variables should go into a section of
1094 // their name or something. For now, just emit them as external.
1095 case GlobalValue::ExternalLinkage:
1096 O << "\t.globl " << name << "\n";
1098 case GlobalValue::PrivateLinkage:
1099 case GlobalValue::InternalLinkage:
1102 assert(0 && "Unknown linkage type!");
1106 EmitAlignment(Align, GVar);
1109 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1110 PrintUnmangledNameSafely(GVar, O);
1113 if (TAI->hasDotTypeDotSizeDirective())
1114 O << "\t.size " << name << ", " << Size << "\n";
1116 EmitGlobalConstant(C);
1121 bool ARMAsmPrinter::doFinalization(Module &M) {
1122 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
1124 printModuleLevelGV(I);
1126 if (Subtarget->isTargetDarwin()) {
1127 SwitchToDataSection("");
1129 // Output stubs for dynamically-linked functions
1130 for (StringSet<>::iterator i = FnStubs.begin(), e = FnStubs.end();
1132 if (TM.getRelocationModel() == Reloc::PIC_)
1133 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1136 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1140 O << "\t.code\t32\n";
1142 const char *p = i->getKeyData();
1143 printSuffixedName(p, "$stub");
1145 O << "\t.indirect_symbol " << p << "\n";
1147 printSuffixedName(p, "$slp");
1149 if (TM.getRelocationModel() == Reloc::PIC_) {
1150 printSuffixedName(p, "$scv");
1152 O << "\tadd ip, pc, ip\n";
1154 O << "\tldr pc, [ip, #0]\n";
1155 printSuffixedName(p, "$slp");
1158 printSuffixedName(p, "$lazy_ptr");
1159 if (TM.getRelocationModel() == Reloc::PIC_) {
1161 printSuffixedName(p, "$scv");
1165 SwitchToDataSection(".lazy_symbol_pointer", 0);
1166 printSuffixedName(p, "$lazy_ptr");
1168 O << "\t.indirect_symbol " << p << "\n";
1169 O << "\t.long\tdyld_stub_binding_helper\n";
1173 // Output non-lazy-pointers for external and common global variables.
1174 if (!GVNonLazyPtrs.empty()) {
1175 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1176 for (StringSet<>::iterator i = GVNonLazyPtrs.begin(),
1177 e = GVNonLazyPtrs.end(); i != e; ++i) {
1178 const char *p = i->getKeyData();
1179 printSuffixedName(p, "$non_lazy_ptr");
1181 O << "\t.indirect_symbol " << p << "\n";
1182 O << "\t.long\t0\n";
1186 if (!HiddenGVNonLazyPtrs.empty()) {
1187 SwitchToSection(TAI->getDataSection());
1188 for (StringSet<>::iterator i = HiddenGVNonLazyPtrs.begin(),
1189 e = HiddenGVNonLazyPtrs.end(); i != e; ++i) {
1190 const char *p = i->getKeyData();
1192 printSuffixedName(p, "$non_lazy_ptr");
1194 O << "\t.long " << p << "\n";
1199 // Funny Darwin hack: This flag tells the linker that no global symbols
1200 // contain code that falls through to other global symbols (e.g. the obvious
1201 // implementation of multiple entry points). If this doesn't occur, the
1202 // linker can safely perform dead code stripping. Since LLVM never
1203 // generates code that does this, it is always safe to set.
1204 O << "\t.subsections_via_symbols\n";
1207 return AsmPrinter::doFinalization(M);
1210 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1211 /// assembly code for a MachineFunction to the given output stream,
1212 /// using the given target machine description. This should work
1213 /// regardless of whether the function is in SSA form.
1215 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1216 ARMBaseTargetMachine &tm,
1218 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
1222 static struct Register {
1224 ARMBaseTargetMachine::registerAsmPrinter(createARMCodePrinterPass);
1229 // Force static initialization.
1230 extern "C" void LLVMInitializeARMAsmPrinter() { }