lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMTargetAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/CommandLine.h"
  20 #include "llvm/Support/FormattedStream.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetRegistry.h"
  23 using namespace llvm;
  24
  25 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
  26                               cl::desc("Disable load store optimization pass"));
  27 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
  28                               cl::desc("Disable if-conversion pass"));
  29
  30 extern "C" void LLVMInitializeARMTarget() {
  31   // Register the target.
  32   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  33   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  34 }
  35
  36 /// TargetMachine ctor - Create an ARM architecture model.
  37 ///
  38 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  39                                            const std::string &TT,
  40                                            const std::string &FS,
  41                                            bool isThumb)
  42   : LLVMTargetMachine(T),
  43     Subtarget(TT, FS, isThumb),
  44     FrameInfo(Subtarget),
  45     JITInfo(),
  46     InstrItins(Subtarget.getInstrItineraryData()) {
  47   DefRelocModel = getRelocationModel();
  48 }
  49
  50 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  51                                    const std::string &FS)
  52   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  53     DataLayout(Subtarget.isAPCS_ABI() ?
  54                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  55                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  56     TLInfo(*this) {
  57 }
  58
  59 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  60                                        const std::string &FS)
  61   : ARMBaseTargetMachine(T, TT, FS, true),
  62     DataLayout(Subtarget.isAPCS_ABI() ?
  63                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  64                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  65                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  66                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  67     TLInfo(*this) {
  68   // Create the approriate type of Thumb InstrInfo
  69   if (Subtarget.hasThumb2())
  70     InstrInfo = new Thumb2InstrInfo(Subtarget);
  71   else
  72     InstrInfo = new Thumb1InstrInfo(Subtarget);
  73 }
  74
  75
  76 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
  77   switch (Subtarget.TargetType) {
  78   default: llvm_unreachable("Unknown ARM subtarget kind");
  79   case ARMSubtarget::isDarwin:
  80     return new ARMDarwinTargetAsmInfo();
  81   case ARMSubtarget::isELF:
  82     return new ARMELFTargetAsmInfo();
  83   }
  84 }
  85
  86
  87 // Pass Pipeline Configuration
  88 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  89                                            CodeGenOpt::Level OptLevel) {
  90   PM.add(createARMISelDag(*this));
  91   return false;
  92 }
  93
  94 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  95                                           CodeGenOpt::Level OptLevel) {
  96   if (Subtarget.hasNEON())
  97     PM.add(createNEONPreAllocPass());
  98
  99   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
 100   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
 101     PM.add(createARMLoadStoreOptimizationPass(true));
 102   return true;
 103 }
 104
 105 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 106                                           CodeGenOpt::Level OptLevel) {
 107   // FIXME: temporarily disabling load / store optimization pass for Thumb1 mode.
 108   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti &&
 109       !Subtarget.isThumb1Only())
 110     PM.add(createARMLoadStoreOptimizationPass());
 111
 112   if (OptLevel != CodeGenOpt::None &&
 113       !DisableIfConversion && !Subtarget.isThumb())
 114     PM.add(createIfConverterPass());
 115
 116   if (Subtarget.isThumb2()) {
 117     PM.add(createThumb2ITBlockPass());
 118     PM.add(createThumb2SizeReductionPass());
 119   }
 120
 121   PM.add(createARMConstantIslandPass());
 122   return true;
 123 }
 124
 125 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 126                                           CodeGenOpt::Level OptLevel,
 127                                           MachineCodeEmitter &MCE) {
 128   // FIXME: Move this to TargetJITInfo!
 129   if (DefRelocModel == Reloc::Default)
 130     setRelocationModel(Reloc::Static);
 131
 132   // Machine code emitter pass for ARM.
 133   PM.add(createARMCodeEmitterPass(*this, MCE));
 134   return false;
 135 }
 136
 137 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 138                                           CodeGenOpt::Level OptLevel,
 139                                           JITCodeEmitter &JCE) {
 140   // FIXME: Move this to TargetJITInfo!
 141   if (DefRelocModel == Reloc::Default)
 142     setRelocationModel(Reloc::Static);
 143
 144   // Machine code emitter pass for ARM.
 145   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 146   return false;
 147 }
 148
 149 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 150                                           CodeGenOpt::Level OptLevel,
 151                                           ObjectCodeEmitter &OCE) {
 152   // FIXME: Move this to TargetJITInfo!
 153   if (DefRelocModel == Reloc::Default)
 154     setRelocationModel(Reloc::Static);
 155
 156   // Machine code emitter pass for ARM.
 157   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 158   return false;
 159 }
 160
 161 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 162                                                 CodeGenOpt::Level OptLevel,
 163                                                 MachineCodeEmitter &MCE) {
 164   // Machine code emitter pass for ARM.
 165   PM.add(createARMCodeEmitterPass(*this, MCE));
 166   return false;
 167 }
 168
 169 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 170                                                 CodeGenOpt::Level OptLevel,
 171                                                 JITCodeEmitter &JCE) {
 172   // Machine code emitter pass for ARM.
 173   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 174   return false;
 175 }
 176
 177 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 178                                             CodeGenOpt::Level OptLevel,
 179                                             ObjectCodeEmitter &OCE) {
 180   // Machine code emitter pass for ARM.
 181   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 182   return false;
 183 }
 184