lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMMCAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/FormattedStream.h"
  20 #include "llvm/Target/TargetOptions.h"
  21 #include "llvm/Target/TargetRegistry.h"
  22 using namespace llvm;
  23
  24 static const MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
  25   Triple TheTriple(TT);
  26   switch (TheTriple.getOS()) {
  27   case Triple::Darwin:
  28     return new ARMMCAsmInfoDarwin();
  29   default:
  30     return new ARMELFMCAsmInfo();
  31   }
  32 }
  33
  34
  35 extern "C" void LLVMInitializeARMTarget() {
  36   // Register the target.
  37   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  38   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  39
  40   // Register the target asm info.
  41   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
  42   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
  43 }
  44
  45 /// TargetMachine ctor - Create an ARM architecture model.
  46 ///
  47 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  48                                            const std::string &TT,
  49                                            const std::string &FS,
  50                                            bool isThumb)
  51   : LLVMTargetMachine(T, TT),
  52     Subtarget(TT, FS, isThumb),
  53     FrameInfo(Subtarget),
  54     JITInfo(),
  55     InstrItins(Subtarget.getInstrItineraryData()) {
  56   DefRelocModel = getRelocationModel();
  57 }
  58
  59 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  60                                    const std::string &FS)
  61   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  62     DataLayout(Subtarget.isAPCS_ABI() ?
  63                std::string("e-p:32:32-f64:32:32-i64:32:32-n32") :
  64                std::string("e-p:32:32-f64:64:64-i64:64:64-n32")),
  65     TLInfo(*this) {
  66 }
  67
  68 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  69                                        const std::string &FS)
  70   : ARMBaseTargetMachine(T, TT, FS, true),
  71     InstrInfo(Subtarget.hasThumb2()
  72               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
  73               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
  74     DataLayout(Subtarget.isAPCS_ABI() ?
  75                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  76                            "i16:16:32-i8:8:32-i1:8:32-a:0:32-n32") :
  77                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  78                            "i16:16:32-i8:8:32-i1:8:32-a:0:32-n32")),
  79     TLInfo(*this) {
  80 }
  81
  82
  83
  84 // Pass Pipeline Configuration
  85 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  86                                            CodeGenOpt::Level OptLevel) {
  87   PM.add(createARMISelDag(*this, OptLevel));
  88   return false;
  89 }
  90
  91 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  92                                           CodeGenOpt::Level OptLevel) {
  93   if (Subtarget.hasNEON())
  94     PM.add(createNEONPreAllocPass());
  95
  96   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
  97   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
  98     PM.add(createARMLoadStoreOptimizationPass(true));
  99   return true;
 100 }
 101
 102 bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
 103                                         CodeGenOpt::Level OptLevel) {
 104   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 105   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 106     PM.add(createARMLoadStoreOptimizationPass());
 107
 108   // Expand some pseudo instructions into multiple instructions to allow
 109   // proper scheduling.
 110   PM.add(createARMExpandPseudoPass());
 111
 112   return true;
 113 }
 114
 115 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 116                                           CodeGenOpt::Level OptLevel) {
 117   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 118   if (OptLevel != CodeGenOpt::None) {
 119     if (!Subtarget.isThumb1Only())
 120       PM.add(createIfConverterPass());
 121     if (Subtarget.hasNEON())
 122       PM.add(createNEONMoveFixPass());
 123   }
 124
 125   if (Subtarget.isThumb2()) {
 126     PM.add(createThumb2ITBlockPass());
 127     PM.add(createThumb2SizeReductionPass());
 128   }
 129
 130   PM.add(createARMConstantIslandPass());
 131   return true;
 132 }
 133
 134 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 135                                           CodeGenOpt::Level OptLevel,
 136                                           MachineCodeEmitter &MCE) {
 137   // FIXME: Move this to TargetJITInfo!
 138   if (DefRelocModel == Reloc::Default)
 139     setRelocationModel(Reloc::Static);
 140
 141   // Machine code emitter pass for ARM.
 142   PM.add(createARMCodeEmitterPass(*this, MCE));
 143   return false;
 144 }
 145
 146 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 147                                           CodeGenOpt::Level OptLevel,
 148                                           JITCodeEmitter &JCE) {
 149   // FIXME: Move this to TargetJITInfo!
 150   if (DefRelocModel == Reloc::Default)
 151     setRelocationModel(Reloc::Static);
 152
 153   // Machine code emitter pass for ARM.
 154   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 155   return false;
 156 }
 157
 158 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 159                                           CodeGenOpt::Level OptLevel,
 160                                           ObjectCodeEmitter &OCE) {
 161   // FIXME: Move this to TargetJITInfo!
 162   if (DefRelocModel == Reloc::Default)
 163     setRelocationModel(Reloc::Static);
 164
 165   // Machine code emitter pass for ARM.
 166   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 167   return false;
 168 }
 169
 170 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 171                                                 CodeGenOpt::Level OptLevel,
 172                                                 MachineCodeEmitter &MCE) {
 173   // Machine code emitter pass for ARM.
 174   PM.add(createARMCodeEmitterPass(*this, MCE));
 175   return false;
 176 }
 177
 178 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 179                                                 CodeGenOpt::Level OptLevel,
 180                                                 JITCodeEmitter &JCE) {
 181   // Machine code emitter pass for ARM.
 182   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 183   return false;
 184 }
 185
 186 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 187                                             CodeGenOpt::Level OptLevel,
 188                                             ObjectCodeEmitter &OCE) {
 189   // Machine code emitter pass for ARM.
 190   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 191   return false;
 192 }
 193