lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMMCAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/CommandLine.h"
  20 #include "llvm/Support/FormattedStream.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetRegistry.h"
  23 using namespace llvm;
  24
  25 static cl::opt<bool>
  26 Prefer32BitThumbInstrs("prefer-32bit-thumb",
  27                        cl::desc("Prefer 32-bit Thumb instructions"),
  28                        cl::init(false));
  29
  30 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
  31   Triple TheTriple(TT);
  32   switch (TheTriple.getOS()) {
  33   case Triple::Darwin:
  34     return new ARMMCAsmInfoDarwin();
  35   default:
  36     return new ARMELFMCAsmInfo();
  37   }
  38 }
  39
  40 extern "C" void LLVMInitializeARMTarget() {
  41   // Register the target.
  42   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  43   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  44
  45   // Register the target asm info.
  46   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
  47   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
  48 }
  49
  50 /// TargetMachine ctor - Create an ARM architecture model.
  51 ///
  52 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  53                                            const std::string &TT,
  54                                            const std::string &FS,
  55                                            bool isThumb)
  56   : LLVMTargetMachine(T, TT),
  57     Subtarget(TT, FS, isThumb),
  58     FrameInfo(Subtarget),
  59     JITInfo(),
  60     InstrItins(Subtarget.getInstrItineraryData()) {
  61   DefRelocModel = getRelocationModel();
  62 }
  63
  64 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  65                                    const std::string &FS)
  66   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  67     DataLayout(Subtarget.isAPCS_ABI() ?
  68                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  69                            "v128:32:128-v64:32:64-n32") :
  70                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  71                            "v128:64:128-v64:64:64-n32")),
  72     TLInfo(*this),
  73     TSInfo(*this) {
  74 }
  75
  76 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  77                                        const std::string &FS)
  78   : ARMBaseTargetMachine(T, TT, FS, true),
  79     InstrInfo(Subtarget.hasThumb2()
  80               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
  81               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
  82     DataLayout(Subtarget.isAPCS_ABI() ?
  83                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  84                            "i16:16:32-i8:8:32-i1:8:32-"
  85                            "v128:32:128-v64:32:64-a:0:32-n32") :
  86                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  87                            "i16:16:32-i8:8:32-i1:8:32-"
  88                            "v128:64:128-v64:64:64-a:0:32-n32")),
  89     TLInfo(*this),
  90     TSInfo(*this) {
  91 }
  92
  93 // Pass Pipeline Configuration
  94 bool ARMBaseTargetMachine::addPreISel(PassManagerBase &PM,
  95                                       CodeGenOpt::Level OptLevel) {
  96   if (OptLevel != CodeGenOpt::None)
  97     PM.add(createARMGlobalMergePass(getTargetLowering()));
  98
  99   return false;
 100 }
 101
 102 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
 103                                            CodeGenOpt::Level OptLevel) {
 104   PM.add(createARMISelDag(*this, OptLevel));
 105   return false;
 106 }
 107
 108 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
 109                                           CodeGenOpt::Level OptLevel) {
 110   if (Subtarget.hasNEON())
 111     PM.add(createNEONPreAllocPass());
 112
 113   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 114   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 115     PM.add(createARMLoadStoreOptimizationPass(true));
 116
 117   return true;
 118 }
 119
 120 bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
 121                                         CodeGenOpt::Level OptLevel) {
 122   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 123   if (OptLevel != CodeGenOpt::None) {
 124     if (!Subtarget.isThumb1Only())
 125       PM.add(createARMLoadStoreOptimizationPass());
 126     if (Subtarget.hasNEON())
 127       PM.add(createNEONMoveFixPass());
 128   }
 129
 130   // Expand some pseudo instructions into multiple instructions to allow
 131   // proper scheduling.
 132   PM.add(createARMExpandPseudoPass());
 133
 134   if (OptLevel != CodeGenOpt::None) {
 135     if (!Subtarget.isThumb1Only())
 136       PM.add(createIfConverterPass());
 137   }
 138   if (Subtarget.isThumb2())
 139     PM.add(createThumb2ITBlockPass());
 140
 141   return true;
 142 }
 143
 144 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 145                                           CodeGenOpt::Level OptLevel) {
 146   if (!Prefer32BitThumbInstrs && Subtarget.isThumb2())
 147     PM.add(createThumb2SizeReductionPass());
 148
 149   PM.add(createARMConstantIslandPass());
 150   return true;
 151 }
 152
 153 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 154                                           CodeGenOpt::Level OptLevel,
 155                                           JITCodeEmitter &JCE) {
 156   // FIXME: Move this to TargetJITInfo!
 157   if (DefRelocModel == Reloc::Default)
 158     setRelocationModel(Reloc::Static);
 159
 160   // Machine code emitter pass for ARM.
 161   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 162   return false;
 163 }