1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMMachineFunctionInfo.h"
19 #include "ARMInstrInfo.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/Compiler.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
32 STATISTIC(NumCPEs, "Number of constpool entries");
33 STATISTIC(NumSplit, "Number of uncond branches inserted");
34 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
35 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
38 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
39 /// requires constant pool entries to be scattered among the instructions
40 /// inside a function. To do this, it completely ignores the normal LLVM
41 /// constant pool; instead, it places constants wherever it feels like with
42 /// special instructions.
44 /// The terminology used in this pass includes:
45 /// Islands - Clumps of constants placed in the function.
46 /// Water - Potential places where an island could be formed.
47 /// CPE - A constant pool entry that has been placed somewhere, which
48 /// tracks a list of users.
49 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
50 /// NextUID - Assign unique ID's to CPE's.
53 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
55 std::vector<unsigned> BBSizes;
57 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
58 std::vector<unsigned> BBOffsets;
60 /// WaterList - A sorted list of basic blocks where islands could be placed
61 /// (i.e. blocks that don't fall through to the following block, due
62 /// to a return, unreachable, or unconditional branch).
63 std::vector<MachineBasicBlock*> WaterList;
65 /// CPUser - One user of a constant pool, keeping the machine instruction
66 /// pointer, the constant pool being referenced, and the max displacement
67 /// allowed from the instruction to the CP.
72 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp)
73 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {}
76 /// CPUsers - Keep track of all of the machine instructions that use various
77 /// constant pools and their max displacement.
78 std::vector<CPUser> CPUsers;
80 /// CPEntry - One per constant pool entry, keeping the machine instruction
81 /// pointer, the constpool index, and the number of CPUser's which
82 /// reference this entry.
87 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
88 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
91 /// CPEntries - Keep track of all of the constant pool entry machine
92 /// instructions. For each original constpool index (i.e. those that
93 /// existed upon entry to this pass), it keeps a vector of entries.
94 /// Original elements are cloned as we go along; the clones are
95 /// put in the vector of the original element, but have distinct CPIs.
96 std::vector<std::vector<CPEntry> > CPEntries;
98 /// ImmBranch - One per immediate branch, keeping the machine instruction
99 /// pointer, conditional or unconditional, the max displacement,
100 /// and (if isCond is true) the corresponding unconditional branch
104 unsigned MaxDisp : 31;
107 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
108 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
111 /// Branches - Keep track of all the immediate branch instructions.
113 std::vector<ImmBranch> ImmBranches;
115 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
117 SmallVector<MachineInstr*, 4> PushPopMIs;
119 /// HasFarJump - True if any far jump instruction has been emitted during
120 /// the branch fix up pass.
123 const TargetInstrInfo *TII;
124 const ARMFunctionInfo *AFI;
127 virtual bool runOnMachineFunction(MachineFunction &Fn);
129 virtual const char *getPassName() const {
130 return "ARM constant island placement and branch shortening pass";
134 void DoInitialPlacement(MachineFunction &Fn,
135 std::vector<MachineInstr*> &CPEMIs);
136 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
137 void InitialFunctionScan(MachineFunction &Fn,
138 const std::vector<MachineInstr*> &CPEMIs);
139 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
140 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
141 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
142 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI, unsigned Size);
143 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
144 bool LookForWater(CPUser&U, unsigned UserOffset, bool* PadNewWater,
145 MachineBasicBlock** NewMBB);
146 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
147 MachineBasicBlock** NewMBB);
148 bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex);
149 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
150 MachineInstr *CPEMI, unsigned Disp,
152 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
154 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
155 unsigned Disp, bool NegativeOK);
156 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
157 bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
158 bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
159 bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
160 bool UndoLRSpillRestore();
162 unsigned GetOffsetOf(MachineInstr *MI) const;
166 /// createARMConstantIslandPass - returns an instance of the constpool
168 FunctionPass *llvm::createARMConstantIslandPass() {
169 return new ARMConstantIslands();
172 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
173 MachineConstantPool &MCP = *Fn.getConstantPool();
175 TII = Fn.getTarget().getInstrInfo();
176 AFI = Fn.getInfo<ARMFunctionInfo>();
177 isThumb = AFI->isThumbFunction();
181 // Renumber all of the machine basic blocks in the function, guaranteeing that
182 // the numbers agree with the position of the block in the function.
185 // Perform the initial placement of the constant pool entries. To start with,
186 // we put them all at the end of the function.
187 std::vector<MachineInstr*> CPEMIs;
189 DoInitialPlacement(Fn, CPEMIs);
191 /// The next UID to take is the first unused one.
192 NextUID = CPEMIs.size();
194 // Do the initial scan of the function, building up information about the
195 // sizes of each block, the location of all the water, and finding all of the
196 // constant pool users.
197 InitialFunctionScan(Fn, CPEMIs);
200 // Iteratively place constant pool entries and fix up branches until there
202 bool MadeChange = false;
205 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
206 Change |= HandleConstantPoolUser(Fn, i);
207 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
208 Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
214 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
215 // Undo the spill / restore of LR if possible.
216 if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb)
217 MadeChange |= UndoLRSpillRestore();
230 /// DoInitialPlacement - Perform the initial placement of the constant pool
231 /// entries. To start with, we put them all at the end of the function.
232 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
233 std::vector<MachineInstr*> &CPEMIs){
234 // Create the basic block to hold the CPE's.
235 MachineBasicBlock *BB = new MachineBasicBlock();
236 Fn.getBasicBlockList().push_back(BB);
238 // Add all of the constants from the constant pool to the end block, use an
239 // identity mapping of CPI's to CPE's.
240 const std::vector<MachineConstantPoolEntry> &CPs =
241 Fn.getConstantPool()->getConstants();
243 const TargetData &TD = *Fn.getTarget().getTargetData();
244 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
245 unsigned Size = TD.getTypeSize(CPs[i].getType());
246 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
247 // we would have to pad them out or something so that instructions stay
249 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
250 MachineInstr *CPEMI =
251 BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY))
252 .addImm(i).addConstantPoolIndex(i).addImm(Size);
253 CPEMIs.push_back(CPEMI);
255 // Add a new CPEntry, but no corresponding CPUser yet.
256 std::vector<CPEntry> CPEs;
257 CPEs.push_back(CPEntry(CPEMI, i));
258 CPEntries.push_back(CPEs);
260 DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
264 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
265 /// into the block immediately after it.
266 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
267 // Get the next machine basic block in the function.
268 MachineFunction::iterator MBBI = MBB;
269 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
272 MachineBasicBlock *NextBB = next(MBBI);
273 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
274 E = MBB->succ_end(); I != E; ++I)
281 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
282 /// look up the corresponding CPEntry.
283 ARMConstantIslands::CPEntry
284 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
285 const MachineInstr *CPEMI) {
286 std::vector<CPEntry> &CPEs = CPEntries[CPI];
287 // Number of entries per constpool index should be small, just do a
289 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
290 if (CPEs[i].CPEMI == CPEMI)
296 /// InitialFunctionScan - Do the initial scan of the function, building up
297 /// information about the sizes of each block, the location of all the water,
298 /// and finding all of the constant pool users.
299 void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
300 const std::vector<MachineInstr*> &CPEMIs) {
302 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
304 MachineBasicBlock &MBB = *MBBI;
306 // If this block doesn't fall through into the next MBB, then this is
307 // 'water' that a constant pool island could be placed.
308 if (!BBHasFallthrough(&MBB))
309 WaterList.push_back(&MBB);
311 unsigned MBBSize = 0;
312 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
314 // Add instruction size to MBBSize.
315 MBBSize += ARM::GetInstSize(I);
317 int Opc = I->getOpcode();
318 if (TII->isBranch(Opc)) {
325 continue; // Ignore JT branches
346 // Record this immediate branch.
347 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
348 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
351 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
352 PushPopMIs.push_back(I);
354 // Scan the instructions for constant pool operands.
355 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
356 if (I->getOperand(op).isConstantPoolIndex()) {
357 // We found one. The addressing mode tells us the max displacement
358 // from the PC that this instruction permits.
360 // Basic size info comes from the TSFlags field.
363 unsigned TSFlags = I->getInstrDescriptor()->TSFlags;
364 switch (TSFlags & ARMII::AddrModeMask) {
366 // Constant pool entries can reach anything.
367 if (I->getOpcode() == ARM::CONSTPOOL_ENTRY)
369 assert(0 && "Unknown addressing mode for CP reference!");
370 case ARMII::AddrMode1: // AM1: 8 bits << 2
372 Scale = 4; // Taking the address of a CP entry.
374 case ARMII::AddrMode2:
375 Bits = 12; // +-offset_12
377 case ARMII::AddrMode3:
378 Bits = 8; // +-offset_8
380 // addrmode4 has no immediate offset.
381 case ARMII::AddrMode5:
383 Scale = 4; // +-(offset_8*4)
385 case ARMII::AddrModeT1:
386 Bits = 5; // +offset_5
388 case ARMII::AddrModeT2:
390 Scale = 2; // +(offset_5*2)
392 case ARMII::AddrModeT4:
394 Scale = 4; // +(offset_5*4)
396 case ARMII::AddrModeTs:
398 Scale = 4; // +(offset_8*4)
402 // Remember that this is a user of a CP entry.
403 unsigned CPI = I->getOperand(op).getConstantPoolIndex();
404 MachineInstr *CPEMI = CPEMIs[CPI];
405 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
406 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
408 // Increment corresponding CPEntry reference count.
409 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
410 assert(CPE && "Cannot find a corresponding CPEntry!");
413 // Instructions can only use one CP entry, don't bother scanning the
414 // rest of the operands.
419 // In thumb mode, if this block is a constpool island, pessimistically
420 // assume it needs to be padded by two byte so it's aligned on 4 byte
424 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
427 BBSizes.push_back(MBBSize);
428 BBOffsets.push_back(Offset);
433 /// GetOffsetOf - Return the current offset of the specified machine instruction
434 /// from the start of the function. This offset changes as stuff is moved
435 /// around inside the function.
436 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
437 MachineBasicBlock *MBB = MI->getParent();
439 // The offset is composed of two things: the sum of the sizes of all MBB's
440 // before this instruction's block, and the offset from the start of the block
442 unsigned Offset = BBOffsets[MBB->getNumber()];
444 // Sum instructions before MI in MBB.
445 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
446 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
447 if (&*I == MI) return Offset;
448 Offset += ARM::GetInstSize(I);
452 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
454 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
455 const MachineBasicBlock *RHS) {
456 return LHS->getNumber() < RHS->getNumber();
459 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
460 /// machine function, it upsets all of the block numbers. Renumber the blocks
461 /// and update the arrays that parallel this numbering.
462 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
463 // Renumber the MBB's to keep them consequtive.
464 NewBB->getParent()->RenumberBlocks(NewBB);
466 // Insert a size into BBSizes to align it properly with the (newly
467 // renumbered) block numbers.
468 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
470 // Likewise for BBOffsets.
471 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
473 // Next, update WaterList. Specifically, we need to add NewMBB as having
474 // available water after it.
475 std::vector<MachineBasicBlock*>::iterator IP =
476 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
478 WaterList.insert(IP, NewBB);
482 /// Split the basic block containing MI into two blocks, which are joined by
483 /// an unconditional branch. Update datastructures and renumber blocks to
484 /// account for this change and returns the newly created block.
485 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
486 MachineBasicBlock *OrigBB = MI->getParent();
488 // Create a new MBB for the code after the OrigBB.
489 MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock());
490 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
491 OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB);
493 // Splice the instructions starting with MI over to NewBB.
494 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
496 // Add an unconditional branch from OrigBB to NewBB.
497 // Note the new unconditional branch is not being recorded.
498 BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
501 // Update the CFG. All succs of OrigBB are now succs of NewBB.
502 while (!OrigBB->succ_empty()) {
503 MachineBasicBlock *Succ = *OrigBB->succ_begin();
504 OrigBB->removeSuccessor(Succ);
505 NewBB->addSuccessor(Succ);
507 // This pass should be run after register allocation, so there should be no
508 // PHI nodes to update.
509 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
510 && "PHI nodes should be eliminated by now!");
513 // OrigBB branches to NewBB.
514 OrigBB->addSuccessor(NewBB);
516 // Update internal data structures to account for the newly inserted MBB.
517 // This is almost the same as UpdateForInsertedWaterBlock, except that
518 // the Water goes after OrigBB, not NewBB.
519 NewBB->getParent()->RenumberBlocks(NewBB);
521 // Insert a size into BBSizes to align it properly with the (newly
522 // renumbered) block numbers.
523 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
525 // Likewise for BBOffsets.
526 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
528 // Next, update WaterList. Specifically, we need to add OrigMBB as having
529 // available water after it (but not if it's already there, which happens
530 // when splitting before a conditional branch that is followed by an
531 // unconditional branch - in that case we want to insert NewBB).
532 std::vector<MachineBasicBlock*>::iterator IP =
533 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
535 MachineBasicBlock* WaterBB = *IP;
536 if (WaterBB == OrigBB)
537 WaterList.insert(next(IP), NewBB);
539 WaterList.insert(IP, OrigBB);
541 // Figure out how large the first NewMBB is.
542 unsigned NewBBSize = 0;
543 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
545 NewBBSize += ARM::GetInstSize(I);
547 unsigned OrigBBI = OrigBB->getNumber();
548 unsigned NewBBI = NewBB->getNumber();
549 // Set the size of NewBB in BBSizes.
550 BBSizes[NewBBI] = NewBBSize;
552 // We removed instructions from UserMBB, subtract that off from its size.
553 // Add 2 or 4 to the block to count the unconditional branch we added to it.
554 unsigned delta = isThumb ? 2 : 4;
555 BBSizes[OrigBBI] -= NewBBSize - delta;
557 // ...and adjust BBOffsets for NewBB accordingly.
558 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
560 // All BBOffsets following these blocks must be modified.
561 AdjustBBOffsetsAfter(NewBB, delta);
566 /// OffsetIsInRange - Checks whether UserOffset is within MaxDisp of
568 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
569 unsigned TrialOffset, unsigned MaxDisp, bool NegativeOK) {
570 if (UserOffset <= TrialOffset) {
571 // User before the Trial.
572 if (TrialOffset-UserOffset <= MaxDisp)
574 } else if (NegativeOK) {
575 if (UserOffset-TrialOffset <= MaxDisp)
581 /// WaterIsInRange - Returns true if a CPE placed after the specified
582 /// Water (a basic block) will be in range for the specific MI.
584 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
585 MachineBasicBlock* Water, unsigned MaxDisp)
587 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
588 BBSizes[Water->getNumber()];
589 // If the Water is a constpool island, it has already been aligned.
593 Water->begin()->getOpcode() != ARM::CONSTPOOL_ENTRY))
596 return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb);
599 /// CPEIsInRange - Returns true if the distance between specific MI and
600 /// specific ConstPool entry instruction can fit in MI's displacement field.
601 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
603 unsigned MaxDisp, bool DoDump) {
604 // In thumb mode, pessimistically assumes the .align 2 before the first CPE
605 // in the island adds two byte padding.
606 unsigned AlignAdj = isThumb ? 2 : 0;
607 unsigned CPEOffset = GetOffsetOf(CPEMI) + AlignAdj;
610 DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
611 << " max delta=" << MaxDisp
612 << " insn address=" << UserOffset
613 << " CPE address=" << CPEOffset
614 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
617 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, !isThumb);
620 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
621 /// unconditionally branches to its only successor.
622 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
623 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
626 MachineBasicBlock *Succ = *MBB->succ_begin();
627 MachineBasicBlock *Pred = *MBB->pred_begin();
628 MachineInstr *PredMI = &Pred->back();
629 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB)
630 return PredMI->getOperand(0).getMBB() == Succ;
634 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta)
636 MachineFunction::iterator MBBI = BB->getParent()->end();
637 for(unsigned i=BB->getNumber()+1; i<BB->getParent()->getNumBlockIDs(); i++)
638 BBOffsets[i] += delta;
641 /// DecrementOldEntry - find the constant pool entry with index CPI
642 /// and instruction CPEMI, and decrement its refcount. If the refcount
643 /// becomes 0 remove the entry and instruction. Returns true if we removed
644 /// the entry, false if we didn't.
646 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI,
648 // Find the old entry. Eliminate it if it is no longer used.
649 CPEntry *OldCPE = findConstPoolEntry(CPI, CPEMI);
650 assert(OldCPE && "Unexpected!");
651 if (--OldCPE->RefCount == 0) {
652 MachineBasicBlock *OldCPEBB = OldCPE->CPEMI->getParent();
653 if (OldCPEBB->empty()) {
654 // In thumb mode, the size of island is padded by two to compensate for
655 // the alignment requirement. Thus it will now be 2 when the block is
656 // empty, so fix this.
657 // All succeeding offsets have the current size value added in, fix this.
658 if (BBSizes[OldCPEBB->getNumber()] != 0) {
659 AdjustBBOffsetsAfter(OldCPEBB, -BBSizes[OldCPEBB->getNumber()]);
660 BBSizes[OldCPEBB->getNumber()] = 0;
662 // An island has only one predecessor BB and one successor BB. Check if
663 // this BB's predecessor jumps directly to this BB's successor. This
664 // shouldn't happen currently.
665 assert(!BBIsJumpedOver(OldCPEBB) && "How did this happen?");
666 // FIXME: remove the empty blocks after all the work is done?
668 BBSizes[OldCPEBB->getNumber()] -= Size;
669 // All succeeding offsets have the current size value added in, fix this.
670 AdjustBBOffsetsAfter(OldCPEBB, -Size);
672 OldCPE->CPEMI->eraseFromParent();
673 OldCPE->CPEMI = NULL;
680 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
681 /// if not, see if an in-range clone of the CPE is in range, and if so,
682 /// change the data structures so the user references the clone. Returns:
683 /// 0 = no existing entry found
684 /// 1 = entry found, and there were no code insertions or deletions
685 /// 2 = entry found, and there were code insertions or deletions
686 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
688 MachineInstr *UserMI = U.MI;
689 MachineInstr *CPEMI = U.CPEMI;
691 // Check to see if the CPE is already in-range.
692 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, true)) {
693 DOUT << "In range\n";
697 // No. Look for previously created clones of the CPE that are in range.
698 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
699 std::vector<CPEntry> &CPEs = CPEntries[CPI];
700 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
701 // We already tried this one
702 if (CPEs[i].CPEMI == CPEMI)
704 // Removing CPEs can leave empty entries, skip
705 if (CPEs[i].CPEMI == NULL)
707 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, false)) {
708 DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
709 // Point the CPUser node to the replacement
710 U.CPEMI = CPEs[i].CPEMI;
711 // Change the CPI in the instruction operand to refer to the clone.
712 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
713 if (UserMI->getOperand(j).isConstantPoolIndex()) {
714 UserMI->getOperand(j).setConstantPoolIndex(CPEs[i].CPI);
717 // Adjust the refcount of the clone...
719 // ...and the original. If we didn't remove the old entry, none of the
720 // addresses changed, so we don't need another pass.
721 unsigned Size = CPEMI->getOperand(2).getImm();
722 return DecrementOldEntry(CPI, CPEMI, Size) ? 2 : 1;
728 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
729 /// the specific unconditional branch instruction.
730 static inline unsigned getUnconditionalBrDisp(int Opc) {
731 return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4;
734 /// LookForWater - look for an existing entry in the WaterList in which
735 /// we can place the CPE referenced from U so it's within range of U's MI.
736 /// Returns true if found, false if not. If it returns true, *NewMBB
737 /// is set to the WaterList entry, and *PadNewWater is set to false if
738 /// the WaterList entry is an island.
740 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
741 bool *PadNewWater, MachineBasicBlock** NewMBB) {
742 if (!WaterList.empty()) {
743 for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
744 B = WaterList.begin();; --IP) {
745 MachineBasicBlock* WaterBB = *IP;
746 if (WaterIsInRange(UserOffset, WaterBB, U.MaxDisp)) {
747 DOUT << "found water in range\n";
748 // CPE goes before following block (NewMBB).
749 *NewMBB = next(MachineFunction::iterator(WaterBB));
750 // If WaterBB is an island, don't pad the new island.
751 // If WaterBB is empty, go backwards until we find something that
752 // isn't. WaterBB may become empty if it's an island whose
753 // contents were moved farther back.
755 MachineBasicBlock* BB = WaterBB;
757 BB = prior(MachineFunction::iterator(BB));
758 if (BB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
759 *PadNewWater = false;
761 // Remove the original WaterList entry; we want subsequent
762 // insertions in this vicinity to go after the one we're
763 // about to insert. This considerably reduces the number
764 // of times we have to move the same CPE more than once.
775 /// CreateNewWater - No existing WaterList entry will work for
776 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
777 /// block is used if in range, and the conditional branch munged so control
778 /// flow is correct. Otherwise the block is split to create a hole with an
779 /// unconditional branch around it. In either case *NewMBB is set to a
780 /// block following which the new island can be inserted (the WaterList
781 /// is not adjusted).
783 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
784 unsigned UserOffset, MachineBasicBlock** NewMBB) {
785 CPUser &U = CPUsers[CPUserIndex];
786 MachineInstr *UserMI = U.MI;
787 MachineInstr *CPEMI = U.CPEMI;
788 MachineBasicBlock *UserMBB = UserMI->getParent();
789 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
790 BBSizes[UserMBB->getNumber()];
791 assert(OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()+1]);
793 // If the use is at the end of the block, or the end of the block
794 // is within range, make new water there. (The +2 or 4 below is
795 // for the unconditional branch we will be adding. If the block ends in
796 // an unconditional branch already, it is water, and is known to
797 // be out of range, so we'll always be adding one.)
798 if (&UserMBB->back() == UserMI ||
799 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2 : 4),
800 U.MaxDisp, !isThumb)) {
801 DOUT << "Split at end of block\n";
802 if (&UserMBB->back() == UserMI)
803 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
804 *NewMBB = next(MachineFunction::iterator(UserMBB));
805 // Add an unconditional branch from UserMBB to fallthrough block.
806 // Record it for branch lengthening; this new branch will not get out of
807 // range, but if the preceding conditional branch is out of range, the
808 // targets will be exchanged, and the altered branch may be out of
809 // range, so the machinery has to know about it.
810 int UncondBr = isThumb ? ARM::tB : ARM::B;
811 BuildMI(UserMBB, TII->get(UncondBr)).addMBB(*NewMBB);
812 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
813 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
814 MaxDisp, false, UncondBr));
815 int delta = isThumb ? 2 : 4;
816 BBSizes[UserMBB->getNumber()] += delta;
817 AdjustBBOffsetsAfter(UserMBB, delta);
819 // What a big block. Find a place within the block to split it.
820 // This is a little tricky on Thumb since instructions are 2 bytes
821 // and constant pool entries are 4 bytes: if instruction I references
822 // island CPE, and instruction I+1 references CPE', it will
823 // not work well to put CPE as far forward as possible, since then
824 // CPE' cannot immediately follow it (that location is 2 bytes
825 // farther away from I+1 than CPE was from I) and we'd need to create
827 // The 4 in the following is for the unconditional branch we'll be
828 // inserting (allows for long branch on Thumb). The 2 or 0 is for
829 // alignment of the island.
830 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4 + (isThumb ? 2 : 0);
831 // This could point off the end of the block if we've already got
832 // constant pool entries following this block; only the last one is
833 // in the water list. Back past any possible branches (allow for a
834 // conditional and a maximally long unconditional).
835 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
836 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
838 unsigned EndInsertOffset = BaseInsertOffset +
839 CPEMI->getOperand(2).getImm();
840 MachineBasicBlock::iterator MI = UserMI;
842 unsigned CPUIndex = CPUserIndex+1;
843 for (unsigned Offset = UserOffset+ARM::GetInstSize(UserMI);
844 Offset < BaseInsertOffset;
845 Offset += ARM::GetInstSize(MI),
847 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
848 if (!OffsetIsInRange(Offset, EndInsertOffset,
849 CPUsers[CPUIndex].MaxDisp, !isThumb)) {
850 BaseInsertOffset -= (isThumb ? 2 : 4);
851 EndInsertOffset -= (isThumb ? 2 : 4);
853 // This is overly conservative, as we don't account for CPEMIs
854 // being reused within the block, but it doesn't matter much.
855 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
859 DOUT << "Split in middle of big block\n";
860 *NewMBB = SplitBlockBeforeInstr(prior(MI));
864 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
865 /// is out-of-range. If so, pick it up the constant pool value and move it some
866 /// place in-range. Return true if we changed any addresses (thus must run
867 /// another pass of branch lengthening), false otherwise.
868 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
869 unsigned CPUserIndex){
870 CPUser &U = CPUsers[CPUserIndex];
871 MachineInstr *UserMI = U.MI;
872 MachineInstr *CPEMI = U.CPEMI;
873 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
874 unsigned Size = CPEMI->getOperand(2).getImm();
875 MachineBasicBlock *NewMBB;
876 // Compute this only once, it's expensive
877 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
879 // See if the current entry is within range, or there is a clone of it
881 int result = LookForExistingCPEntry(U, UserOffset);
882 if (result==1) return false;
883 else if (result==2) return true;
885 // No existing clone of this CPE is within range.
886 // We will be generating a new clone. Get a UID for it.
887 unsigned ID = NextUID++;
889 // Look for water where we can place this CPE. We look for the farthest one
890 // away that will work. Forward references only for now (although later
891 // we might find some that are backwards).
892 bool PadNewWater = true;
894 if (!LookForWater(U, UserOffset, &PadNewWater, &NewMBB)) {
896 DOUT << "No water found\n";
897 CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
900 // Okay, we know we can put an island before NewMBB now, do it!
901 MachineBasicBlock *NewIsland = new MachineBasicBlock();
902 Fn.getBasicBlockList().insert(NewMBB, NewIsland);
904 // Update internal data structures to account for the newly inserted MBB.
905 UpdateForInsertedWaterBlock(NewIsland);
907 // Decrement the old entry, and remove it if refcount becomes 0.
908 DecrementOldEntry(CPI, CPEMI, Size);
910 // Now that we have an island to add the CPE to, clone the original CPE and
911 // add it to the island.
912 U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY))
913 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
914 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
917 // Compensate for .align 2 in thumb mode.
918 if (isThumb && PadNewWater) Size += 2;
919 // Increase the size of the island block to account for the new entry.
920 BBSizes[NewIsland->getNumber()] += Size;
921 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
922 AdjustBBOffsetsAfter(NewIsland, Size);
924 // Finally, change the CPI in the instruction operand to be ID.
925 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
926 if (UserMI->getOperand(i).isConstantPoolIndex()) {
927 UserMI->getOperand(i).setConstantPoolIndex(ID);
931 DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
936 /// BBIsInRange - Returns true if the distance between specific MI and
937 /// specific BB can fit in MI's displacement field.
938 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
940 unsigned PCAdj = isThumb ? 4 : 8;
941 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
942 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
944 DOUT << "Branch of destination BB#" << DestBB->getNumber()
945 << " from BB#" << MI->getParent()->getNumber()
946 << " max delta=" << MaxDisp
947 << " at offset " << int(DestOffset-BrOffset) << "\t" << *MI;
949 return OffsetIsInRange(BrOffset, DestOffset, MaxDisp, true);
952 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
953 /// away to fit in its displacement field.
954 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
955 MachineInstr *MI = Br.MI;
956 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
958 // Check to see if the DestBB is already in-range.
959 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
963 return FixUpUnconditionalBr(Fn, Br);
964 return FixUpConditionalBr(Fn, Br);
967 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
968 /// too far away to fit in its displacement field. If the LR register has been
969 /// spilled in the epilogue, then we can use BL to implement a far jump.
970 /// Otherwise, add an intermediate branch instruction to to a branch.
972 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
973 MachineInstr *MI = Br.MI;
974 MachineBasicBlock *MBB = MI->getParent();
975 assert(isThumb && "Expected a Thumb function!");
977 // Use BL to implement far jump.
978 Br.MaxDisp = (1 << 21) * 2;
979 MI->setInstrDescriptor(TII->get(ARM::tBfar));
980 BBSizes[MBB->getNumber()] += 2;
981 AdjustBBOffsetsAfter(MBB, 2);
985 DOUT << " Changed B to long jump " << *MI;
990 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
991 /// far away to fit in its displacement field. It is converted to an inverse
992 /// conditional branch + an unconditional branch to the destination.
994 ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
995 MachineInstr *MI = Br.MI;
996 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
998 // Add a unconditional branch to the destination and invert the branch
999 // condition to jump over it:
1005 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImmedValue();
1006 CC = ARMCC::getOppositeCondition(CC);
1008 // If the branch is at the end of its MBB and that has a fall-through block,
1009 // direct the updated conditional branch to the fall-through block. Otherwise,
1010 // split the MBB before the next instruction.
1011 MachineBasicBlock *MBB = MI->getParent();
1012 MachineInstr *BMI = &MBB->back();
1013 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1017 if (next(MachineBasicBlock::iterator(MI)) == MBB->back() &&
1018 BMI->getOpcode() == Br.UncondBr) {
1019 // Last MI in the BB is a unconditional branch. Can we simply invert the
1020 // condition and swap destinations:
1026 MachineBasicBlock *NewDest = BMI->getOperand(0).getMachineBasicBlock();
1027 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1028 DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
1029 BMI->getOperand(0).setMachineBasicBlock(DestBB);
1030 MI->getOperand(0).setMachineBasicBlock(NewDest);
1031 MI->getOperand(1).setImm(CC);
1038 SplitBlockBeforeInstr(MI);
1039 // No need for the branch to the next block. We're adding a unconditional
1040 // branch to the destination.
1041 MBB->back().eraseFromParent();
1043 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1045 DOUT << " Insert B to BB#" << DestBB->getNumber()
1046 << " also invert condition and change dest. to BB#"
1047 << NextBB->getNumber() << "\n";
1049 // Insert a unconditional branch and replace the conditional branch.
1050 // Also update the ImmBranch as well as adding a new entry for the new branch.
1051 BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
1052 Br.MI = &MBB->back();
1053 BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
1054 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1055 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1056 MI->eraseFromParent();
1058 // Increase the size of MBB to account for the new unconditional branch.
1059 int delta = ARM::GetInstSize(&MBB->back());
1060 BBSizes[MBB->getNumber()] += delta;
1061 AdjustBBOffsetsAfter(MBB, delta);
1065 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1066 /// LR / restores LR to pc.
1067 bool ARMConstantIslands::UndoLRSpillRestore() {
1068 bool MadeChange = false;
1069 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1070 MachineInstr *MI = PushPopMIs[i];
1071 if (MI->getNumOperands() == 1) {
1072 if (MI->getOpcode() == ARM::tPOP_RET &&
1073 MI->getOperand(0).getReg() == ARM::PC)
1074 BuildMI(MI->getParent(), TII->get(ARM::tBX_RET));
1075 MI->eraseFromParent();