1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMTargetMachine.h"
18 #include "ARMAddressingModes.h"
19 #include "ARMConstantPoolValue.h"
20 #include "ARMMachineFunctionInfo.h"
21 #include "llvm/Constants.h"
22 #include "llvm/Module.h"
23 #include "llvm/CodeGen/AsmPrinter.h"
24 #include "llvm/CodeGen/DwarfWriter.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/Target/TargetAsmInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/ADT/SmallPtrSet.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/Support/Compiler.h"
36 #include "llvm/Support/Mangler.h"
37 #include "llvm/Support/MathExtras.h"
41 STATISTIC(EmittedInsts, "Number of machine instrs printed");
44 struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
45 ARMAsmPrinter(std::ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
46 : AsmPrinter(O, TM, T), DW(O, this, T), MMI(NULL), AFI(NULL),
48 Subtarget = &TM.getSubtarget<ARMSubtarget>();
52 MachineModuleInfo *MMI;
54 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
55 /// make the right decision when printing asm code for different targets.
56 const ARMSubtarget *Subtarget;
58 /// AFI - Keep a pointer to ARMFunctionInfo for the current
62 /// We name each basic block in a Function with a unique number, so
63 /// that we can consistently refer to them later. This is cleared
64 /// at the beginning of each call to runOnMachineFunction().
66 typedef std::map<const Value *, unsigned> ValueMapTy;
67 ValueMapTy NumberForBB;
69 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
70 /// non-lazy-pointers for indirect access.
71 std::set<std::string> GVNonLazyPtrs;
73 /// FnStubs - Keeps the set of external function GlobalAddresses that the
74 /// asm printer should generate stubs for.
75 std::set<std::string> FnStubs;
77 /// PCRelGVs - Keeps the set of GlobalValues used in pc relative
79 SmallPtrSet<const GlobalValue*, 8> PCRelGVs;
81 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
84 virtual const char *getPassName() const {
85 return "ARM Assembly Printer";
88 void printOperand(const MachineInstr *MI, int opNum,
89 const char *Modifier = 0);
90 void printSOImmOperand(const MachineInstr *MI, int opNum);
91 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
92 void printSORegOperand(const MachineInstr *MI, int opNum);
93 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
94 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
95 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
96 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
97 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
98 const char *Modifier = 0);
99 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
100 const char *Modifier = 0);
101 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
102 const char *Modifier = 0);
103 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
104 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
106 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
107 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
108 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
109 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
110 void printPredicateOperand(const MachineInstr *MI, int opNum);
111 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
112 void printPCLabel(const MachineInstr *MI, int opNum);
113 void printRegisterList(const MachineInstr *MI, int opNum);
114 void printCPInstOperand(const MachineInstr *MI, int opNum,
115 const char *Modifier);
116 void printJTBlockOperand(const MachineInstr *MI, int opNum);
118 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
119 unsigned AsmVariant, const char *ExtraCode);
121 void printModuleLevelGV(const GlobalVariable* GVar);
122 bool printInstruction(const MachineInstr *MI); // autogenerated.
123 void printMachineInstruction(const MachineInstr *MI);
124 bool runOnMachineFunction(MachineFunction &F);
125 bool doInitialization(Module &M);
126 bool doFinalization(Module &M);
128 /// getSectionForFunction - Return the section that we should emit the
129 /// specified function body into.
130 virtual std::string getSectionForFunction(const Function &F) const;
132 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
134 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
135 printDataDirective(MCPV->getType());
137 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
138 GlobalValue *GV = ACPV->getGV();
139 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
141 Name += ACPV->getSymbol();
142 if (ACPV->isNonLazyPointer()) {
143 GVNonLazyPtrs.insert(Name);
144 printSuffixedName(Name, "$non_lazy_ptr");
145 } else if (ACPV->isStub()) {
146 FnStubs.insert(Name);
147 printSuffixedName(Name, "$stub");
150 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
151 if (ACPV->getPCAdjustment() != 0) {
152 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
153 << utostr(ACPV->getLabelId())
154 << "+" << (unsigned)ACPV->getPCAdjustment();
155 if (ACPV->mustAddCurrentAddress())
161 // If the constant pool value is a extern weak symbol, remember to emit
162 // the weak reference.
163 if (GV && GV->hasExternalWeakLinkage())
164 ExtWeakSymbols.insert(GV);
167 void getAnalysisUsage(AnalysisUsage &AU) const {
168 AsmPrinter::getAnalysisUsage(AU);
169 AU.setPreservesAll();
170 AU.addRequired<MachineModuleInfo>();
173 } // end of anonymous namespace
175 #include "ARMGenAsmWriter.inc"
177 /// createARMCodePrinterPass - Returns a pass that prints the ARM
178 /// assembly code for a MachineFunction to the given output stream,
179 /// using the given target machine description. This should work
180 /// regardless of whether the function is in SSA form.
182 FunctionPass *llvm::createARMCodePrinterPass(std::ostream &o,
183 ARMTargetMachine &tm) {
184 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
187 // Substitute old hook with new one temporary
188 std::string ARMAsmPrinter::getSectionForFunction(const Function &F) const {
189 return TAI->SectionForGlobal(&F);
192 /// runOnMachineFunction - This uses the printInstruction()
193 /// method to print assembly for each instruction.
195 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
196 AFI = MF.getInfo<ARMFunctionInfo>();
198 SetupMachineFunction(MF);
201 // NOTE: we don't print out constant pools here, they are handled as
205 // Print out labels for the function.
206 const Function *F = MF.getFunction();
207 switch (F->getLinkage()) {
208 default: assert(0 && "Unknown linkage type!");
209 case Function::InternalLinkage:
210 SwitchToTextSection("\t.text", F);
212 case Function::ExternalLinkage:
213 SwitchToTextSection("\t.text", F);
214 O << "\t.globl\t" << CurrentFnName << "\n";
216 case Function::WeakLinkage:
217 case Function::LinkOnceLinkage:
218 if (Subtarget->isTargetDarwin()) {
220 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
221 O << "\t.globl\t" << CurrentFnName << "\n";
222 O << "\t.weak_definition\t" << CurrentFnName << "\n";
224 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
229 const char *VisibilityDirective = NULL;
230 if (F->hasHiddenVisibility())
231 VisibilityDirective = TAI->getHiddenDirective();
232 else if (F->hasProtectedVisibility())
233 VisibilityDirective = TAI->getProtectedDirective();
235 if (VisibilityDirective)
236 O << VisibilityDirective << CurrentFnName << "\n";
238 if (AFI->isThumbFunction()) {
239 EmitAlignment(1, F, AFI->getAlign());
240 O << "\t.code\t16\n";
241 O << "\t.thumb_func";
242 if (Subtarget->isTargetDarwin())
243 O << "\t" << CurrentFnName;
249 O << CurrentFnName << ":\n";
250 // Emit pre-function debug information.
251 DW.BeginFunction(&MF);
253 if (Subtarget->isTargetDarwin()) {
254 // If the function is empty, then we need to emit *something*. Otherwise,
255 // the function's label might be associated with something that it wasn't
256 // meant to be associated with. We emit a noop in this situation.
257 MachineFunction::iterator I = MF.begin();
259 if (++I == MF.end() && MF.front().empty())
263 // Print out code for the function.
264 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
266 // Print a label for the basic block.
267 if (I != MF.begin()) {
268 printBasicBlockLabel(I, true, true);
271 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
273 // Print the assembly for the instruction.
274 printMachineInstruction(II);
278 if (TAI->hasDotTypeDotSizeDirective())
279 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
281 // Emit post-function debug information.
287 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
288 const char *Modifier) {
289 const MachineOperand &MO = MI->getOperand(opNum);
290 switch (MO.getType()) {
291 case MachineOperand::MO_Register:
292 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
293 O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
295 assert(0 && "not implemented");
297 case MachineOperand::MO_Immediate: {
298 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
301 O << (int)MO.getImm();
304 case MachineOperand::MO_MachineBasicBlock:
305 printBasicBlockLabel(MO.getMBB());
307 case MachineOperand::MO_GlobalAddress: {
308 bool isCallOp = Modifier && !strcmp(Modifier, "call");
309 GlobalValue *GV = MO.getGlobal();
310 std::string Name = Mang->getValueName(GV);
311 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
312 GV->hasLinkOnceLinkage());
313 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
314 TM.getRelocationModel() != Reloc::Static) {
315 printSuffixedName(Name, "$stub");
316 FnStubs.insert(Name);
320 if (MO.getOffset() > 0)
321 O << '+' << MO.getOffset();
322 else if (MO.getOffset() < 0)
325 if (isCallOp && Subtarget->isTargetELF() &&
326 TM.getRelocationModel() == Reloc::PIC_)
328 if (GV->hasExternalWeakLinkage())
329 ExtWeakSymbols.insert(GV);
332 case MachineOperand::MO_ExternalSymbol: {
333 bool isCallOp = Modifier && !strcmp(Modifier, "call");
334 std::string Name(TAI->getGlobalPrefix());
335 Name += MO.getSymbolName();
336 if (isCallOp && Subtarget->isTargetDarwin() &&
337 TM.getRelocationModel() != Reloc::Static) {
338 printSuffixedName(Name, "$stub");
339 FnStubs.insert(Name);
342 if (isCallOp && Subtarget->isTargetELF() &&
343 TM.getRelocationModel() == Reloc::PIC_)
347 case MachineOperand::MO_ConstantPoolIndex:
348 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
349 << '_' << MO.getIndex();
351 case MachineOperand::MO_JumpTableIndex:
352 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
353 << '_' << MO.getIndex();
356 O << "<unknown operand type>"; abort (); break;
360 static void printSOImm(std::ostream &O, int64_t V, const TargetAsmInfo *TAI) {
361 assert(V < (1 << 12) && "Not a valid so_imm value!");
362 unsigned Imm = ARM_AM::getSOImmValImm(V);
363 unsigned Rot = ARM_AM::getSOImmValRot(V);
365 // Print low-level immediate formation info, per
366 // A5.1.3: "Data-processing operands - Immediate".
368 O << "#" << Imm << ", " << Rot;
369 // Pretty printed version.
370 O << ' ' << TAI->getCommentString() << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
376 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
377 /// immediate in bits 0-7.
378 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
379 const MachineOperand &MO = MI->getOperand(OpNum);
380 assert(MO.isImmediate() && "Not a valid so_imm value!");
381 printSOImm(O, MO.getImm(), TAI);
384 /// printSOImm2PartOperand - SOImm is broken into two pieces using a mov
385 /// followed by a or to materialize.
386 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
387 const MachineOperand &MO = MI->getOperand(OpNum);
388 assert(MO.isImmediate() && "Not a valid so_imm value!");
389 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
390 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
391 printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
393 printPredicateOperand(MI, 2);
399 printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
402 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
403 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
405 // REG REG 0,SH_OPC - e.g. R5, ROR R3
406 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
407 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
408 const MachineOperand &MO1 = MI->getOperand(Op);
409 const MachineOperand &MO2 = MI->getOperand(Op+1);
410 const MachineOperand &MO3 = MI->getOperand(Op+2);
412 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
413 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
415 // Print the shift opc.
417 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
421 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
422 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
423 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
425 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
429 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
430 const MachineOperand &MO1 = MI->getOperand(Op);
431 const MachineOperand &MO2 = MI->getOperand(Op+1);
432 const MachineOperand &MO3 = MI->getOperand(Op+2);
434 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
435 printOperand(MI, Op);
439 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
442 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
444 << (char)ARM_AM::getAM2Op(MO3.getImm())
445 << ARM_AM::getAM2Offset(MO3.getImm());
451 << (char)ARM_AM::getAM2Op(MO3.getImm())
452 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
454 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
456 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
461 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
462 const MachineOperand &MO1 = MI->getOperand(Op);
463 const MachineOperand &MO2 = MI->getOperand(Op+1);
466 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
467 assert(ImmOffs && "Malformed indexed load / store!");
469 << (char)ARM_AM::getAM2Op(MO2.getImm())
474 O << (char)ARM_AM::getAM2Op(MO2.getImm())
475 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
477 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
479 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
483 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
484 const MachineOperand &MO1 = MI->getOperand(Op);
485 const MachineOperand &MO2 = MI->getOperand(Op+1);
486 const MachineOperand &MO3 = MI->getOperand(Op+2);
488 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
489 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
493 << (char)ARM_AM::getAM3Op(MO3.getImm())
494 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
499 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
501 << (char)ARM_AM::getAM3Op(MO3.getImm())
506 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
507 const MachineOperand &MO1 = MI->getOperand(Op);
508 const MachineOperand &MO2 = MI->getOperand(Op+1);
511 O << (char)ARM_AM::getAM3Op(MO2.getImm())
512 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
516 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
517 assert(ImmOffs && "Malformed indexed load / store!");
519 << (char)ARM_AM::getAM3Op(MO2.getImm())
523 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
524 const char *Modifier) {
525 const MachineOperand &MO1 = MI->getOperand(Op);
526 const MachineOperand &MO2 = MI->getOperand(Op+1);
527 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
528 if (Modifier && strcmp(Modifier, "submode") == 0) {
529 if (MO1.getReg() == ARM::SP) {
530 bool isLDM = (MI->getOpcode() == ARM::LDM ||
531 MI->getOpcode() == ARM::LDM_RET);
532 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
534 O << ARM_AM::getAMSubModeStr(Mode);
536 printOperand(MI, Op);
537 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
542 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
543 const char *Modifier) {
544 const MachineOperand &MO1 = MI->getOperand(Op);
545 const MachineOperand &MO2 = MI->getOperand(Op+1);
547 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
548 printOperand(MI, Op);
552 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
554 if (Modifier && strcmp(Modifier, "submode") == 0) {
555 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
556 if (MO1.getReg() == ARM::SP) {
557 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
558 MI->getOpcode() == ARM::FLDMS);
559 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
561 O << ARM_AM::getAMSubModeStr(Mode);
563 } else if (Modifier && strcmp(Modifier, "base") == 0) {
564 // Used for FSTM{D|S} and LSTM{D|S} operations.
565 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
566 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
571 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
573 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
575 << (char)ARM_AM::getAM5Op(MO2.getImm())
581 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
582 const char *Modifier) {
583 if (Modifier && strcmp(Modifier, "label") == 0) {
584 printPCLabel(MI, Op+1);
588 const MachineOperand &MO1 = MI->getOperand(Op);
589 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
590 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
594 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
595 const MachineOperand &MO1 = MI->getOperand(Op);
596 const MachineOperand &MO2 = MI->getOperand(Op+1);
597 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
598 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
602 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
604 const MachineOperand &MO1 = MI->getOperand(Op);
605 const MachineOperand &MO2 = MI->getOperand(Op+1);
606 const MachineOperand &MO3 = MI->getOperand(Op+2);
608 if (!MO1.isRegister()) { // FIXME: This is for CP entries, but isn't right.
609 printOperand(MI, Op);
613 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
615 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
616 else if (unsigned ImmOffs = MO2.getImm()) {
617 O << ", #" << ImmOffs;
625 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
626 printThumbAddrModeRI5Operand(MI, Op, 1);
629 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
630 printThumbAddrModeRI5Operand(MI, Op, 2);
633 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
634 printThumbAddrModeRI5Operand(MI, Op, 4);
637 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
638 const MachineOperand &MO1 = MI->getOperand(Op);
639 const MachineOperand &MO2 = MI->getOperand(Op+1);
640 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
641 if (unsigned ImmOffs = MO2.getImm())
642 O << ", #" << ImmOffs << " * 4";
646 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
647 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
649 O << ARMCondCodeToString(CC);
652 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
653 unsigned Reg = MI->getOperand(opNum).getReg();
655 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
660 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
661 int Id = (int)MI->getOperand(opNum).getImm();
662 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
665 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
667 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
669 if (i != e-1) O << ", ";
674 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
675 const char *Modifier) {
676 assert(Modifier && "This operand only works with a modifier!");
677 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
679 if (!strcmp(Modifier, "label")) {
680 unsigned ID = MI->getOperand(OpNo).getImm();
681 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
682 << '_' << ID << ":\n";
684 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
685 unsigned CPI = MI->getOperand(OpNo).getIndex();
687 const MachineConstantPoolEntry &MCPE = // Chasing pointers is fun?
688 MI->getParent()->getParent()->getConstantPool()->getConstants()[CPI];
690 if (MCPE.isMachineConstantPoolEntry()) {
691 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
692 ARMConstantPoolValue *ACPV =
693 static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
694 if (ACPV->getPCAdjustment() != 0) {
695 const GlobalValue *GV = ACPV->getGV();
699 EmitGlobalConstant(MCPE.Val.ConstVal);
700 // remember to emit the weak reference
701 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
702 if (GV->hasExternalWeakLinkage())
703 ExtWeakSymbols.insert(GV);
708 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
709 const MachineOperand &MO1 = MI->getOperand(OpNo);
710 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
711 unsigned JTI = MO1.getIndex();
712 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
713 << '_' << JTI << '_' << MO2.getImm() << ":\n";
715 const char *JTEntryDirective = TAI->getJumpTableDirective();
716 if (!JTEntryDirective)
717 JTEntryDirective = TAI->getData32bitsDirective();
719 const MachineFunction *MF = MI->getParent()->getParent();
720 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
721 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
722 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
723 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
724 std::set<MachineBasicBlock*> JTSets;
725 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
726 MachineBasicBlock *MBB = JTBBs[i];
727 if (UseSet && JTSets.insert(MBB).second)
728 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
730 O << JTEntryDirective << ' ';
732 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
733 << '_' << JTI << '_' << MO2.getImm()
734 << "_set_" << MBB->getNumber();
735 else if (TM.getRelocationModel() == Reloc::PIC_) {
736 printBasicBlockLabel(MBB, false, false, false);
737 // If the arch uses custom Jump Table directives, don't calc relative to JT
738 if (!TAI->getJumpTableDirective())
739 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
740 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
742 printBasicBlockLabel(MBB, false, false, false);
749 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
750 unsigned AsmVariant, const char *ExtraCode){
751 // Does this asm operand have a single letter operand modifier?
752 if (ExtraCode && ExtraCode[0]) {
753 if (ExtraCode[1] != 0) return true; // Unknown modifier.
755 switch (ExtraCode[0]) {
756 default: return true; // Unknown modifier.
757 case 'c': // Don't print "$" before a global var name or constant.
758 case 'P': // Print a VFP double precision register.
759 printOperand(MI, OpNo);
762 if (TM.getTargetData()->isLittleEndian())
766 if (TM.getTargetData()->isBigEndian())
769 case 'H': // Write second word of DI / DF reference.
770 // Verify that this operand has two consecutive registers.
771 if (!MI->getOperand(OpNo).isRegister() ||
772 OpNo+1 == MI->getNumOperands() ||
773 !MI->getOperand(OpNo+1).isRegister())
775 ++OpNo; // Return the high-part.
779 printOperand(MI, OpNo);
783 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
786 int Opc = MI->getOpcode();
788 case ARM::CONSTPOOL_ENTRY:
789 if (!InCPMode && AFI->isThumbFunction()) {
795 if (InCPMode && AFI->isThumbFunction())
816 // Call the autogenerated instruction printer routines.
817 printInstruction(MI);
820 bool ARMAsmPrinter::doInitialization(Module &M) {
821 // Emit initial debug information.
824 bool Result = AsmPrinter::doInitialization(M);
826 // AsmPrinter::doInitialization should have done this analysis.
827 MMI = getAnalysisToUpdate<MachineModuleInfo>();
829 DW.SetModuleInfo(MMI);
831 // Darwin wants symbols to be quoted if they have complex names.
832 if (Subtarget->isTargetDarwin())
833 Mang->setUseQuotes(true);
838 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
839 /// Don't print things like \n or \0.
840 static void PrintUnmangledNameSafely(const Value *V, std::ostream &OS) {
841 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
847 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
848 const TargetData *TD = TM.getTargetData();
850 if (!GVar->hasInitializer()) // External global require no code
853 // Check to see if this is a special global used by LLVM, if so, emit it.
855 if (EmitSpecialLLVMGlobal(GVar)) {
856 if (Subtarget->isTargetDarwin() &&
857 TM.getRelocationModel() == Reloc::Static) {
858 if (GVar->getName() == "llvm.global_ctors")
859 O << ".reference .constructors_used\n";
860 else if (GVar->getName() == "llvm.global_dtors")
861 O << ".reference .destructors_used\n";
866 bool NoCoalesc = PCRelGVs.count(GVar);
867 std::string SectionName = TAI->SectionForGlobal(GVar, NoCoalesc);
868 std::string name = Mang->getValueName(GVar);
869 Constant *C = GVar->getInitializer();
870 const Type *Type = C->getType();
871 unsigned Size = TD->getABITypeSize(Type);
872 unsigned Align = TD->getPreferredAlignmentLog(GVar);
874 const char *VisibilityDirective = NULL;
875 if (GVar->hasHiddenVisibility())
876 VisibilityDirective = TAI->getHiddenDirective();
877 else if (GVar->hasProtectedVisibility())
878 VisibilityDirective = TAI->getProtectedDirective();
880 if (VisibilityDirective)
881 O << VisibilityDirective << name << "\n";
883 if (Subtarget->isTargetELF())
884 O << "\t.type " << name << ",%object\n";
886 SwitchToDataSection(SectionName.c_str());
888 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal()) {
889 // FIXME: This seems to be pretty darwin-specific
891 if (GVar->hasExternalLinkage()) {
892 if (const char *Directive = TAI->getZeroFillDirective()) {
893 O << "\t.globl\t" << name << "\n";
894 O << Directive << "__DATA, __common, " << name << ", "
895 << Size << ", " << Align << "\n";
900 if (GVar->hasInternalLinkage() || GVar->isWeakForLinker()) {
901 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
903 if (TAI->getLCOMMDirective() != NULL) {
904 if (NoCoalesc || GVar->hasInternalLinkage()) {
905 O << TAI->getLCOMMDirective() << name << "," << Size;
906 if (Subtarget->isTargetDarwin())
909 O << TAI->getCOMMDirective() << name << "," << Size;
911 if (GVar->hasInternalLinkage())
912 O << "\t.local\t" << name << "\n";
913 O << TAI->getCOMMDirective() << name << "," << Size;
914 if (TAI->getCOMMDirectiveTakesAlignment())
915 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
917 O << "\t\t" << TAI->getCommentString() << " ";
918 PrintUnmangledNameSafely(GVar, O);
924 switch (GVar->getLinkage()) {
925 case GlobalValue::LinkOnceLinkage:
926 case GlobalValue::WeakLinkage:
927 if (Subtarget->isTargetDarwin()) {
928 O << "\t.globl " << name << "\n"
929 << "\t.weak_definition " << name << "\n";
931 O << "\t.weak " << name << "\n";
934 case GlobalValue::AppendingLinkage:
935 // FIXME: appending linkage variables should go into a section of
936 // their name or something. For now, just emit them as external.
937 case GlobalValue::ExternalLinkage:
938 O << "\t.globl " << name << "\n";
940 case GlobalValue::InternalLinkage:
943 assert(0 && "Unknown linkage type!");
947 EmitAlignment(Align, GVar);
948 O << name << ":\t\t\t\t" << TAI->getCommentString() << " ";
949 PrintUnmangledNameSafely(GVar, O);
951 if (TAI->hasDotTypeDotSizeDirective())
952 O << "\t.size " << name << ", " << Size << "\n";
954 // If the initializer is a extern weak symbol, remember to emit the weak
956 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
957 if (GV->hasExternalWeakLinkage())
958 ExtWeakSymbols.insert(GV);
960 EmitGlobalConstant(C);
965 bool ARMAsmPrinter::doFinalization(Module &M) {
966 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
968 printModuleLevelGV(I);
970 if (Subtarget->isTargetDarwin()) {
971 SwitchToDataSection("");
973 // Output stubs for dynamically-linked functions
975 for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
977 if (TM.getRelocationModel() == Reloc::PIC_)
978 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
981 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
985 O << "\t.code\t32\n";
988 printSuffixedName(p, "$stub");
990 O << "\t.indirect_symbol " << *i << "\n";
992 printSuffixedName(p, "$slp");
994 if (TM.getRelocationModel() == Reloc::PIC_) {
995 printSuffixedName(p, "$scv");
997 O << "\tadd ip, pc, ip\n";
999 O << "\tldr pc, [ip, #0]\n";
1000 printSuffixedName(p, "$slp");
1003 printSuffixedName(p, "$lazy_ptr");
1004 if (TM.getRelocationModel() == Reloc::PIC_) {
1006 printSuffixedName(p, "$scv");
1010 SwitchToDataSection(".lazy_symbol_pointer", 0);
1011 printSuffixedName(p, "$lazy_ptr");
1013 O << "\t.indirect_symbol " << *i << "\n";
1014 O << "\t.long\tdyld_stub_binding_helper\n";
1018 // Output non-lazy-pointers for external and common global variables.
1019 if (!GVNonLazyPtrs.empty())
1020 SwitchToDataSection(".non_lazy_symbol_pointer", 0);
1021 for (std::set<std::string>::iterator i = GVNonLazyPtrs.begin(),
1022 e = GVNonLazyPtrs.end(); i != e; ++i) {
1024 printSuffixedName(p, "$non_lazy_ptr");
1026 O << "\t.indirect_symbol " << *i << "\n";
1027 O << "\t.long\t0\n";
1030 // Emit initial debug information.
1033 // Funny Darwin hack: This flag tells the linker that no global symbols
1034 // contain code that falls through to other global symbols (e.g. the obvious
1035 // implementation of multiple entry points). If this doesn't occur, the
1036 // linker can safely perform dead code stripping. Since LLVM never
1037 // generates code that does this, it is always safe to set.
1038 O << "\t.subsections_via_symbols\n";
1040 // Emit final debug information for ELF.
1044 return AsmPrinter::doFinalization(M);