1 //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "AArch64InstrInfo.h"
15 #include "AArch64PBQPRegAlloc.h"
16 #include "AArch64Subtarget.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/CodeGen/MachineScheduler.h"
19 #include "llvm/IR/GlobalValue.h"
20 #include "llvm/Support/TargetRegistry.h"
24 #define DEBUG_TYPE "aarch64-subtarget"
26 #define GET_SUBTARGETINFO_CTOR
27 #define GET_SUBTARGETINFO_TARGET_DESC
28 #include "AArch64GenSubtargetInfo.inc"
31 EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
32 "converter pass"), cl::init(true), cl::Hidden);
35 AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
36 // Determine default and user-specified characteristics
38 if (CPUString.empty())
39 CPUString = "generic";
41 ParseSubtargetFeatures(CPUString, FS);
45 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
46 const std::string &CPU,
47 const std::string &FS,
48 const TargetMachine &TM, bool LittleEndian)
49 : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
50 HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
51 HasZeroCycleRegMove(false), HasZeroCycleZeroing(false),
52 IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(),
53 InstrInfo(initializeSubtargetDependencies(FS)),
54 TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {}
56 /// ClassifyGlobalReference - Find the target operand flags that describe
57 /// how a global value should be referenced for the current subtarget.
59 AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
60 const TargetMachine &TM) const {
61 bool isDecl = GV->isDeclarationForLinker();
63 // MachO large model always goes via a GOT, simply to get a single 8-byte
64 // absolute relocation on all global addresses.
65 if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
66 return AArch64II::MO_GOT;
68 // The small code mode's direct accesses use ADRP, which cannot necessarily
69 // produce the value 0 (if the code is above 4GB).
70 if (TM.getCodeModel() == CodeModel::Small &&
71 GV->isWeakForLinker() && isDecl) {
72 // In PIC mode use the GOT, but in absolute mode use a constant pool load.
73 if (TM.getRelocationModel() == Reloc::Static)
74 return AArch64II::MO_CONSTPOOL;
76 return AArch64II::MO_GOT;
79 // If symbol visibility is hidden, the extra load is not needed if
80 // the symbol is definitely defined in the current translation unit.
82 // The handling of non-hidden symbols in PIC mode is rather target-dependent:
83 // + On MachO, if the symbol is defined in this module the GOT can be
85 // + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
86 // defined could end up in unexpected places. Use a GOT.
87 if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
89 return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
90 : AArch64II::MO_NO_FLAG;
92 // No need to go through the GOT for local symbols on ELF.
93 return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
96 return AArch64II::MO_NO_FLAG;
99 /// This function returns the name of a function which has an interface
100 /// like the non-standard bzero function, if such a function exists on
101 /// the current subtarget and it is considered prefereable over
102 /// memset with zero passed as the second argument. Otherwise it
104 const char *AArch64Subtarget::getBZeroEntry() const {
105 // Prefer bzero on Darwin only.
112 void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
113 MachineInstr *begin, MachineInstr *end,
114 unsigned NumRegionInstrs) const {
115 // LNT run (at least on Cyclone) showed reasonably significant gains for
116 // bi-directional scheduling. 253.perlbmk.
117 Policy.OnlyTopDown = false;
118 Policy.OnlyBottomUp = false;
121 bool AArch64Subtarget::enableEarlyIfConversion() const {
122 return EnableEarlyIfConvert;
125 std::unique_ptr<PBQPRAConstraint>
126 AArch64Subtarget::getCustomPBQPConstraints() const {
130 return llvm::make_unique<A57ChainingConstraint>();