501c2668848ba9f05975b06069dae51e4b38c6ce
[oota-llvm.git] / lib / MC / MCDisassembler / EDInfo.h
1 //===- TableGen'erated file -------------------------------------*- C++ -*-===//
2 //
3 // Enhanced Disassembly Info Header
4 //
5 // Automatically generated file, do not edit!
6 //
7 //===----------------------------------------------------------------------===//
8
9 #ifndef EDInfo_
10 #define EDInfo_
11
12 #define EDIS_MAX_OPERANDS 13
13 #define EDIS_MAX_SYNTAXES 2
14
15 enum OperandTypes {
16   kOperandTypeNone,
17   kOperandTypeImmediate,
18   kOperandTypeRegister,
19   kOperandTypeX86Memory,
20   kOperandTypeX86EffectiveAddress,
21   kOperandTypeX86PCRelative,
22   kOperandTypeARMBranchTarget,
23   kOperandTypeARMSoReg,
24   kOperandTypeARMSoImm,
25   kOperandTypeARMSoImm2Part,
26   kOperandTypeARMPredicate,
27   kOperandTypeARMAddrMode2,
28   kOperandTypeARMAddrMode2Offset,
29   kOperandTypeARMAddrMode3,
30   kOperandTypeARMAddrMode3Offset,
31   kOperandTypeARMAddrMode4,
32   kOperandTypeARMAddrMode5,
33   kOperandTypeARMAddrMode6,
34   kOperandTypeARMAddrMode6Offset,
35   kOperandTypeARMAddrModePC,
36   kOperandTypeARMRegisterList,
37   kOperandTypeARMTBAddrMode,
38   kOperandTypeThumbITMask,
39   kOperandTypeThumbAddrModeS1,
40   kOperandTypeThumbAddrModeS2,
41   kOperandTypeThumbAddrModeS4,
42   kOperandTypeThumbAddrModeRR,
43   kOperandTypeThumbAddrModeSP,
44   kOperandTypeThumb2SoReg,
45   kOperandTypeThumb2SoImm,
46   kOperandTypeThumb2AddrModeImm8,
47   kOperandTypeThumb2AddrModeImm8Offset,
48   kOperandTypeThumb2AddrModeImm12,
49   kOperandTypeThumb2AddrModeSoReg,
50   kOperandTypeThumb2AddrModeImm8s4,
51   kOperandTypeThumb2AddrModeImm8s4Offset
52 };
53
54 enum OperandFlags {
55   kOperandFlagSource = 0x1,
56   kOperandFlagTarget = 0x2
57 };
58
59 enum InstructionTypes {
60   kInstructionTypeNone,
61   kInstructionTypeMove,
62   kInstructionTypeBranch,
63   kInstructionTypePush,
64   kInstructionTypePop,
65   kInstructionTypeCall,
66   kInstructionTypeReturn
67 };
68
69
70 #endif