1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "spiller"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/Compiler.h"
30 #include "llvm/ADT/BitVector.h"
31 #include "llvm/ADT/Statistic.h"
32 #include "llvm/ADT/STLExtras.h"
33 #include "llvm/ADT/SmallSet.h"
37 STATISTIC(NumSpills, "Number of register spills");
38 STATISTIC(NumReMats, "Number of re-materialization");
39 STATISTIC(NumDRM , "Number of re-materializable defs elided");
40 STATISTIC(NumStores, "Number of stores added");
41 STATISTIC(NumLoads , "Number of loads added");
42 STATISTIC(NumReused, "Number of values reused");
43 STATISTIC(NumDSE , "Number of dead stores elided");
44 STATISTIC(NumDCE , "Number of copies elided");
45 STATISTIC(NumDSS , "Number of dead spill slots removed");
48 enum SpillerName { simple, local };
50 static cl::opt<SpillerName>
52 cl::desc("Spiller to use: (default: local)"),
54 cl::values(clEnumVal(simple, " simple spiller"),
55 clEnumVal(local, " local spiller"),
60 //===----------------------------------------------------------------------===//
61 // VirtRegMap implementation
62 //===----------------------------------------------------------------------===//
64 VirtRegMap::VirtRegMap(MachineFunction &mf)
65 : TII(*mf.getTarget().getInstrInfo()), MF(mf),
66 Virt2PhysMap(NO_PHYS_REG), Virt2StackSlotMap(NO_STACK_SLOT),
67 Virt2ReMatIdMap(NO_STACK_SLOT), Virt2SplitMap(0),
68 Virt2SplitKillMap(0), ReMatMap(NULL), ReMatId(MAX_STACK_SLOT+1),
69 LowSpillSlot(NO_STACK_SLOT), HighSpillSlot(NO_STACK_SLOT) {
70 SpillSlotToUsesMap.resize(8);
74 void VirtRegMap::grow() {
75 unsigned LastVirtReg = MF.getRegInfo().getLastVirtReg();
76 Virt2PhysMap.grow(LastVirtReg);
77 Virt2StackSlotMap.grow(LastVirtReg);
78 Virt2ReMatIdMap.grow(LastVirtReg);
79 Virt2SplitMap.grow(LastVirtReg);
80 Virt2SplitKillMap.grow(LastVirtReg);
81 ReMatMap.grow(LastVirtReg);
84 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
85 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
86 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
87 "attempt to assign stack slot to already spilled register");
88 const TargetRegisterClass* RC = MF.getRegInfo().getRegClass(virtReg);
89 int SS = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
91 if (LowSpillSlot == NO_STACK_SLOT)
93 if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
95 unsigned Idx = SS-LowSpillSlot;
96 while (Idx >= SpillSlotToUsesMap.size())
97 SpillSlotToUsesMap.resize(SpillSlotToUsesMap.size()*2);
98 Virt2StackSlotMap[virtReg] = SS;
103 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) {
104 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
105 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
106 "attempt to assign stack slot to already spilled register");
108 (SS >= MF.getFrameInfo()->getObjectIndexBegin())) &&
109 "illegal fixed frame index");
110 Virt2StackSlotMap[virtReg] = SS;
113 int VirtRegMap::assignVirtReMatId(unsigned virtReg) {
114 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
115 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
116 "attempt to assign re-mat id to already spilled register");
117 Virt2ReMatIdMap[virtReg] = ReMatId;
121 void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) {
122 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
123 assert(Virt2ReMatIdMap[virtReg] == NO_STACK_SLOT &&
124 "attempt to assign re-mat id to already spilled register");
125 Virt2ReMatIdMap[virtReg] = id;
128 void VirtRegMap::addSpillSlotUse(int FI, MachineInstr *MI) {
129 if (!MF.getFrameInfo()->isFixedObjectIndex(FI)) {
130 assert(FI >= 0 && "Spill slot index should not be negative!");
131 SpillSlotToUsesMap[FI-LowSpillSlot].insert(MI);
135 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
136 MachineInstr *NewMI, ModRef MRInfo) {
137 // Move previous memory references folded to new instruction.
138 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
139 for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
140 E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
141 MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
142 MI2VirtMap.erase(I++);
145 // add new memory reference
146 MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
149 void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo) {
150 MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(MI);
151 MI2VirtMap.insert(IP, std::make_pair(MI, std::make_pair(VirtReg, MRInfo)));
154 void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {
155 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
156 MachineOperand &MO = MI->getOperand(i);
157 if (!MO.isFrameIndex())
159 int FI = MO.getIndex();
160 if (MF.getFrameInfo()->isFixedObjectIndex(FI))
162 SpillSlotToUsesMap[FI-LowSpillSlot].erase(MI);
164 MI2VirtMap.erase(MI);
165 SpillPt2VirtMap.erase(MI);
166 RestorePt2VirtMap.erase(MI);
169 void VirtRegMap::print(std::ostream &OS) const {
170 const TargetRegisterInfo* TRI = MF.getTarget().getRegisterInfo();
172 OS << "********** REGISTER MAP **********\n";
173 for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
174 e = MF.getRegInfo().getLastVirtReg(); i <= e; ++i) {
175 if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
176 OS << "[reg" << i << " -> " << TRI->getName(Virt2PhysMap[i])
180 for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
181 e = MF.getRegInfo().getLastVirtReg(); i <= e; ++i)
182 if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
183 OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
187 void VirtRegMap::dump() const {
192 //===----------------------------------------------------------------------===//
193 // Simple Spiller Implementation
194 //===----------------------------------------------------------------------===//
196 Spiller::~Spiller() {}
199 struct VISIBILITY_HIDDEN SimpleSpiller : public Spiller {
200 bool runOnMachineFunction(MachineFunction& mf, VirtRegMap &VRM);
204 bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
205 DOUT << "********** REWRITE MACHINE CODE **********\n";
206 DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
207 const TargetMachine &TM = MF.getTarget();
208 const TargetInstrInfo &TII = *TM.getInstrInfo();
211 // LoadedRegs - Keep track of which vregs are loaded, so that we only load
212 // each vreg once (in the case where a spilled vreg is used by multiple
213 // operands). This is always smaller than the number of operands to the
214 // current machine instr, so it should be small.
215 std::vector<unsigned> LoadedRegs;
217 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
219 DOUT << MBBI->getBasicBlock()->getName() << ":\n";
220 MachineBasicBlock &MBB = *MBBI;
221 for (MachineBasicBlock::iterator MII = MBB.begin(),
222 E = MBB.end(); MII != E; ++MII) {
223 MachineInstr &MI = *MII;
224 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
225 MachineOperand &MO = MI.getOperand(i);
226 if (MO.isRegister() && MO.getReg()) {
227 if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
228 unsigned VirtReg = MO.getReg();
229 unsigned PhysReg = VRM.getPhys(VirtReg);
230 if (!VRM.isAssignedReg(VirtReg)) {
231 int StackSlot = VRM.getStackSlot(VirtReg);
232 const TargetRegisterClass* RC =
233 MF.getRegInfo().getRegClass(VirtReg);
236 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
237 == LoadedRegs.end()) {
238 TII.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot, RC);
239 MachineInstr *LoadMI = prior(MII);
240 VRM.addSpillSlotUse(StackSlot, LoadMI);
241 LoadedRegs.push_back(VirtReg);
243 DOUT << '\t' << *LoadMI;
247 TII.storeRegToStackSlot(MBB, next(MII), PhysReg, true,
249 MachineInstr *StoreMI = next(MII);
250 VRM.addSpillSlotUse(StackSlot, StoreMI);
254 MF.getRegInfo().setPhysRegUsed(PhysReg);
255 MI.getOperand(i).setReg(PhysReg);
257 MF.getRegInfo().setPhysRegUsed(MO.getReg());
269 //===----------------------------------------------------------------------===//
270 // Local Spiller Implementation
271 //===----------------------------------------------------------------------===//
274 class AvailableSpills;
276 /// LocalSpiller - This spiller does a simple pass over the machine basic
277 /// block to attempt to keep spills in registers as much as possible for
278 /// blocks that have low register pressure (the vreg may be spilled due to
279 /// register pressure in other blocks).
280 class VISIBILITY_HIDDEN LocalSpiller : public Spiller {
281 MachineRegisterInfo *RegInfo;
282 const TargetRegisterInfo *TRI;
283 const TargetInstrInfo *TII;
285 bool runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) {
286 RegInfo = &MF.getRegInfo();
287 TRI = MF.getTarget().getRegisterInfo();
288 TII = MF.getTarget().getInstrInfo();
289 DOUT << "\n**** Local spiller rewriting function '"
290 << MF.getFunction()->getName() << "':\n";
291 DOUT << "**** Machine Instrs (NOTE! Does not include spills and reloads!)"
295 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
297 RewriteMBB(*MBB, VRM);
299 // Mark unused spill slots.
300 MachineFrameInfo *MFI = MF.getFrameInfo();
301 int SS = VRM.getLowSpillSlot();
302 if (SS != VirtRegMap::NO_STACK_SLOT)
303 for (int e = VRM.getHighSpillSlot(); SS <= e; ++SS)
304 if (!VRM.isSpillSlotUsed(SS)) {
305 MFI->RemoveStackObject(SS);
309 DOUT << "**** Post Machine Instrs ****\n";
315 bool PrepForUnfoldOpti(MachineBasicBlock &MBB,
316 MachineBasicBlock::iterator &MII,
317 std::vector<MachineInstr*> &MaybeDeadStores,
318 AvailableSpills &Spills, BitVector &RegKills,
319 std::vector<MachineOperand*> &KillOps,
321 void SpillRegToStackSlot(MachineBasicBlock &MBB,
322 MachineBasicBlock::iterator &MII,
323 int Idx, unsigned PhysReg, int StackSlot,
324 const TargetRegisterClass *RC,
325 bool isAvailable, MachineInstr *&LastStore,
326 AvailableSpills &Spills,
327 SmallSet<MachineInstr*, 4> &ReMatDefs,
329 std::vector<MachineOperand*> &KillOps,
331 void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
335 /// AvailableSpills - As the local spiller is scanning and rewriting an MBB from
336 /// top down, keep track of which spills slots or remat are available in each
339 /// Note that not all physregs are created equal here. In particular, some
340 /// physregs are reloads that we are allowed to clobber or ignore at any time.
341 /// Other physregs are values that the register allocated program is using that
342 /// we cannot CHANGE, but we can read if we like. We keep track of this on a
343 /// per-stack-slot / remat id basis as the low bit in the value of the
344 /// SpillSlotsAvailable entries. The predicate 'canClobberPhysReg()' checks
345 /// this bit and addAvailable sets it if.
347 class VISIBILITY_HIDDEN AvailableSpills {
348 const TargetRegisterInfo *TRI;
349 const TargetInstrInfo *TII;
351 // SpillSlotsOrReMatsAvailable - This map keeps track of all of the spilled
352 // or remat'ed virtual register values that are still available, due to being
353 // loaded or stored to, but not invalidated yet.
354 std::map<int, unsigned> SpillSlotsOrReMatsAvailable;
356 // PhysRegsAvailable - This is the inverse of SpillSlotsOrReMatsAvailable,
357 // indicating which stack slot values are currently held by a physreg. This
358 // is used to invalidate entries in SpillSlotsOrReMatsAvailable when a
359 // physreg is modified.
360 std::multimap<unsigned, int> PhysRegsAvailable;
362 void disallowClobberPhysRegOnly(unsigned PhysReg);
364 void ClobberPhysRegOnly(unsigned PhysReg);
366 AvailableSpills(const TargetRegisterInfo *tri, const TargetInstrInfo *tii)
367 : TRI(tri), TII(tii) {
370 const TargetRegisterInfo *getRegInfo() const { return TRI; }
372 /// getSpillSlotOrReMatPhysReg - If the specified stack slot or remat is
373 /// available in a physical register, return that PhysReg, otherwise
375 unsigned getSpillSlotOrReMatPhysReg(int Slot) const {
376 std::map<int, unsigned>::const_iterator I =
377 SpillSlotsOrReMatsAvailable.find(Slot);
378 if (I != SpillSlotsOrReMatsAvailable.end()) {
379 return I->second >> 1; // Remove the CanClobber bit.
384 /// addAvailable - Mark that the specified stack slot / remat is available in
385 /// the specified physreg. If CanClobber is true, the physreg can be modified
386 /// at any time without changing the semantics of the program.
387 void addAvailable(int SlotOrReMat, MachineInstr *MI, unsigned Reg,
388 bool CanClobber = true) {
389 // If this stack slot is thought to be available in some other physreg,
390 // remove its record.
391 ModifyStackSlotOrReMat(SlotOrReMat);
393 PhysRegsAvailable.insert(std::make_pair(Reg, SlotOrReMat));
394 SpillSlotsOrReMatsAvailable[SlotOrReMat]= (Reg << 1) | (unsigned)CanClobber;
396 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
397 DOUT << "Remembering RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1;
399 DOUT << "Remembering SS#" << SlotOrReMat;
400 DOUT << " in physreg " << TRI->getName(Reg) << "\n";
403 /// canClobberPhysReg - Return true if the spiller is allowed to change the
404 /// value of the specified stackslot register if it desires. The specified
405 /// stack slot must be available in a physreg for this query to make sense.
406 bool canClobberPhysReg(int SlotOrReMat) const {
407 assert(SpillSlotsOrReMatsAvailable.count(SlotOrReMat) &&
408 "Value not available!");
409 return SpillSlotsOrReMatsAvailable.find(SlotOrReMat)->second & 1;
412 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
413 /// stackslot register. The register is still available but is no longer
414 /// allowed to be modifed.
415 void disallowClobberPhysReg(unsigned PhysReg);
417 /// ClobberPhysReg - This is called when the specified physreg changes
418 /// value. We use this to invalidate any info about stuff that lives in
419 /// it and any of its aliases.
420 void ClobberPhysReg(unsigned PhysReg);
422 /// ModifyStackSlotOrReMat - This method is called when the value in a stack
423 /// slot changes. This removes information about which register the previous
424 /// value for this slot lives in (as the previous value is dead now).
425 void ModifyStackSlotOrReMat(int SlotOrReMat);
429 /// disallowClobberPhysRegOnly - Unset the CanClobber bit of the specified
430 /// stackslot register. The register is still available but is no longer
431 /// allowed to be modifed.
432 void AvailableSpills::disallowClobberPhysRegOnly(unsigned PhysReg) {
433 std::multimap<unsigned, int>::iterator I =
434 PhysRegsAvailable.lower_bound(PhysReg);
435 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
436 int SlotOrReMat = I->second;
438 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
439 "Bidirectional map mismatch!");
440 SpillSlotsOrReMatsAvailable[SlotOrReMat] &= ~1;
441 DOUT << "PhysReg " << TRI->getName(PhysReg)
442 << " copied, it is available for use but can no longer be modified\n";
446 /// disallowClobberPhysReg - Unset the CanClobber bit of the specified
447 /// stackslot register and its aliases. The register and its aliases may
448 /// still available but is no longer allowed to be modifed.
449 void AvailableSpills::disallowClobberPhysReg(unsigned PhysReg) {
450 for (const unsigned *AS = TRI->getAliasSet(PhysReg); *AS; ++AS)
451 disallowClobberPhysRegOnly(*AS);
452 disallowClobberPhysRegOnly(PhysReg);
455 /// ClobberPhysRegOnly - This is called when the specified physreg changes
456 /// value. We use this to invalidate any info about stuff we thing lives in it.
457 void AvailableSpills::ClobberPhysRegOnly(unsigned PhysReg) {
458 std::multimap<unsigned, int>::iterator I =
459 PhysRegsAvailable.lower_bound(PhysReg);
460 while (I != PhysRegsAvailable.end() && I->first == PhysReg) {
461 int SlotOrReMat = I->second;
462 PhysRegsAvailable.erase(I++);
463 assert((SpillSlotsOrReMatsAvailable[SlotOrReMat] >> 1) == PhysReg &&
464 "Bidirectional map mismatch!");
465 SpillSlotsOrReMatsAvailable.erase(SlotOrReMat);
466 DOUT << "PhysReg " << TRI->getName(PhysReg)
467 << " clobbered, invalidating ";
468 if (SlotOrReMat > VirtRegMap::MAX_STACK_SLOT)
469 DOUT << "RM#" << SlotOrReMat-VirtRegMap::MAX_STACK_SLOT-1 << "\n";
471 DOUT << "SS#" << SlotOrReMat << "\n";
475 /// ClobberPhysReg - This is called when the specified physreg changes
476 /// value. We use this to invalidate any info about stuff we thing lives in
477 /// it and any of its aliases.
478 void AvailableSpills::ClobberPhysReg(unsigned PhysReg) {
479 for (const unsigned *AS = TRI->getAliasSet(PhysReg); *AS; ++AS)
480 ClobberPhysRegOnly(*AS);
481 ClobberPhysRegOnly(PhysReg);
484 /// ModifyStackSlotOrReMat - This method is called when the value in a stack
485 /// slot changes. This removes information about which register the previous
486 /// value for this slot lives in (as the previous value is dead now).
487 void AvailableSpills::ModifyStackSlotOrReMat(int SlotOrReMat) {
488 std::map<int, unsigned>::iterator It =
489 SpillSlotsOrReMatsAvailable.find(SlotOrReMat);
490 if (It == SpillSlotsOrReMatsAvailable.end()) return;
491 unsigned Reg = It->second >> 1;
492 SpillSlotsOrReMatsAvailable.erase(It);
494 // This register may hold the value of multiple stack slots, only remove this
495 // stack slot from the set of values the register contains.
496 std::multimap<unsigned, int>::iterator I = PhysRegsAvailable.lower_bound(Reg);
498 assert(I != PhysRegsAvailable.end() && I->first == Reg &&
499 "Map inverse broken!");
500 if (I->second == SlotOrReMat) break;
502 PhysRegsAvailable.erase(I);
507 /// InvalidateKills - MI is going to be deleted. If any of its operands are
508 /// marked kill, then invalidate the information.
509 static void InvalidateKills(MachineInstr &MI, BitVector &RegKills,
510 std::vector<MachineOperand*> &KillOps,
511 SmallVector<unsigned, 2> *KillRegs = NULL) {
512 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
513 MachineOperand &MO = MI.getOperand(i);
514 if (!MO.isRegister() || !MO.isUse() || !MO.isKill())
516 unsigned Reg = MO.getReg();
518 KillRegs->push_back(Reg);
519 if (KillOps[Reg] == &MO) {
526 /// InvalidateKill - A MI that defines the specified register is being deleted,
527 /// invalidate the register kill information.
528 static void InvalidateKill(unsigned Reg, BitVector &RegKills,
529 std::vector<MachineOperand*> &KillOps) {
531 KillOps[Reg]->setIsKill(false);
537 /// InvalidateRegDef - If the def operand of the specified def MI is now dead
538 /// (since it's spill instruction is removed), mark it isDead. Also checks if
539 /// the def MI has other definition operands that are not dead. Returns it by
541 static bool InvalidateRegDef(MachineBasicBlock::iterator I,
542 MachineInstr &NewDef, unsigned Reg,
544 // Due to remat, it's possible this reg isn't being reused. That is,
545 // the def of this reg (by prev MI) is now dead.
546 MachineInstr *DefMI = I;
547 MachineOperand *DefOp = NULL;
548 for (unsigned i = 0, e = DefMI->getNumOperands(); i != e; ++i) {
549 MachineOperand &MO = DefMI->getOperand(i);
550 if (MO.isRegister() && MO.isDef()) {
551 if (MO.getReg() == Reg)
553 else if (!MO.isDead())
560 bool FoundUse = false, Done = false;
561 MachineBasicBlock::iterator E = NewDef;
563 for (; !Done && I != E; ++I) {
564 MachineInstr *NMI = I;
565 for (unsigned j = 0, ee = NMI->getNumOperands(); j != ee; ++j) {
566 MachineOperand &MO = NMI->getOperand(j);
567 if (!MO.isRegister() || MO.getReg() != Reg)
571 Done = true; // Stop after scanning all the operands of this MI.
582 /// UpdateKills - Track and update kill info. If a MI reads a register that is
583 /// marked kill, then it must be due to register reuse. Transfer the kill info
585 static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
586 std::vector<MachineOperand*> &KillOps) {
587 const TargetInstrDesc &TID = MI.getDesc();
588 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
589 MachineOperand &MO = MI.getOperand(i);
590 if (!MO.isRegister() || !MO.isUse())
592 unsigned Reg = MO.getReg();
597 // That can't be right. Register is killed but not re-defined and it's
598 // being reused. Let's fix that.
599 KillOps[Reg]->setIsKill(false);
602 if (i < TID.getNumOperands() &&
603 TID.getOperandConstraint(i, TOI::TIED_TO) == -1)
604 // Unless it's a two-address operand, this is the new kill.
613 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
614 const MachineOperand &MO = MI.getOperand(i);
615 if (!MO.isRegister() || !MO.isDef())
617 unsigned Reg = MO.getReg();
623 /// ReMaterialize - Re-materialize definition for Reg targetting DestReg.
625 static void ReMaterialize(MachineBasicBlock &MBB,
626 MachineBasicBlock::iterator &MII,
627 unsigned DestReg, unsigned Reg,
628 const TargetRegisterInfo *TRI,
630 TRI->reMaterialize(MBB, MII, DestReg, VRM.getReMaterializedMI(Reg));
631 MachineInstr *NewMI = prior(MII);
632 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
633 MachineOperand &MO = NewMI->getOperand(i);
634 if (!MO.isRegister() || MO.getReg() == 0)
636 unsigned VirtReg = MO.getReg();
637 if (TargetRegisterInfo::isPhysicalRegister(VirtReg))
640 unsigned SubIdx = MO.getSubReg();
641 unsigned Phys = VRM.getPhys(VirtReg);
643 unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
650 // ReusedOp - For each reused operand, we keep track of a bit of information, in
651 // case we need to rollback upon processing a new operand. See comments below.
654 // The MachineInstr operand that reused an available value.
657 // StackSlotOrReMat - The spill slot or remat id of the value being reused.
658 unsigned StackSlotOrReMat;
660 // PhysRegReused - The physical register the value was available in.
661 unsigned PhysRegReused;
663 // AssignedPhysReg - The physreg that was assigned for use by the reload.
664 unsigned AssignedPhysReg;
666 // VirtReg - The virtual register itself.
669 ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr,
671 : Operand(o), StackSlotOrReMat(ss), PhysRegReused(prr),
672 AssignedPhysReg(apr), VirtReg(vreg) {}
675 /// ReuseInfo - This maintains a collection of ReuseOp's for each operand that
676 /// is reused instead of reloaded.
677 class VISIBILITY_HIDDEN ReuseInfo {
679 std::vector<ReusedOp> Reuses;
680 BitVector PhysRegsClobbered;
682 ReuseInfo(MachineInstr &mi, const TargetRegisterInfo *tri) : MI(mi) {
683 PhysRegsClobbered.resize(tri->getNumRegs());
686 bool hasReuses() const {
687 return !Reuses.empty();
690 /// addReuse - If we choose to reuse a virtual register that is already
691 /// available instead of reloading it, remember that we did so.
692 void addReuse(unsigned OpNo, unsigned StackSlotOrReMat,
693 unsigned PhysRegReused, unsigned AssignedPhysReg,
695 // If the reload is to the assigned register anyway, no undo will be
697 if (PhysRegReused == AssignedPhysReg) return;
699 // Otherwise, remember this.
700 Reuses.push_back(ReusedOp(OpNo, StackSlotOrReMat, PhysRegReused,
701 AssignedPhysReg, VirtReg));
704 void markClobbered(unsigned PhysReg) {
705 PhysRegsClobbered.set(PhysReg);
708 bool isClobbered(unsigned PhysReg) const {
709 return PhysRegsClobbered.test(PhysReg);
712 /// GetRegForReload - We are about to emit a reload into PhysReg. If there
713 /// is some other operand that is using the specified register, either pick
714 /// a new register to use, or evict the previous reload and use this reg.
715 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
716 AvailableSpills &Spills,
717 std::vector<MachineInstr*> &MaybeDeadStores,
718 SmallSet<unsigned, 8> &Rejected,
720 std::vector<MachineOperand*> &KillOps,
722 const TargetInstrInfo* TII = MI->getParent()->getParent()->getTarget()
725 if (Reuses.empty()) return PhysReg; // This is most often empty.
727 for (unsigned ro = 0, e = Reuses.size(); ro != e; ++ro) {
728 ReusedOp &Op = Reuses[ro];
729 // If we find some other reuse that was supposed to use this register
730 // exactly for its reload, we can change this reload to use ITS reload
731 // register. That is, unless its reload register has already been
732 // considered and subsequently rejected because it has also been reused
733 // by another operand.
734 if (Op.PhysRegReused == PhysReg &&
735 Rejected.count(Op.AssignedPhysReg) == 0) {
736 // Yup, use the reload register that we didn't use before.
737 unsigned NewReg = Op.AssignedPhysReg;
738 Rejected.insert(PhysReg);
739 return GetRegForReload(NewReg, MI, Spills, MaybeDeadStores, Rejected,
740 RegKills, KillOps, VRM);
742 // Otherwise, we might also have a problem if a previously reused
743 // value aliases the new register. If so, codegen the previous reload
745 unsigned PRRU = Op.PhysRegReused;
746 const TargetRegisterInfo *TRI = Spills.getRegInfo();
747 if (TRI->areAliases(PRRU, PhysReg)) {
748 // Okay, we found out that an alias of a reused register
749 // was used. This isn't good because it means we have
750 // to undo a previous reuse.
751 MachineBasicBlock *MBB = MI->getParent();
752 const TargetRegisterClass *AliasRC =
753 MBB->getParent()->getRegInfo().getRegClass(Op.VirtReg);
755 // Copy Op out of the vector and remove it, we're going to insert an
756 // explicit load for it.
758 Reuses.erase(Reuses.begin()+ro);
760 // Ok, we're going to try to reload the assigned physreg into the
761 // slot that we were supposed to in the first place. However, that
762 // register could hold a reuse. Check to see if it conflicts or
763 // would prefer us to use a different register.
764 unsigned NewPhysReg = GetRegForReload(NewOp.AssignedPhysReg,
765 MI, Spills, MaybeDeadStores,
766 Rejected, RegKills, KillOps, VRM);
768 MachineBasicBlock::iterator MII = MI;
769 if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
770 ReMaterialize(*MBB, MII, NewPhysReg, NewOp.VirtReg, TRI, VRM);
772 TII->loadRegFromStackSlot(*MBB, MII, NewPhysReg,
773 NewOp.StackSlotOrReMat, AliasRC);
774 MachineInstr *LoadMI = prior(MII);
775 VRM.addSpillSlotUse(NewOp.StackSlotOrReMat, LoadMI);
776 // Any stores to this stack slot are not dead anymore.
777 MaybeDeadStores[NewOp.StackSlotOrReMat] = NULL;
780 Spills.ClobberPhysReg(NewPhysReg);
781 Spills.ClobberPhysReg(NewOp.PhysRegReused);
783 MI->getOperand(NewOp.Operand).setReg(NewPhysReg);
785 Spills.addAvailable(NewOp.StackSlotOrReMat, MI, NewPhysReg);
787 UpdateKills(*MII, RegKills, KillOps);
788 DOUT << '\t' << *MII;
790 DOUT << "Reuse undone!\n";
793 // Finally, PhysReg is now available, go ahead and use it.
801 /// GetRegForReload - Helper for the above GetRegForReload(). Add a
802 /// 'Rejected' set to remember which registers have been considered and
803 /// rejected for the reload. This avoids infinite looping in case like
806 /// t2 <- assigned r0 for use by the reload but ended up reuse r1
807 /// t3 <- assigned r1 for use by the reload but ended up reuse r0
809 /// sees r1 is taken by t2, tries t2's reload register r0
810 /// sees r0 is taken by t3, tries t3's reload register r1
811 /// sees r1 is taken by t2, tries t2's reload register r0 ...
812 unsigned GetRegForReload(unsigned PhysReg, MachineInstr *MI,
813 AvailableSpills &Spills,
814 std::vector<MachineInstr*> &MaybeDeadStores,
816 std::vector<MachineOperand*> &KillOps,
818 SmallSet<unsigned, 8> Rejected;
819 return GetRegForReload(PhysReg, MI, Spills, MaybeDeadStores, Rejected,
820 RegKills, KillOps, VRM);
825 /// PrepForUnfoldOpti - Turn a store folding instruction into a load folding
826 /// instruction. e.g.
828 /// movl %eax, -32(%ebp)
829 /// movl -36(%ebp), %eax
830 /// orl %eax, -32(%ebp)
833 /// orl -36(%ebp), %eax
834 /// mov %eax, -32(%ebp)
835 /// This enables unfolding optimization for a subsequent instruction which will
836 /// also eliminate the newly introduced store instruction.
837 bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
838 MachineBasicBlock::iterator &MII,
839 std::vector<MachineInstr*> &MaybeDeadStores,
840 AvailableSpills &Spills,
842 std::vector<MachineOperand*> &KillOps,
844 MachineFunction &MF = *MBB.getParent();
845 MachineInstr &MI = *MII;
846 unsigned UnfoldedOpc = 0;
847 unsigned UnfoldPR = 0;
848 unsigned UnfoldVR = 0;
849 int FoldedSS = VirtRegMap::NO_STACK_SLOT;
850 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
851 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
852 // Only transform a MI that folds a single register.
855 UnfoldVR = I->second.first;
856 VirtRegMap::ModRef MR = I->second.second;
857 if (VRM.isAssignedReg(UnfoldVR))
859 // If this reference is not a use, any previous store is now dead.
860 // Otherwise, the store to this stack slot is not dead anymore.
861 FoldedSS = VRM.getStackSlot(UnfoldVR);
862 MachineInstr* DeadStore = MaybeDeadStores[FoldedSS];
863 if (DeadStore && (MR & VirtRegMap::isModRef)) {
864 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(FoldedSS);
866 DeadStore->findRegisterUseOperandIdx(PhysReg, true) == -1)
869 UnfoldedOpc = TII->getOpcodeAfterMemoryUnfold(MI.getOpcode(),
877 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
878 MachineOperand &MO = MI.getOperand(i);
879 if (!MO.isRegister() || MO.getReg() == 0 || !MO.isUse())
881 unsigned VirtReg = MO.getReg();
882 if (TargetRegisterInfo::isPhysicalRegister(VirtReg) || MO.getSubReg())
884 if (VRM.isAssignedReg(VirtReg)) {
885 unsigned PhysReg = VRM.getPhys(VirtReg);
886 if (PhysReg && TRI->regsOverlap(PhysReg, UnfoldPR))
888 } else if (VRM.isReMaterialized(VirtReg))
890 int SS = VRM.getStackSlot(VirtReg);
891 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
893 if (TRI->regsOverlap(PhysReg, UnfoldPR))
897 PhysReg = VRM.getPhys(VirtReg);
898 if (!TRI->regsOverlap(PhysReg, UnfoldPR))
901 // Ok, we'll need to reload the value into a register which makes
902 // it impossible to perform the store unfolding optimization later.
903 // Let's see if it is possible to fold the load if the store is
904 // unfolded. This allows us to perform the store unfolding
906 SmallVector<MachineInstr*, 4> NewMIs;
907 if (TII->unfoldMemoryOperand(MF, &MI, UnfoldVR, false, false, NewMIs)) {
908 assert(NewMIs.size() == 1);
909 MachineInstr *NewMI = NewMIs.back();
911 int Idx = NewMI->findRegisterUseOperandIdx(VirtReg);
913 SmallVector<unsigned, 2> Ops;
915 MachineInstr *FoldedMI = TII->foldMemoryOperand(MF, NewMI, Ops, SS);
917 VRM.addSpillSlotUse(SS, FoldedMI);
918 if (!VRM.hasPhys(UnfoldVR))
919 VRM.assignVirt2Phys(UnfoldVR, UnfoldPR);
920 VRM.virtFolded(VirtReg, FoldedMI, VirtRegMap::isRef);
921 MII = MBB.insert(MII, FoldedMI);
922 VRM.RemoveMachineInstrFromMaps(&MI);
932 /// findSuperReg - Find the SubReg's super-register of given register class
933 /// where its SubIdx sub-register is SubReg.
934 static unsigned findSuperReg(const TargetRegisterClass *RC, unsigned SubReg,
935 unsigned SubIdx, const TargetRegisterInfo *TRI) {
936 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
939 if (TRI->getSubReg(Reg, SubIdx) == SubReg)
945 /// SpillRegToStackSlot - Spill a register to a specified stack slot. Check if
946 /// the last store to the same slot is now dead. If so, remove the last store.
947 void LocalSpiller::SpillRegToStackSlot(MachineBasicBlock &MBB,
948 MachineBasicBlock::iterator &MII,
949 int Idx, unsigned PhysReg, int StackSlot,
950 const TargetRegisterClass *RC,
951 bool isAvailable, MachineInstr *&LastStore,
952 AvailableSpills &Spills,
953 SmallSet<MachineInstr*, 4> &ReMatDefs,
955 std::vector<MachineOperand*> &KillOps,
957 TII->storeRegToStackSlot(MBB, next(MII), PhysReg, true, StackSlot, RC);
958 MachineInstr *StoreMI = next(MII);
959 VRM.addSpillSlotUse(StackSlot, StoreMI);
960 DOUT << "Store:\t" << *StoreMI;
962 // If there is a dead store to this stack slot, nuke it now.
964 DOUT << "Removed dead store:\t" << *LastStore;
966 SmallVector<unsigned, 2> KillRegs;
967 InvalidateKills(*LastStore, RegKills, KillOps, &KillRegs);
968 MachineBasicBlock::iterator PrevMII = LastStore;
969 bool CheckDef = PrevMII != MBB.begin();
972 VRM.RemoveMachineInstrFromMaps(LastStore);
973 MBB.erase(LastStore);
975 // Look at defs of killed registers on the store. Mark the defs
976 // as dead since the store has been deleted and they aren't
978 for (unsigned j = 0, ee = KillRegs.size(); j != ee; ++j) {
979 bool HasOtherDef = false;
980 if (InvalidateRegDef(PrevMII, *MII, KillRegs[j], HasOtherDef)) {
981 MachineInstr *DeadDef = PrevMII;
982 if (ReMatDefs.count(DeadDef) && !HasOtherDef) {
983 // FIXME: This assumes a remat def does not have side
985 VRM.RemoveMachineInstrFromMaps(DeadDef);
994 LastStore = next(MII);
996 // If the stack slot value was previously available in some other
997 // register, change it now. Otherwise, make the register available,
999 Spills.ModifyStackSlotOrReMat(StackSlot);
1000 Spills.ClobberPhysReg(PhysReg);
1001 Spills.addAvailable(StackSlot, LastStore, PhysReg, isAvailable);
1005 /// rewriteMBB - Keep track of which spills are available even after the
1006 /// register allocator is done with them. If possible, avid reloading vregs.
1007 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
1008 DOUT << MBB.getBasicBlock()->getName() << ":\n";
1010 MachineFunction &MF = *MBB.getParent();
1012 // Spills - Keep track of which spilled values are available in physregs so
1013 // that we can choose to reuse the physregs instead of emitting reloads.
1014 AvailableSpills Spills(TRI, TII);
1016 // MaybeDeadStores - When we need to write a value back into a stack slot,
1017 // keep track of the inserted store. If the stack slot value is never read
1018 // (because the value was used from some available register, for example), and
1019 // subsequently stored to, the original store is dead. This map keeps track
1020 // of inserted stores that are not used. If we see a subsequent store to the
1021 // same stack slot, the original store is deleted.
1022 std::vector<MachineInstr*> MaybeDeadStores;
1023 MaybeDeadStores.resize(MF.getFrameInfo()->getObjectIndexEnd(), NULL);
1025 // ReMatDefs - These are rematerializable def MIs which are not deleted.
1026 SmallSet<MachineInstr*, 4> ReMatDefs;
1028 // Keep track of kill information.
1029 BitVector RegKills(TRI->getNumRegs());
1030 std::vector<MachineOperand*> KillOps;
1031 KillOps.resize(TRI->getNumRegs(), NULL);
1033 for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
1035 MachineBasicBlock::iterator NextMII = MII; ++NextMII;
1037 VirtRegMap::MI2VirtMapTy::const_iterator I, End;
1038 bool Erased = false;
1039 bool BackTracked = false;
1040 if (PrepForUnfoldOpti(MBB, MII,
1041 MaybeDeadStores, Spills, RegKills, KillOps, VRM))
1042 NextMII = next(MII);
1044 MachineInstr &MI = *MII;
1045 const TargetInstrDesc &TID = MI.getDesc();
1047 // Insert restores here if asked to.
1048 if (VRM.isRestorePt(&MI)) {
1049 std::vector<unsigned> &RestoreRegs = VRM.getRestorePtRestores(&MI);
1050 for (unsigned i = 0, e = RestoreRegs.size(); i != e; ++i) {
1051 unsigned VirtReg = RestoreRegs[e-i-1]; // Reverse order.
1052 if (!VRM.getPreSplitReg(VirtReg))
1053 continue; // Split interval spilled again.
1054 unsigned Phys = VRM.getPhys(VirtReg);
1055 RegInfo->setPhysRegUsed(Phys);
1056 if (VRM.isReMaterialized(VirtReg)) {
1057 ReMaterialize(MBB, MII, Phys, VirtReg, TRI, VRM);
1059 const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
1060 int SS = VRM.getStackSlot(VirtReg);
1061 TII->loadRegFromStackSlot(MBB, &MI, Phys, SS, RC);
1062 MachineInstr *LoadMI = prior(MII);
1063 VRM.addSpillSlotUse(SS, LoadMI);
1066 // This invalidates Phys.
1067 Spills.ClobberPhysReg(Phys);
1068 UpdateKills(*prior(MII), RegKills, KillOps);
1069 DOUT << '\t' << *prior(MII);
1073 // Insert spills here if asked to.
1074 if (VRM.isSpillPt(&MI)) {
1075 std::vector<std::pair<unsigned,bool> > &SpillRegs =
1076 VRM.getSpillPtSpills(&MI);
1077 for (unsigned i = 0, e = SpillRegs.size(); i != e; ++i) {
1078 unsigned VirtReg = SpillRegs[i].first;
1079 bool isKill = SpillRegs[i].second;
1080 if (!VRM.getPreSplitReg(VirtReg))
1081 continue; // Split interval spilled again.
1082 const TargetRegisterClass *RC = RegInfo->getRegClass(VirtReg);
1083 unsigned Phys = VRM.getPhys(VirtReg);
1084 int StackSlot = VRM.getStackSlot(VirtReg);
1085 TII->storeRegToStackSlot(MBB, next(MII), Phys, isKill, StackSlot, RC);
1086 MachineInstr *StoreMI = next(MII);
1087 VRM.addSpillSlotUse(StackSlot, StoreMI);
1088 DOUT << "Store:\t" << StoreMI;
1089 VRM.virtFolded(VirtReg, StoreMI, VirtRegMap::isMod);
1091 NextMII = next(MII);
1094 /// ReusedOperands - Keep track of operand reuse in case we need to undo
1096 ReuseInfo ReusedOperands(MI, TRI);
1097 SmallVector<unsigned, 4> VirtUseOps;
1098 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1099 MachineOperand &MO = MI.getOperand(i);
1100 if (!MO.isRegister() || MO.getReg() == 0)
1101 continue; // Ignore non-register operands.
1103 unsigned VirtReg = MO.getReg();
1104 if (TargetRegisterInfo::isPhysicalRegister(VirtReg)) {
1105 // Ignore physregs for spilling, but remember that it is used by this
1107 RegInfo->setPhysRegUsed(VirtReg);
1111 // We want to process implicit virtual register uses first.
1112 if (MO.isImplicit())
1113 VirtUseOps.insert(VirtUseOps.begin(), i);
1115 VirtUseOps.push_back(i);
1118 // Process all of the spilled uses and all non spilled reg references.
1119 for (unsigned j = 0, e = VirtUseOps.size(); j != e; ++j) {
1120 unsigned i = VirtUseOps[j];
1121 MachineOperand &MO = MI.getOperand(i);
1122 unsigned VirtReg = MO.getReg();
1123 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
1124 "Not a virtual register?");
1126 unsigned SubIdx = MO.getSubReg();
1127 if (VRM.isAssignedReg(VirtReg)) {
1128 // This virtual register was assigned a physreg!
1129 unsigned Phys = VRM.getPhys(VirtReg);
1130 RegInfo->setPhysRegUsed(Phys);
1132 ReusedOperands.markClobbered(Phys);
1133 unsigned RReg = SubIdx ? TRI->getSubReg(Phys, SubIdx) : Phys;
1134 MI.getOperand(i).setReg(RReg);
1138 // This virtual register is now known to be a spilled value.
1140 continue; // Handle defs in the loop below (handle use&def here though)
1142 bool DoReMat = VRM.isReMaterialized(VirtReg);
1143 int SSorRMId = DoReMat
1144 ? VRM.getReMatId(VirtReg) : VRM.getStackSlot(VirtReg);
1145 int ReuseSlot = SSorRMId;
1147 // Check to see if this stack slot is available.
1148 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SSorRMId);
1150 // If this is a sub-register use, make sure the reuse register is in the
1151 // right register class. For example, for x86 not all of the 32-bit
1152 // registers have accessible sub-registers.
1153 // Similarly so for EXTRACT_SUBREG. Consider this:
1155 // MOV32_mr fi#1, EDI
1157 // = EXTRACT_SUBREG fi#1
1158 // fi#1 is available in EDI, but it cannot be reused because it's not in
1159 // the right register file.
1161 (SubIdx || MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)) {
1162 const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
1163 if (!RC->contains(PhysReg))
1168 // This spilled operand might be part of a two-address operand. If this
1169 // is the case, then changing it will necessarily require changing the
1170 // def part of the instruction as well. However, in some cases, we
1171 // aren't allowed to modify the reused register. If none of these cases
1173 bool CanReuse = true;
1174 int ti = TID.getOperandConstraint(i, TOI::TIED_TO);
1176 MI.getOperand(ti).isRegister() &&
1177 MI.getOperand(ti).getReg() == VirtReg) {
1178 // Okay, we have a two address operand. We can reuse this physreg as
1179 // long as we are allowed to clobber the value and there isn't an
1180 // earlier def that has already clobbered the physreg.
1181 CanReuse = Spills.canClobberPhysReg(ReuseSlot) &&
1182 !ReusedOperands.isClobbered(PhysReg);
1186 // If this stack slot value is already available, reuse it!
1187 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1188 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1190 DOUT << "Reusing SS#" << ReuseSlot;
1191 DOUT << " from physreg "
1192 << TRI->getName(PhysReg) << " for vreg"
1193 << VirtReg <<" instead of reloading into physreg "
1194 << TRI->getName(VRM.getPhys(VirtReg)) << "\n";
1195 unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1196 MI.getOperand(i).setReg(RReg);
1198 // The only technical detail we have is that we don't know that
1199 // PhysReg won't be clobbered by a reloaded stack slot that occurs
1200 // later in the instruction. In particular, consider 'op V1, V2'.
1201 // If V1 is available in physreg R0, we would choose to reuse it
1202 // here, instead of reloading it into the register the allocator
1203 // indicated (say R1). However, V2 might have to be reloaded
1204 // later, and it might indicate that it needs to live in R0. When
1205 // this occurs, we need to have information available that
1206 // indicates it is safe to use R1 for the reload instead of R0.
1208 // To further complicate matters, we might conflict with an alias,
1209 // or R0 and R1 might not be compatible with each other. In this
1210 // case, we actually insert a reload for V1 in R1, ensuring that
1211 // we can get at R0 or its alias.
1212 ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
1213 VRM.getPhys(VirtReg), VirtReg);
1215 // Only mark it clobbered if this is a use&def operand.
1216 ReusedOperands.markClobbered(PhysReg);
1219 if (MI.getOperand(i).isKill() &&
1220 ReuseSlot <= VirtRegMap::MAX_STACK_SLOT) {
1221 // This was the last use and the spilled value is still available
1222 // for reuse. That means the spill was unnecessary!
1223 MachineInstr* DeadStore = MaybeDeadStores[ReuseSlot];
1225 DOUT << "Removed dead store:\t" << *DeadStore;
1226 InvalidateKills(*DeadStore, RegKills, KillOps);
1227 VRM.RemoveMachineInstrFromMaps(DeadStore);
1228 MBB.erase(DeadStore);
1229 MaybeDeadStores[ReuseSlot] = NULL;
1236 // Otherwise we have a situation where we have a two-address instruction
1237 // whose mod/ref operand needs to be reloaded. This reload is already
1238 // available in some register "PhysReg", but if we used PhysReg as the
1239 // operand to our 2-addr instruction, the instruction would modify
1240 // PhysReg. This isn't cool if something later uses PhysReg and expects
1241 // to get its initial value.
1243 // To avoid this problem, and to avoid doing a load right after a store,
1244 // we emit a copy from PhysReg into the designated register for this
1246 unsigned DesignatedReg = VRM.getPhys(VirtReg);
1247 assert(DesignatedReg && "Must map virtreg to physreg!");
1249 // Note that, if we reused a register for a previous operand, the
1250 // register we want to reload into might not actually be
1251 // available. If this occurs, use the register indicated by the
1253 if (ReusedOperands.hasReuses())
1254 DesignatedReg = ReusedOperands.GetRegForReload(DesignatedReg, &MI,
1255 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1257 // If the mapped designated register is actually the physreg we have
1258 // incoming, we don't need to inserted a dead copy.
1259 if (DesignatedReg == PhysReg) {
1260 // If this stack slot value is already available, reuse it!
1261 if (ReuseSlot > VirtRegMap::MAX_STACK_SLOT)
1262 DOUT << "Reusing RM#" << ReuseSlot-VirtRegMap::MAX_STACK_SLOT-1;
1264 DOUT << "Reusing SS#" << ReuseSlot;
1265 DOUT << " from physreg " << TRI->getName(PhysReg)
1266 << " for vreg" << VirtReg
1267 << " instead of reloading into same physreg.\n";
1268 unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1269 MI.getOperand(i).setReg(RReg);
1270 ReusedOperands.markClobbered(RReg);
1275 const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
1276 RegInfo->setPhysRegUsed(DesignatedReg);
1277 ReusedOperands.markClobbered(DesignatedReg);
1278 TII->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC, RC);
1280 MachineInstr *CopyMI = prior(MII);
1281 UpdateKills(*CopyMI, RegKills, KillOps);
1283 // This invalidates DesignatedReg.
1284 Spills.ClobberPhysReg(DesignatedReg);
1286 Spills.addAvailable(ReuseSlot, &MI, DesignatedReg);
1288 SubIdx ? TRI->getSubReg(DesignatedReg, SubIdx) : DesignatedReg;
1289 MI.getOperand(i).setReg(RReg);
1290 DOUT << '\t' << *prior(MII);
1295 // Otherwise, reload it and remember that we have it.
1296 PhysReg = VRM.getPhys(VirtReg);
1297 assert(PhysReg && "Must map virtreg to physreg!");
1299 // Note that, if we reused a register for a previous operand, the
1300 // register we want to reload into might not actually be
1301 // available. If this occurs, use the register indicated by the
1303 if (ReusedOperands.hasReuses())
1304 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1305 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1307 RegInfo->setPhysRegUsed(PhysReg);
1308 ReusedOperands.markClobbered(PhysReg);
1310 ReMaterialize(MBB, MII, PhysReg, VirtReg, TRI, VRM);
1312 const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
1313 TII->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
1314 MachineInstr *LoadMI = prior(MII);
1315 VRM.addSpillSlotUse(SSorRMId, LoadMI);
1318 // This invalidates PhysReg.
1319 Spills.ClobberPhysReg(PhysReg);
1321 // Any stores to this stack slot are not dead anymore.
1323 MaybeDeadStores[SSorRMId] = NULL;
1324 Spills.addAvailable(SSorRMId, &MI, PhysReg);
1325 // Assumes this is the last use. IsKill will be unset if reg is reused
1326 // unless it's a two-address operand.
1327 if (TID.getOperandConstraint(i, TOI::TIED_TO) == -1)
1328 MI.getOperand(i).setIsKill();
1329 unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1330 MI.getOperand(i).setReg(RReg);
1331 UpdateKills(*prior(MII), RegKills, KillOps);
1332 DOUT << '\t' << *prior(MII);
1338 // If we have folded references to memory operands, make sure we clear all
1339 // physical registers that may contain the value of the spilled virtual
1341 SmallSet<int, 2> FoldedSS;
1342 for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
1343 unsigned VirtReg = I->second.first;
1344 VirtRegMap::ModRef MR = I->second.second;
1345 DOUT << "Folded vreg: " << VirtReg << " MR: " << MR;
1347 int SS = VRM.getStackSlot(VirtReg);
1348 if (SS == VirtRegMap::NO_STACK_SLOT)
1350 FoldedSS.insert(SS);
1351 DOUT << " - StackSlot: " << SS << "\n";
1353 // If this folded instruction is just a use, check to see if it's a
1354 // straight load from the virt reg slot.
1355 if ((MR & VirtRegMap::isRef) && !(MR & VirtRegMap::isMod)) {
1357 unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx);
1358 if (DestReg && FrameIdx == SS) {
1359 // If this spill slot is available, turn it into a copy (or nothing)
1360 // instead of leaving it as a load!
1361 if (unsigned InReg = Spills.getSpillSlotOrReMatPhysReg(SS)) {
1362 DOUT << "Promoted Load To Copy: " << MI;
1363 if (DestReg != InReg) {
1364 const TargetRegisterClass *RC = RegInfo->getRegClass(VirtReg);
1365 TII->copyRegToReg(MBB, &MI, DestReg, InReg, RC, RC);
1366 // Revisit the copy so we make sure to notice the effects of the
1367 // operation on the destreg (either needing to RA it if it's
1368 // virtual or needing to clobber any values if it's physical).
1370 --NextMII; // backtrack to the copy.
1373 DOUT << "Removing now-noop copy: " << MI;
1374 // Unset last kill since it's being reused.
1375 InvalidateKill(InReg, RegKills, KillOps);
1378 VRM.RemoveMachineInstrFromMaps(&MI);
1381 goto ProcessNextInst;
1384 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1385 SmallVector<MachineInstr*, 4> NewMIs;
1387 TII->unfoldMemoryOperand(MF, &MI, PhysReg, false, false, NewMIs)) {
1388 MBB.insert(MII, NewMIs[0]);
1389 VRM.RemoveMachineInstrFromMaps(&MI);
1392 --NextMII; // backtrack to the unfolded instruction.
1394 goto ProcessNextInst;
1399 // If this reference is not a use, any previous store is now dead.
1400 // Otherwise, the store to this stack slot is not dead anymore.
1401 MachineInstr* DeadStore = MaybeDeadStores[SS];
1403 bool isDead = !(MR & VirtRegMap::isRef);
1404 MachineInstr *NewStore = NULL;
1405 if (MR & VirtRegMap::isModRef) {
1406 unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(SS);
1407 SmallVector<MachineInstr*, 4> NewMIs;
1408 // We can reuse this physreg as long as we are allowed to clobber
1409 // the value and there isn't an earlier def that has already clobbered
1412 !TII->isStoreToStackSlot(&MI, SS) && // Not profitable!
1413 DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 &&
1414 TII->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) {
1415 MBB.insert(MII, NewMIs[0]);
1416 NewStore = NewMIs[1];
1417 MBB.insert(MII, NewStore);
1418 VRM.addSpillSlotUse(SS, NewStore);
1419 VRM.RemoveMachineInstrFromMaps(&MI);
1423 --NextMII; // backtrack to the unfolded instruction.
1429 if (isDead) { // Previous store is dead.
1430 // If we get here, the store is dead, nuke it now.
1431 DOUT << "Removed dead store:\t" << *DeadStore;
1432 InvalidateKills(*DeadStore, RegKills, KillOps);
1433 VRM.RemoveMachineInstrFromMaps(DeadStore);
1434 MBB.erase(DeadStore);
1439 MaybeDeadStores[SS] = NULL;
1441 // Treat this store as a spill merged into a copy. That makes the
1442 // stack slot value available.
1443 VRM.virtFolded(VirtReg, NewStore, VirtRegMap::isMod);
1444 goto ProcessNextInst;
1448 // If the spill slot value is available, and this is a new definition of
1449 // the value, the value is not available anymore.
1450 if (MR & VirtRegMap::isMod) {
1451 // Notice that the value in this stack slot has been modified.
1452 Spills.ModifyStackSlotOrReMat(SS);
1454 // If this is *just* a mod of the value, check to see if this is just a
1455 // store to the spill slot (i.e. the spill got merged into the copy). If
1456 // so, realize that the vreg is available now, and add the store to the
1457 // MaybeDeadStore info.
1459 if (!(MR & VirtRegMap::isRef)) {
1460 if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {
1461 assert(TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
1462 "Src hasn't been allocated yet?");
1463 // Okay, this is certainly a store of SrcReg to [StackSlot]. Mark
1464 // this as a potentially dead store in case there is a subsequent
1465 // store into the stack slot without a read from it.
1466 MaybeDeadStores[StackSlot] = &MI;
1468 // If the stack slot value was previously available in some other
1469 // register, change it now. Otherwise, make the register available,
1471 Spills.addAvailable(StackSlot, &MI, SrcReg, false/*don't clobber*/);
1477 // Process all of the spilled defs.
1478 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
1479 MachineOperand &MO = MI.getOperand(i);
1480 if (!(MO.isRegister() && MO.getReg() && MO.isDef()))
1483 unsigned VirtReg = MO.getReg();
1484 if (!TargetRegisterInfo::isVirtualRegister(VirtReg)) {
1485 // Check to see if this is a noop copy. If so, eliminate the
1486 // instruction before considering the dest reg to be changed.
1488 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1490 DOUT << "Removing now-noop copy: " << MI;
1491 VRM.RemoveMachineInstrFromMaps(&MI);
1494 Spills.disallowClobberPhysReg(VirtReg);
1495 goto ProcessNextInst;
1498 // If it's not a no-op copy, it clobbers the value in the destreg.
1499 Spills.ClobberPhysReg(VirtReg);
1500 ReusedOperands.markClobbered(VirtReg);
1502 // Check to see if this instruction is a load from a stack slot into
1503 // a register. If so, this provides the stack slot value in the reg.
1505 if (unsigned DestReg = TII->isLoadFromStackSlot(&MI, FrameIdx)) {
1506 assert(DestReg == VirtReg && "Unknown load situation!");
1508 // If it is a folded reference, then it's not safe to clobber.
1509 bool Folded = FoldedSS.count(FrameIdx);
1510 // Otherwise, if it wasn't available, remember that it is now!
1511 Spills.addAvailable(FrameIdx, &MI, DestReg, !Folded);
1512 goto ProcessNextInst;
1518 unsigned SubIdx = MO.getSubReg();
1519 bool DoReMat = VRM.isReMaterialized(VirtReg);
1521 ReMatDefs.insert(&MI);
1523 // The only vregs left are stack slot definitions.
1524 int StackSlot = VRM.getStackSlot(VirtReg);
1525 const TargetRegisterClass *RC = RegInfo->getRegClass(VirtReg);
1527 // If this def is part of a two-address operand, make sure to execute
1528 // the store from the correct physical register.
1530 int TiedOp = MI.getDesc().findTiedToSrcOperand(i);
1532 PhysReg = MI.getOperand(TiedOp).getReg();
1534 unsigned SuperReg = findSuperReg(RC, PhysReg, SubIdx, TRI);
1535 assert(SuperReg && TRI->getSubReg(SuperReg, SubIdx) == PhysReg &&
1536 "Can't find corresponding super-register!");
1540 PhysReg = VRM.getPhys(VirtReg);
1541 if (ReusedOperands.isClobbered(PhysReg)) {
1542 // Another def has taken the assigned physreg. It must have been a
1543 // use&def which got it due to reuse. Undo the reuse!
1544 PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI,
1545 Spills, MaybeDeadStores, RegKills, KillOps, VRM);
1549 RegInfo->setPhysRegUsed(PhysReg);
1550 unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
1551 ReusedOperands.markClobbered(RReg);
1552 MI.getOperand(i).setReg(RReg);
1555 MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
1556 SpillRegToStackSlot(MBB, MII, -1, PhysReg, StackSlot, RC, true,
1557 LastStore, Spills, ReMatDefs, RegKills, KillOps, VRM);
1558 NextMII = next(MII);
1560 // Check to see if this is a noop copy. If so, eliminate the
1561 // instruction before considering the dest reg to be changed.
1564 if (TII->isMoveInstr(MI, Src, Dst) && Src == Dst) {
1566 DOUT << "Removing now-noop copy: " << MI;
1567 VRM.RemoveMachineInstrFromMaps(&MI);
1570 UpdateKills(*LastStore, RegKills, KillOps);
1571 goto ProcessNextInst;
1577 if (!Erased && !BackTracked) {
1578 for (MachineBasicBlock::iterator II = MI; II != NextMII; ++II)
1579 UpdateKills(*II, RegKills, KillOps);
1585 llvm::Spiller* llvm::createSpiller() {
1586 switch (SpillerOpt) {
1587 default: assert(0 && "Unreachable!");
1589 return new LocalSpiller();
1591 return new SimpleSpiller();