1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
34 //===----------------------------------------------------------------------===//
36 //===----------------------------------------------------------------------===//
38 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
39 const LiveIntervals &lis,
40 const MachineLoopInfo &mli)
41 : MF(vrm.getMachineFunction()),
45 TII(*MF.getTarget().getInstrInfo()),
47 LastSplitPoint(MF.getNumBlockIDs()) {}
49 void SplitAnalysis::clear() {
55 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
56 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
57 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
58 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
60 // Compute split points on the first call. The pair is independent of the
61 // current live interval.
62 if (!LSP.first.isValid()) {
63 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
64 if (FirstTerm == MBB->end())
65 LSP.first = LIS.getMBBEndIdx(MBB);
67 LSP.first = LIS.getInstructionIndex(FirstTerm);
69 // If there is a landing pad successor, also find the call instruction.
72 // There may not be a call instruction (?) in which case we ignore LPad.
73 LSP.second = LSP.first;
74 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
76 if (I->getDesc().isCall()) {
77 LSP.second = LIS.getInstructionIndex(I);
82 // If CurLI is live into a landing pad successor, move the last split point
83 // back to the call that may throw.
84 if (LPad && LSP.second.isValid() && !LIS.isLiveInToMBB(*CurLI, LPad))
90 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
91 void SplitAnalysis::analyzeUses() {
92 assert(UseSlots.empty() && "Call clear first");
94 // First get all the defs from the interval values. This provides the correct
95 // slots for early clobbers.
96 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
97 E = CurLI->vni_end(); I != E; ++I)
98 if (!(*I)->isPHIDef() && !(*I)->isUnused())
99 UseSlots.push_back((*I)->def);
101 // Get use slots form the use-def chain.
102 const MachineRegisterInfo &MRI = MF.getRegInfo();
103 for (MachineRegisterInfo::use_nodbg_iterator
104 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
106 if (!I.getOperand().isUndef())
107 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
109 array_pod_sort(UseSlots.begin(), UseSlots.end());
111 // Remove duplicates, keeping the smaller slot for each instruction.
112 // That is what we want for early clobbers.
113 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
114 SlotIndex::isSameInstr),
117 // Compute per-live block info.
118 if (!calcLiveBlockInfo()) {
119 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
120 // I am looking at you, SimpleRegisterCoalescing!
121 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
122 const_cast<LiveIntervals&>(LIS)
123 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
125 bool fixed = calcLiveBlockInfo();
127 assert(fixed && "Couldn't fix broken live interval");
130 DEBUG(dbgs() << "Analyze counted "
131 << UseSlots.size() << " instrs, "
132 << LiveBlocks.size() << " spanned.\n");
135 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
136 /// where CurLI is live.
137 bool SplitAnalysis::calcLiveBlockInfo() {
141 LiveInterval::const_iterator LVI = CurLI->begin();
142 LiveInterval::const_iterator LVE = CurLI->end();
144 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
145 UseI = UseSlots.begin();
146 UseE = UseSlots.end();
148 // Loop over basic blocks where CurLI is live.
149 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
153 SlotIndex Start, Stop;
154 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
156 // LVI is the first live segment overlapping MBB.
157 BI.LiveIn = LVI->start <= Start;
161 // Find the first and last uses in the block.
162 BI.Uses = UseI != UseE && *UseI < Stop;
165 assert(BI.FirstUse >= Start);
167 while (UseI != UseE && *UseI < Stop);
168 BI.LastUse = UseI[-1];
169 assert(BI.LastUse < Stop);
172 // Look for gaps in the live range.
175 while (LVI->end < Stop) {
176 SlotIndex LastStop = LVI->end;
177 if (++LVI == LVE || LVI->start >= Stop) {
182 if (LastStop < LVI->start) {
189 // Don't set LiveThrough when the block has a gap.
190 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
191 LiveBlocks.push_back(BI);
193 // FIXME: This should never happen. The live range stops or starts without a
194 // corresponding use. An earlier pass did something wrong.
195 if (!BI.LiveThrough && !BI.Uses)
198 // LVI is now at LVE or LVI->end >= Stop.
202 // Live segment ends exactly at Stop. Move to the next segment.
203 if (LVI->end == Stop && ++LVI == LVE)
206 // Pick the next basic block.
207 if (LVI->start < Stop)
210 MFI = LIS.getMBBFromIndex(LVI->start);
215 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
216 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
217 const LiveInterval &Orig = LIS.getInterval(OrigReg);
218 assert(!Orig.empty() && "Splitting empty interval?");
219 LiveInterval::const_iterator I = Orig.find(Idx);
221 // Range containing Idx should begin at Idx.
222 if (I != Orig.end() && I->start <= Idx)
223 return I->start == Idx;
225 // Range does not contain Idx, previous must end at Idx.
226 return I != Orig.begin() && (--I)->end == Idx;
229 void SplitAnalysis::analyze(const LiveInterval *li) {
236 //===----------------------------------------------------------------------===//
238 //===----------------------------------------------------------------------===//
240 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
241 SplitEditor::SplitEditor(SplitAnalysis &sa,
244 MachineDominatorTree &mdt)
245 : SA(sa), LIS(lis), VRM(vrm),
246 MRI(vrm.getMachineFunction().getRegInfo()),
248 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
249 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
255 void SplitEditor::reset(LiveRangeEdit &lre) {
261 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
264 // We don't need an AliasAnalysis since we will only be performing
265 // cheap-as-a-copy remats anyway.
266 Edit->anyRematerializable(LIS, TII, 0);
269 void SplitEditor::dump() const {
270 if (RegAssign.empty()) {
271 dbgs() << " empty\n";
275 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
276 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
280 VNInfo *SplitEditor::defValue(unsigned RegIdx,
281 const VNInfo *ParentVNI,
283 assert(ParentVNI && "Mapping NULL value");
284 assert(Idx.isValid() && "Invalid SlotIndex");
285 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
286 LiveInterval *LI = Edit->get(RegIdx);
288 // Create a new value.
289 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
291 // Use insert for lookup, so we can add missing values with a second lookup.
292 std::pair<ValueMap::iterator, bool> InsP =
293 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
295 // This was the first time (RegIdx, ParentVNI) was mapped.
296 // Keep it as a simple def without any liveness.
300 // If the previous value was a simple mapping, add liveness for it now.
301 if (VNInfo *OldVNI = InsP.first->second) {
302 SlotIndex Def = OldVNI->def;
303 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
304 // No longer a simple mapping.
305 InsP.first->second = 0;
308 // This is a complex mapping, add liveness for VNI
309 SlotIndex Def = VNI->def;
310 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
315 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
316 assert(ParentVNI && "Mapping NULL value");
317 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
319 // ParentVNI was either unmapped or already complex mapped. Either way.
323 // This was previously a single mapping. Make sure the old def is represented
324 // by a trivial live range.
325 SlotIndex Def = VNI->def;
326 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
330 // extendRange - Extend the live range to reach Idx.
331 // Potentially create phi-def values.
332 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
333 assert(Idx.isValid() && "Invalid SlotIndex");
334 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
335 assert(IdxMBB && "No MBB at Idx");
336 LiveInterval *LI = Edit->get(RegIdx);
338 // Is there a def in the same MBB we can extend?
339 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
342 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
343 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
344 // Perform a search for all predecessor blocks where we know the dominating
345 // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
347 // Initialize the live-out cache the first time it is needed.
348 if (LiveOutSeen.empty()) {
349 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
350 LiveOutSeen.resize(N);
351 LiveOutCache.resize(N);
354 // Blocks where LI should be live-in.
355 SmallVector<MachineDomTreeNode*, 16> LiveIn;
356 LiveIn.push_back(MDT[IdxMBB]);
358 // Remember if we have seen more than one value.
359 bool UniqueVNI = true;
362 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
363 for (unsigned i = 0; i != LiveIn.size(); ++i) {
364 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
365 assert(!MBB->pred_empty() && "Value live-in to entry block?");
366 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
367 PE = MBB->pred_end(); PI != PE; ++PI) {
368 MachineBasicBlock *Pred = *PI;
369 LiveOutPair &LOP = LiveOutCache[Pred];
371 // Is this a known live-out block?
372 if (LiveOutSeen.test(Pred->getNumber())) {
373 if (VNInfo *VNI = LOP.first) {
374 if (IdxVNI && IdxVNI != VNI)
381 // First time. LOP is garbage and must be cleared below.
382 LiveOutSeen.set(Pred->getNumber());
384 // Does Pred provide a live-out value?
385 SlotIndex Start, Last;
386 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
387 Last = Last.getPrevSlot();
388 VNInfo *VNI = LI->extendInBlock(Start, Last);
391 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
392 if (IdxVNI && IdxVNI != VNI)
399 // No, we need a live-in value for Pred as well
401 LiveIn.push_back(MDT[Pred]);
403 UniqueVNI = false; // Loopback to IdxMBB, ask updateSSA() for help.
407 // We may need to add phi-def values to preserve the SSA form.
409 LiveOutPair LOP(IdxVNI, MDT[LIS.getMBBFromIndex(IdxVNI->def)]);
410 // Update LiveOutCache, but skip IdxMBB at LiveIn[0].
411 for (unsigned i = 1, e = LiveIn.size(); i != e; ++i)
412 LiveOutCache[LiveIn[i]->getBlock()] = LOP;
414 IdxVNI = updateSSA(RegIdx, LiveIn, Idx, IdxMBB);
416 // Since we went through the trouble of a full BFS visiting all reaching defs,
417 // the values in LiveIn are now accurate. No more phi-defs are needed
418 // for these blocks, so we can color the live ranges.
419 for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
420 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
421 SlotIndex Start = LIS.getMBBStartIdx(MBB);
422 VNInfo *VNI = LiveOutCache[MBB].first;
424 // Anything in LiveIn other than IdxMBB is live-through.
425 // In IdxMBB, we should stop at Idx unless the same value is live-out.
426 if (MBB == IdxMBB && IdxVNI != VNI)
427 LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
429 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
433 VNInfo *SplitEditor::updateSSA(unsigned RegIdx,
434 SmallVectorImpl<MachineDomTreeNode*> &LiveIn,
436 const MachineBasicBlock *IdxMBB) {
437 // This is essentially the same iterative algorithm that SSAUpdater uses,
438 // except we already have a dominator tree, so we don't have to recompute it.
439 LiveInterval *LI = Edit->get(RegIdx);
444 // Propagate live-out values down the dominator tree, inserting phi-defs
445 // when necessary. Since LiveIn was created by a BFS, going backwards makes
446 // it more likely for us to visit immediate dominators before their
448 for (unsigned i = LiveIn.size(); i; --i) {
449 MachineDomTreeNode *Node = LiveIn[i-1];
450 MachineBasicBlock *MBB = Node->getBlock();
451 MachineDomTreeNode *IDom = Node->getIDom();
452 LiveOutPair IDomValue;
454 // We need a live-in value to a block with no immediate dominator?
455 // This is probably an unreachable block that has survived somehow.
456 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
458 // IDom dominates all of our predecessors, but it may not be the immediate
459 // dominator. Check if any of them have live-out values that are properly
460 // dominated by IDom. If so, we need a phi-def here.
462 IDomValue = LiveOutCache[IDom->getBlock()];
463 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
464 PE = MBB->pred_end(); PI != PE; ++PI) {
465 LiveOutPair Value = LiveOutCache[*PI];
466 if (!Value.first || Value.first == IDomValue.first)
468 // This predecessor is carrying something other than IDomValue.
469 // It could be because IDomValue hasn't propagated yet, or it could be
470 // because MBB is in the dominance frontier of that value.
471 if (MDT.dominates(IDom, Value.second)) {
478 // Create a phi-def if required.
481 SlotIndex Start = LIS.getMBBStartIdx(MBB);
482 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
483 VNI->setIsPHIDef(true);
484 // We no longer need LI to be live-in.
485 LiveIn.erase(LiveIn.begin()+(i-1));
486 // Blocks in LiveIn are either IdxMBB, or have a value live-through.
489 // Check if we need to update live-out info.
490 LiveOutPair &LOP = LiveOutCache[MBB];
491 if (LOP.second == Node || !LiveOutSeen.test(MBB->getNumber())) {
492 // We already have a live-out defined in MBB, so this must be IdxMBB.
493 assert(MBB == IdxMBB && "Adding phi-def to known live-out");
494 LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
496 // This phi-def is also live-out, so color the whole block.
497 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
498 LOP = LiveOutPair(VNI, Node);
500 } else if (IDomValue.first) {
501 // No phi-def here. Remember incoming value for IdxMBB.
503 IdxVNI = IDomValue.first;
504 // IdxMBB need not be live-out.
505 if (!LiveOutSeen.test(MBB->getNumber()))
508 assert(LiveOutSeen.test(MBB->getNumber()) && "Expected live-out block");
509 // Propagate IDomValue if needed:
510 // MBB is live-out and doesn't define its own value.
511 LiveOutPair &LOP = LiveOutCache[MBB];
512 if (LOP.second != Node && LOP.first != IDomValue.first) {
520 assert(IdxVNI && "Didn't find value for Idx");
524 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
527 MachineBasicBlock &MBB,
528 MachineBasicBlock::iterator I) {
529 MachineInstr *CopyMI = 0;
531 LiveInterval *LI = Edit->get(RegIdx);
533 // Attempt cheap-as-a-copy rematerialization.
534 LiveRangeEdit::Remat RM(ParentVNI);
535 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
536 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
538 // Can't remat, just insert a copy from parent.
539 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
540 .addReg(Edit->getReg());
541 Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
544 // Define the value in Reg.
545 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
546 VNI->setCopy(CopyMI);
550 /// Create a new virtual register and live interval.
551 void SplitEditor::openIntv() {
552 assert(!OpenIdx && "Previous LI not closed before openIntv");
554 // Create the complement as index 0.
556 Edit->create(LIS, VRM);
558 // Create the open interval.
559 OpenIdx = Edit->size();
560 Edit->create(LIS, VRM);
563 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
564 assert(OpenIdx && "openIntv not called before enterIntvBefore");
565 DEBUG(dbgs() << " enterIntvBefore " << Idx);
566 Idx = Idx.getBaseIndex();
567 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
569 DEBUG(dbgs() << ": not live\n");
572 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
573 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
574 assert(MI && "enterIntvBefore called with invalid index");
576 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
580 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
581 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
582 SlotIndex End = LIS.getMBBEndIdx(&MBB);
583 SlotIndex Last = End.getPrevSlot();
584 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
585 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
587 DEBUG(dbgs() << ": not live\n");
590 DEBUG(dbgs() << ": valno " << ParentVNI->id);
591 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
592 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
593 RegAssign.insert(VNI->def, End, OpenIdx);
598 /// useIntv - indicate that all instructions in MBB should use OpenLI.
599 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
600 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
603 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
604 assert(OpenIdx && "openIntv not called before useIntv");
605 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
606 RegAssign.insert(Start, End, OpenIdx);
610 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
611 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
612 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
614 // The interval must be live beyond the instruction at Idx.
615 Idx = Idx.getBoundaryIndex();
616 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
618 DEBUG(dbgs() << ": not live\n");
619 return Idx.getNextSlot();
621 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
623 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
624 assert(MI && "No instruction at index");
625 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
626 llvm::next(MachineBasicBlock::iterator(MI)));
630 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
631 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
632 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
634 // The interval must be live into the instruction at Idx.
635 Idx = Idx.getBoundaryIndex();
636 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
638 DEBUG(dbgs() << ": not live\n");
639 return Idx.getNextSlot();
641 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
643 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
644 assert(MI && "No instruction at index");
645 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
649 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
650 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
651 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
652 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
654 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
656 DEBUG(dbgs() << ": not live\n");
660 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
661 MBB.SkipPHIsAndLabels(MBB.begin()));
662 RegAssign.insert(Start, VNI->def, OpenIdx);
667 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
668 assert(OpenIdx && "openIntv not called before overlapIntv");
669 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
670 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
671 "Parent changes value in extended range");
672 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
673 "Range cannot span basic blocks");
675 // The complement interval will be extended as needed by extendRange().
677 markComplexMapped(0, ParentVNI);
678 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
679 RegAssign.insert(Start, End, OpenIdx);
683 /// closeIntv - Indicate that we are done editing the currently open
684 /// LiveInterval, and ranges can be trimmed.
685 void SplitEditor::closeIntv() {
686 assert(OpenIdx && "openIntv not called before closeIntv");
690 /// transferSimpleValues - Transfer all simply defined values to the new live
692 /// Values that were rematerialized or that have multiple defs are left alone.
693 bool SplitEditor::transferSimpleValues() {
694 bool Skipped = false;
695 RegAssignMap::const_iterator AssignI = RegAssign.begin();
696 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
697 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
698 DEBUG(dbgs() << " blit " << *ParentI << ':');
699 VNInfo *ParentVNI = ParentI->valno;
700 // RegAssign has holes where RegIdx 0 should be used.
701 SlotIndex Start = ParentI->start;
702 AssignI.advanceTo(Start);
705 SlotIndex End = ParentI->end;
706 if (!AssignI.valid()) {
708 } else if (AssignI.start() <= Start) {
709 RegIdx = AssignI.value();
710 if (AssignI.stop() < End) {
711 End = AssignI.stop();
716 End = std::min(End, AssignI.start());
718 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
719 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
720 DEBUG(dbgs() << ':' << VNI->id);
721 Edit->get(RegIdx)->addRange(LiveRange(Start, End, VNI));
725 } while (Start != ParentI->end);
726 DEBUG(dbgs() << '\n');
731 void SplitEditor::extendPHIKillRanges() {
732 // Extend live ranges to be live-out for successor PHI values.
733 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
734 E = Edit->getParent().vni_end(); I != E; ++I) {
735 const VNInfo *PHIVNI = *I;
736 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
738 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
739 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
740 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
741 PE = MBB->pred_end(); PI != PE; ++PI) {
742 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
743 // The predecessor may not have a live-out value. That is OK, like an
744 // undef PHI operand.
745 if (Edit->getParent().liveAt(End)) {
746 assert(RegAssign.lookup(End) == RegIdx &&
747 "Different register assignment in phi predecessor");
748 extendRange(RegIdx, End);
754 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
755 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
756 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
757 RE = MRI.reg_end(); RI != RE;) {
758 MachineOperand &MO = RI.getOperand();
759 MachineInstr *MI = MO.getParent();
761 // LiveDebugVariables should have handled all DBG_VALUE instructions.
762 if (MI->isDebugValue()) {
763 DEBUG(dbgs() << "Zapping " << *MI);
768 // <undef> operands don't really read the register, so just assign them to
770 if (MO.isUse() && MO.isUndef()) {
771 MO.setReg(Edit->get(0)->reg);
775 SlotIndex Idx = LIS.getInstructionIndex(MI);
777 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
779 // Rewrite to the mapped register at Idx.
780 unsigned RegIdx = RegAssign.lookup(Idx);
781 MO.setReg(Edit->get(RegIdx)->reg);
782 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
783 << Idx << ':' << RegIdx << '\t' << *MI);
785 // Extend liveness to Idx if the instruction reads reg.
789 // Skip instructions that don't read Reg.
791 if (!MO.getSubReg() && !MO.isEarlyClobber())
793 // We may wan't to extend a live range for a partial redef, or for a use
794 // tied to an early clobber.
795 Idx = Idx.getPrevSlot();
796 if (!Edit->getParent().liveAt(Idx))
799 Idx = Idx.getUseIndex();
801 extendRange(RegIdx, Idx);
805 void SplitEditor::deleteRematVictims() {
806 SmallVector<MachineInstr*, 8> Dead;
807 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
808 LiveInterval *LI = *I;
809 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
811 // Dead defs end at the store slot.
812 if (LII->end != LII->valno->def.getNextSlot())
814 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
815 assert(MI && "Missing instruction for dead def");
816 MI->addRegisterDead(LI->reg, &TRI);
818 if (!MI->allDefsAreDead())
821 DEBUG(dbgs() << "All defs dead: " << *MI);
829 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
832 void SplitEditor::finish() {
833 assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
836 // At this point, the live intervals in Edit contain VNInfos corresponding to
837 // the inserted copies.
839 // Add the original defs from the parent interval.
840 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
841 E = Edit->getParent().vni_end(); I != E; ++I) {
842 const VNInfo *ParentVNI = *I;
843 if (ParentVNI->isUnused())
845 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
846 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
847 VNI->setIsPHIDef(ParentVNI->isPHIDef());
848 VNI->setCopy(ParentVNI->getCopy());
850 // Mark rematted values as complex everywhere to force liveness computation.
851 // The new live ranges may be truncated.
852 if (Edit->didRematerialize(ParentVNI))
853 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
854 markComplexMapped(i, ParentVNI);
858 // Every new interval must have a def by now, otherwise the split is bogus.
859 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
860 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
863 // Transfer the simply mapped values, check if any are complex.
864 bool Complex = transferSimpleValues();
866 extendPHIKillRanges();
870 // Rewrite virtual registers, possibly extending ranges.
871 rewriteAssigned(Complex);
873 // Delete defs that were rematted everywhere.
875 deleteRematVictims();
877 // Get rid of unused values and set phi-kill flags.
878 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
879 (*I)->RenumberValues(LIS);
881 // Now check if any registers were separated into multiple components.
882 ConnectedVNInfoEqClasses ConEQ(LIS);
883 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
884 // Don't use iterators, they are invalidated by create() below.
885 LiveInterval *li = Edit->get(i);
886 unsigned NumComp = ConEQ.Classify(li);
889 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
890 SmallVector<LiveInterval*, 8> dups;
892 for (unsigned i = 1; i != NumComp; ++i)
893 dups.push_back(&Edit->create(LIS, VRM));
894 ConEQ.Distribute(&dups[0], MRI);
897 // Calculate spill weight and allocation hints for new intervals.
898 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
902 //===----------------------------------------------------------------------===//
903 // Single Block Splitting
904 //===----------------------------------------------------------------------===//
906 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
907 /// may be an advantage to split CurLI for the duration of the block.
908 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
909 // If CurLI is local to one block, there is no point to splitting it.
910 if (LiveBlocks.size() <= 1)
912 // Add blocks with multiple uses.
913 for (unsigned i = 0, e = LiveBlocks.size(); i != e; ++i) {
914 const BlockInfo &BI = LiveBlocks[i];
915 if (!BI.Uses || BI.FirstUse == BI.LastUse)
917 Blocks.insert(BI.MBB);
919 return !Blocks.empty();
922 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
923 /// basic block in Blocks.
924 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
925 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
927 for (unsigned i = 0, e = SA.LiveBlocks.size(); i != e; ++i) {
928 const SplitAnalysis::BlockInfo &BI = SA.LiveBlocks[i];
929 if (!BI.Uses || !Blocks.count(BI.MBB))
933 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
934 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
936 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
937 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
939 // The last use is after the last valid split point.
940 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
941 useIntv(SegStart, SegStop);
942 overlapIntv(SegStop, BI.LastUse);