1 //===---------- SplitKit.cpp - Toolkit for splitting live ranges ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SplitAnalysis class as well as mutator functions for
11 // live range splitting.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "regalloc"
17 #include "LiveRangeEdit.h"
18 #include "VirtRegMap.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
21 #include "llvm/CodeGen/MachineDominators.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
31 STATISTIC(NumFinished, "Number of splits finished");
32 STATISTIC(NumSimple, "Number of splits that were simple");
34 //===----------------------------------------------------------------------===//
36 //===----------------------------------------------------------------------===//
38 SplitAnalysis::SplitAnalysis(const VirtRegMap &vrm,
39 const LiveIntervals &lis,
40 const MachineLoopInfo &mli)
41 : MF(vrm.getMachineFunction()),
45 TII(*MF.getTarget().getInstrInfo()),
47 LastSplitPoint(MF.getNumBlockIDs()) {}
49 void SplitAnalysis::clear() {
52 ThroughBlocks.clear();
56 SlotIndex SplitAnalysis::computeLastSplitPoint(unsigned Num) {
57 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
58 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
59 std::pair<SlotIndex, SlotIndex> &LSP = LastSplitPoint[Num];
61 // Compute split points on the first call. The pair is independent of the
62 // current live interval.
63 if (!LSP.first.isValid()) {
64 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
65 if (FirstTerm == MBB->end())
66 LSP.first = LIS.getMBBEndIdx(MBB);
68 LSP.first = LIS.getInstructionIndex(FirstTerm);
70 // If there is a landing pad successor, also find the call instruction.
73 // There may not be a call instruction (?) in which case we ignore LPad.
74 LSP.second = LSP.first;
75 for (MachineBasicBlock::const_iterator I = FirstTerm, E = MBB->begin();
77 if (I->getDesc().isCall()) {
78 LSP.second = LIS.getInstructionIndex(I);
83 // If CurLI is live into a landing pad successor, move the last split point
84 // back to the call that may throw.
85 if (LPad && LSP.second.isValid() && LIS.isLiveInToMBB(*CurLI, LPad))
91 /// analyzeUses - Count instructions, basic blocks, and loops using CurLI.
92 void SplitAnalysis::analyzeUses() {
93 assert(UseSlots.empty() && "Call clear first");
95 // First get all the defs from the interval values. This provides the correct
96 // slots for early clobbers.
97 for (LiveInterval::const_vni_iterator I = CurLI->vni_begin(),
98 E = CurLI->vni_end(); I != E; ++I)
99 if (!(*I)->isPHIDef() && !(*I)->isUnused())
100 UseSlots.push_back((*I)->def);
102 // Get use slots form the use-def chain.
103 const MachineRegisterInfo &MRI = MF.getRegInfo();
104 for (MachineRegisterInfo::use_nodbg_iterator
105 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
107 if (!I.getOperand().isUndef())
108 UseSlots.push_back(LIS.getInstructionIndex(&*I).getDefIndex());
110 array_pod_sort(UseSlots.begin(), UseSlots.end());
112 // Remove duplicates, keeping the smaller slot for each instruction.
113 // That is what we want for early clobbers.
114 UseSlots.erase(std::unique(UseSlots.begin(), UseSlots.end(),
115 SlotIndex::isSameInstr),
118 // Compute per-live block info.
119 if (!calcLiveBlockInfo()) {
120 // FIXME: calcLiveBlockInfo found inconsistencies in the live range.
121 // I am looking at you, SimpleRegisterCoalescing!
122 DEBUG(dbgs() << "*** Fixing inconsistent live interval! ***\n");
123 const_cast<LiveIntervals&>(LIS)
124 .shrinkToUses(const_cast<LiveInterval*>(CurLI));
126 ThroughBlocks.clear();
127 bool fixed = calcLiveBlockInfo();
129 assert(fixed && "Couldn't fix broken live interval");
132 DEBUG(dbgs() << "Analyze counted "
133 << UseSlots.size() << " instrs in "
134 << UseBlocks.size() << " blocks, through "
135 << ThroughBlocks.size() << " blocks.\n");
138 /// calcLiveBlockInfo - Fill the LiveBlocks array with information about blocks
139 /// where CurLI is live.
140 bool SplitAnalysis::calcLiveBlockInfo() {
144 LiveInterval::const_iterator LVI = CurLI->begin();
145 LiveInterval::const_iterator LVE = CurLI->end();
147 SmallVectorImpl<SlotIndex>::const_iterator UseI, UseE;
148 UseI = UseSlots.begin();
149 UseE = UseSlots.end();
151 // Loop over basic blocks where CurLI is live.
152 MachineFunction::iterator MFI = LIS.getMBBFromIndex(LVI->start);
156 SlotIndex Start, Stop;
157 tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB);
159 // LVI is the first live segment overlapping MBB.
160 BI.LiveIn = LVI->start <= Start;
164 // Find the first and last uses in the block.
165 bool Uses = UseI != UseE && *UseI < Stop;
168 assert(BI.FirstUse >= Start);
170 while (UseI != UseE && *UseI < Stop);
171 BI.LastUse = UseI[-1];
172 assert(BI.LastUse < Stop);
175 // Look for gaps in the live range.
178 while (LVI->end < Stop) {
179 SlotIndex LastStop = LVI->end;
180 if (++LVI == LVE || LVI->start >= Stop) {
185 if (LastStop < LVI->start) {
192 // Don't set LiveThrough when the block has a gap.
193 BI.LiveThrough = !hasGap && BI.LiveIn && BI.LiveOut;
195 UseBlocks.push_back(BI);
197 ThroughBlocks.push_back(BI.MBB->getNumber());
199 // FIXME: This should never happen. The live range stops or starts without a
200 // corresponding use. An earlier pass did something wrong.
201 if (!BI.LiveThrough && !Uses)
204 // LVI is now at LVE or LVI->end >= Stop.
208 // Live segment ends exactly at Stop. Move to the next segment.
209 if (LVI->end == Stop && ++LVI == LVE)
212 // Pick the next basic block.
213 if (LVI->start < Stop)
216 MFI = LIS.getMBBFromIndex(LVI->start);
221 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const {
222 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
223 const LiveInterval &Orig = LIS.getInterval(OrigReg);
224 assert(!Orig.empty() && "Splitting empty interval?");
225 LiveInterval::const_iterator I = Orig.find(Idx);
227 // Range containing Idx should begin at Idx.
228 if (I != Orig.end() && I->start <= Idx)
229 return I->start == Idx;
231 // Range does not contain Idx, previous must end at Idx.
232 return I != Orig.begin() && (--I)->end == Idx;
235 void SplitAnalysis::analyze(const LiveInterval *li) {
242 //===----------------------------------------------------------------------===//
244 //===----------------------------------------------------------------------===//
246 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
247 SplitEditor::SplitEditor(SplitAnalysis &sa,
250 MachineDominatorTree &mdt)
251 : SA(sa), LIS(lis), VRM(vrm),
252 MRI(vrm.getMachineFunction().getRegInfo()),
254 TII(*vrm.getMachineFunction().getTarget().getInstrInfo()),
255 TRI(*vrm.getMachineFunction().getTarget().getRegisterInfo()),
261 void SplitEditor::reset(LiveRangeEdit &lre) {
267 // We don't need to clear LiveOutCache, only LiveOutSeen entries are read.
270 // We don't need an AliasAnalysis since we will only be performing
271 // cheap-as-a-copy remats anyway.
272 Edit->anyRematerializable(LIS, TII, 0);
275 void SplitEditor::dump() const {
276 if (RegAssign.empty()) {
277 dbgs() << " empty\n";
281 for (RegAssignMap::const_iterator I = RegAssign.begin(); I.valid(); ++I)
282 dbgs() << " [" << I.start() << ';' << I.stop() << "):" << I.value();
286 VNInfo *SplitEditor::defValue(unsigned RegIdx,
287 const VNInfo *ParentVNI,
289 assert(ParentVNI && "Mapping NULL value");
290 assert(Idx.isValid() && "Invalid SlotIndex");
291 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI");
292 LiveInterval *LI = Edit->get(RegIdx);
294 // Create a new value.
295 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator());
297 // Use insert for lookup, so we can add missing values with a second lookup.
298 std::pair<ValueMap::iterator, bool> InsP =
299 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), VNI));
301 // This was the first time (RegIdx, ParentVNI) was mapped.
302 // Keep it as a simple def without any liveness.
306 // If the previous value was a simple mapping, add liveness for it now.
307 if (VNInfo *OldVNI = InsP.first->second) {
308 SlotIndex Def = OldVNI->def;
309 LI->addRange(LiveRange(Def, Def.getNextSlot(), OldVNI));
310 // No longer a simple mapping.
311 InsP.first->second = 0;
314 // This is a complex mapping, add liveness for VNI
315 SlotIndex Def = VNI->def;
316 LI->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
321 void SplitEditor::markComplexMapped(unsigned RegIdx, const VNInfo *ParentVNI) {
322 assert(ParentVNI && "Mapping NULL value");
323 VNInfo *&VNI = Values[std::make_pair(RegIdx, ParentVNI->id)];
325 // ParentVNI was either unmapped or already complex mapped. Either way.
329 // This was previously a single mapping. Make sure the old def is represented
330 // by a trivial live range.
331 SlotIndex Def = VNI->def;
332 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
336 // extendRange - Extend the live range to reach Idx.
337 // Potentially create phi-def values.
338 void SplitEditor::extendRange(unsigned RegIdx, SlotIndex Idx) {
339 assert(Idx.isValid() && "Invalid SlotIndex");
340 MachineBasicBlock *IdxMBB = LIS.getMBBFromIndex(Idx);
341 assert(IdxMBB && "No MBB at Idx");
342 LiveInterval *LI = Edit->get(RegIdx);
344 // Is there a def in the same MBB we can extend?
345 if (LI->extendInBlock(LIS.getMBBStartIdx(IdxMBB), Idx))
348 // Now for the fun part. We know that ParentVNI potentially has multiple defs,
349 // and we may need to create even more phi-defs to preserve VNInfo SSA form.
350 // Perform a search for all predecessor blocks where we know the dominating
351 // VNInfo. Insert phi-def VNInfos along the path back to IdxMBB.
353 // Initialize the live-out cache the first time it is needed.
354 if (LiveOutSeen.empty()) {
355 unsigned N = VRM.getMachineFunction().getNumBlockIDs();
356 LiveOutSeen.resize(N);
357 LiveOutCache.resize(N);
360 // Blocks where LI should be live-in.
361 SmallVector<MachineDomTreeNode*, 16> LiveIn;
362 LiveIn.push_back(MDT[IdxMBB]);
364 // Remember if we have seen more than one value.
365 bool UniqueVNI = true;
368 // Using LiveOutCache as a visited set, perform a BFS for all reaching defs.
369 for (unsigned i = 0; i != LiveIn.size(); ++i) {
370 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
371 assert(!MBB->pred_empty() && "Value live-in to entry block?");
372 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
373 PE = MBB->pred_end(); PI != PE; ++PI) {
374 MachineBasicBlock *Pred = *PI;
375 LiveOutPair &LOP = LiveOutCache[Pred];
377 // Is this a known live-out block?
378 if (LiveOutSeen.test(Pred->getNumber())) {
379 if (VNInfo *VNI = LOP.first) {
380 if (IdxVNI && IdxVNI != VNI)
387 // First time. LOP is garbage and must be cleared below.
388 LiveOutSeen.set(Pred->getNumber());
390 // Does Pred provide a live-out value?
391 SlotIndex Start, Last;
392 tie(Start, Last) = LIS.getSlotIndexes()->getMBBRange(Pred);
393 Last = Last.getPrevSlot();
394 VNInfo *VNI = LI->extendInBlock(Start, Last);
397 LOP.second = MDT[LIS.getMBBFromIndex(VNI->def)];
398 if (IdxVNI && IdxVNI != VNI)
405 // No, we need a live-in value for Pred as well
407 LiveIn.push_back(MDT[Pred]);
409 UniqueVNI = false; // Loopback to IdxMBB, ask updateSSA() for help.
413 // We may need to add phi-def values to preserve the SSA form.
415 LiveOutPair LOP(IdxVNI, MDT[LIS.getMBBFromIndex(IdxVNI->def)]);
416 // Update LiveOutCache, but skip IdxMBB at LiveIn[0].
417 for (unsigned i = 1, e = LiveIn.size(); i != e; ++i)
418 LiveOutCache[LiveIn[i]->getBlock()] = LOP;
420 IdxVNI = updateSSA(RegIdx, LiveIn, Idx, IdxMBB);
422 // Since we went through the trouble of a full BFS visiting all reaching defs,
423 // the values in LiveIn are now accurate. No more phi-defs are needed
424 // for these blocks, so we can color the live ranges.
425 for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
426 MachineBasicBlock *MBB = LiveIn[i]->getBlock();
427 SlotIndex Start = LIS.getMBBStartIdx(MBB);
428 VNInfo *VNI = LiveOutCache[MBB].first;
430 // Anything in LiveIn other than IdxMBB is live-through.
431 // In IdxMBB, we should stop at Idx unless the same value is live-out.
432 if (MBB == IdxMBB && IdxVNI != VNI)
433 LI->addRange(LiveRange(Start, Idx.getNextSlot(), IdxVNI));
435 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
439 VNInfo *SplitEditor::updateSSA(unsigned RegIdx,
440 SmallVectorImpl<MachineDomTreeNode*> &LiveIn,
442 const MachineBasicBlock *IdxMBB) {
443 // This is essentially the same iterative algorithm that SSAUpdater uses,
444 // except we already have a dominator tree, so we don't have to recompute it.
445 LiveInterval *LI = Edit->get(RegIdx);
450 // Propagate live-out values down the dominator tree, inserting phi-defs
451 // when necessary. Since LiveIn was created by a BFS, going backwards makes
452 // it more likely for us to visit immediate dominators before their
454 for (unsigned i = LiveIn.size(); i; --i) {
455 MachineDomTreeNode *Node = LiveIn[i-1];
456 MachineBasicBlock *MBB = Node->getBlock();
457 MachineDomTreeNode *IDom = Node->getIDom();
458 LiveOutPair IDomValue;
460 // We need a live-in value to a block with no immediate dominator?
461 // This is probably an unreachable block that has survived somehow.
462 bool needPHI = !IDom || !LiveOutSeen.test(IDom->getBlock()->getNumber());
464 // IDom dominates all of our predecessors, but it may not be the immediate
465 // dominator. Check if any of them have live-out values that are properly
466 // dominated by IDom. If so, we need a phi-def here.
468 IDomValue = LiveOutCache[IDom->getBlock()];
469 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
470 PE = MBB->pred_end(); PI != PE; ++PI) {
471 LiveOutPair Value = LiveOutCache[*PI];
472 if (!Value.first || Value.first == IDomValue.first)
474 // This predecessor is carrying something other than IDomValue.
475 // It could be because IDomValue hasn't propagated yet, or it could be
476 // because MBB is in the dominance frontier of that value.
477 if (MDT.dominates(IDom, Value.second)) {
484 // Create a phi-def if required.
487 SlotIndex Start = LIS.getMBBStartIdx(MBB);
488 VNInfo *VNI = LI->getNextValue(Start, 0, LIS.getVNInfoAllocator());
489 VNI->setIsPHIDef(true);
490 // We no longer need LI to be live-in.
491 LiveIn.erase(LiveIn.begin()+(i-1));
492 // Blocks in LiveIn are either IdxMBB, or have a value live-through.
495 // Check if we need to update live-out info.
496 LiveOutPair &LOP = LiveOutCache[MBB];
497 if (LOP.second == Node || !LiveOutSeen.test(MBB->getNumber())) {
498 // We already have a live-out defined in MBB, so this must be IdxMBB.
499 assert(MBB == IdxMBB && "Adding phi-def to known live-out");
500 LI->addRange(LiveRange(Start, Idx.getNextSlot(), VNI));
502 // This phi-def is also live-out, so color the whole block.
503 LI->addRange(LiveRange(Start, LIS.getMBBEndIdx(MBB), VNI));
504 LOP = LiveOutPair(VNI, Node);
506 } else if (IDomValue.first) {
507 // No phi-def here. Remember incoming value for IdxMBB.
509 IdxVNI = IDomValue.first;
510 // IdxMBB need not be live-out.
511 if (!LiveOutSeen.test(MBB->getNumber()))
514 assert(LiveOutSeen.test(MBB->getNumber()) && "Expected live-out block");
515 // Propagate IDomValue if needed:
516 // MBB is live-out and doesn't define its own value.
517 LiveOutPair &LOP = LiveOutCache[MBB];
518 if (LOP.second != Node && LOP.first != IDomValue.first) {
526 assert(IdxVNI && "Didn't find value for Idx");
530 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
533 MachineBasicBlock &MBB,
534 MachineBasicBlock::iterator I) {
535 MachineInstr *CopyMI = 0;
537 LiveInterval *LI = Edit->get(RegIdx);
539 // Attempt cheap-as-a-copy rematerialization.
540 LiveRangeEdit::Remat RM(ParentVNI);
541 if (Edit->canRematerializeAt(RM, UseIdx, true, LIS)) {
542 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, LIS, TII, TRI);
544 // Can't remat, just insert a copy from parent.
545 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
546 .addReg(Edit->getReg());
547 Def = LIS.InsertMachineInstrInMaps(CopyMI).getDefIndex();
550 // Define the value in Reg.
551 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
552 VNI->setCopy(CopyMI);
556 /// Create a new virtual register and live interval.
557 void SplitEditor::openIntv() {
558 assert(!OpenIdx && "Previous LI not closed before openIntv");
560 // Create the complement as index 0.
562 Edit->create(LIS, VRM);
564 // Create the open interval.
565 OpenIdx = Edit->size();
566 Edit->create(LIS, VRM);
569 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) {
570 assert(OpenIdx && "openIntv not called before enterIntvBefore");
571 DEBUG(dbgs() << " enterIntvBefore " << Idx);
572 Idx = Idx.getBaseIndex();
573 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
575 DEBUG(dbgs() << ": not live\n");
578 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
579 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
580 assert(MI && "enterIntvBefore called with invalid index");
582 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI);
586 SlotIndex SplitEditor::enterIntvAtEnd(MachineBasicBlock &MBB) {
587 assert(OpenIdx && "openIntv not called before enterIntvAtEnd");
588 SlotIndex End = LIS.getMBBEndIdx(&MBB);
589 SlotIndex Last = End.getPrevSlot();
590 DEBUG(dbgs() << " enterIntvAtEnd BB#" << MBB.getNumber() << ", " << Last);
591 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last);
593 DEBUG(dbgs() << ": not live\n");
596 DEBUG(dbgs() << ": valno " << ParentVNI->id);
597 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB,
598 LIS.getLastSplitPoint(Edit->getParent(), &MBB));
599 RegAssign.insert(VNI->def, End, OpenIdx);
604 /// useIntv - indicate that all instructions in MBB should use OpenLI.
605 void SplitEditor::useIntv(const MachineBasicBlock &MBB) {
606 useIntv(LIS.getMBBStartIdx(&MBB), LIS.getMBBEndIdx(&MBB));
609 void SplitEditor::useIntv(SlotIndex Start, SlotIndex End) {
610 assert(OpenIdx && "openIntv not called before useIntv");
611 DEBUG(dbgs() << " useIntv [" << Start << ';' << End << "):");
612 RegAssign.insert(Start, End, OpenIdx);
616 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) {
617 assert(OpenIdx && "openIntv not called before leaveIntvAfter");
618 DEBUG(dbgs() << " leaveIntvAfter " << Idx);
620 // The interval must be live beyond the instruction at Idx.
621 Idx = Idx.getBoundaryIndex();
622 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
624 DEBUG(dbgs() << ": not live\n");
625 return Idx.getNextSlot();
627 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
629 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
630 assert(MI && "No instruction at index");
631 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(),
632 llvm::next(MachineBasicBlock::iterator(MI)));
636 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) {
637 assert(OpenIdx && "openIntv not called before leaveIntvBefore");
638 DEBUG(dbgs() << " leaveIntvBefore " << Idx);
640 // The interval must be live into the instruction at Idx.
641 Idx = Idx.getBoundaryIndex();
642 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx);
644 DEBUG(dbgs() << ": not live\n");
645 return Idx.getNextSlot();
647 DEBUG(dbgs() << ": valno " << ParentVNI->id << '\n');
649 MachineInstr *MI = LIS.getInstructionFromIndex(Idx);
650 assert(MI && "No instruction at index");
651 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI);
655 SlotIndex SplitEditor::leaveIntvAtTop(MachineBasicBlock &MBB) {
656 assert(OpenIdx && "openIntv not called before leaveIntvAtTop");
657 SlotIndex Start = LIS.getMBBStartIdx(&MBB);
658 DEBUG(dbgs() << " leaveIntvAtTop BB#" << MBB.getNumber() << ", " << Start);
660 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
662 DEBUG(dbgs() << ": not live\n");
666 VNInfo *VNI = defFromParent(0, ParentVNI, Start, MBB,
667 MBB.SkipPHIsAndLabels(MBB.begin()));
668 RegAssign.insert(Start, VNI->def, OpenIdx);
673 void SplitEditor::overlapIntv(SlotIndex Start, SlotIndex End) {
674 assert(OpenIdx && "openIntv not called before overlapIntv");
675 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start);
676 assert(ParentVNI == Edit->getParent().getVNInfoAt(End.getPrevSlot()) &&
677 "Parent changes value in extended range");
678 assert(LIS.getMBBFromIndex(Start) == LIS.getMBBFromIndex(End) &&
679 "Range cannot span basic blocks");
681 // The complement interval will be extended as needed by extendRange().
683 markComplexMapped(0, ParentVNI);
684 DEBUG(dbgs() << " overlapIntv [" << Start << ';' << End << "):");
685 RegAssign.insert(Start, End, OpenIdx);
689 /// closeIntv - Indicate that we are done editing the currently open
690 /// LiveInterval, and ranges can be trimmed.
691 void SplitEditor::closeIntv() {
692 assert(OpenIdx && "openIntv not called before closeIntv");
696 /// transferSimpleValues - Transfer all simply defined values to the new live
698 /// Values that were rematerialized or that have multiple defs are left alone.
699 bool SplitEditor::transferSimpleValues() {
700 bool Skipped = false;
701 RegAssignMap::const_iterator AssignI = RegAssign.begin();
702 for (LiveInterval::const_iterator ParentI = Edit->getParent().begin(),
703 ParentE = Edit->getParent().end(); ParentI != ParentE; ++ParentI) {
704 DEBUG(dbgs() << " blit " << *ParentI << ':');
705 VNInfo *ParentVNI = ParentI->valno;
706 // RegAssign has holes where RegIdx 0 should be used.
707 SlotIndex Start = ParentI->start;
708 AssignI.advanceTo(Start);
711 SlotIndex End = ParentI->end;
712 if (!AssignI.valid()) {
714 } else if (AssignI.start() <= Start) {
715 RegIdx = AssignI.value();
716 if (AssignI.stop() < End) {
717 End = AssignI.stop();
722 End = std::min(End, AssignI.start());
724 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
725 if (VNInfo *VNI = Values.lookup(std::make_pair(RegIdx, ParentVNI->id))) {
726 DEBUG(dbgs() << ':' << VNI->id);
727 Edit->get(RegIdx)->addRange(LiveRange(Start, End, VNI));
731 } while (Start != ParentI->end);
732 DEBUG(dbgs() << '\n');
737 void SplitEditor::extendPHIKillRanges() {
738 // Extend live ranges to be live-out for successor PHI values.
739 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
740 E = Edit->getParent().vni_end(); I != E; ++I) {
741 const VNInfo *PHIVNI = *I;
742 if (PHIVNI->isUnused() || !PHIVNI->isPHIDef())
744 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
745 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
746 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
747 PE = MBB->pred_end(); PI != PE; ++PI) {
748 SlotIndex End = LIS.getMBBEndIdx(*PI).getPrevSlot();
749 // The predecessor may not have a live-out value. That is OK, like an
750 // undef PHI operand.
751 if (Edit->getParent().liveAt(End)) {
752 assert(RegAssign.lookup(End) == RegIdx &&
753 "Different register assignment in phi predecessor");
754 extendRange(RegIdx, End);
760 /// rewriteAssigned - Rewrite all uses of Edit->getReg().
761 void SplitEditor::rewriteAssigned(bool ExtendRanges) {
762 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()),
763 RE = MRI.reg_end(); RI != RE;) {
764 MachineOperand &MO = RI.getOperand();
765 MachineInstr *MI = MO.getParent();
767 // LiveDebugVariables should have handled all DBG_VALUE instructions.
768 if (MI->isDebugValue()) {
769 DEBUG(dbgs() << "Zapping " << *MI);
774 // <undef> operands don't really read the register, so just assign them to
776 if (MO.isUse() && MO.isUndef()) {
777 MO.setReg(Edit->get(0)->reg);
781 SlotIndex Idx = LIS.getInstructionIndex(MI);
783 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex();
785 // Rewrite to the mapped register at Idx.
786 unsigned RegIdx = RegAssign.lookup(Idx);
787 MO.setReg(Edit->get(RegIdx)->reg);
788 DEBUG(dbgs() << " rewr BB#" << MI->getParent()->getNumber() << '\t'
789 << Idx << ':' << RegIdx << '\t' << *MI);
791 // Extend liveness to Idx if the instruction reads reg.
795 // Skip instructions that don't read Reg.
797 if (!MO.getSubReg() && !MO.isEarlyClobber())
799 // We may wan't to extend a live range for a partial redef, or for a use
800 // tied to an early clobber.
801 Idx = Idx.getPrevSlot();
802 if (!Edit->getParent().liveAt(Idx))
805 Idx = Idx.getUseIndex();
807 extendRange(RegIdx, Idx);
811 void SplitEditor::deleteRematVictims() {
812 SmallVector<MachineInstr*, 8> Dead;
813 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){
814 LiveInterval *LI = *I;
815 for (LiveInterval::const_iterator LII = LI->begin(), LIE = LI->end();
817 // Dead defs end at the store slot.
818 if (LII->end != LII->valno->def.getNextSlot())
820 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
821 assert(MI && "Missing instruction for dead def");
822 MI->addRegisterDead(LI->reg, &TRI);
824 if (!MI->allDefsAreDead())
827 DEBUG(dbgs() << "All defs dead: " << *MI);
835 Edit->eliminateDeadDefs(Dead, LIS, VRM, TII);
838 void SplitEditor::finish() {
839 assert(OpenIdx == 0 && "Previous LI not closed before rewrite");
842 // At this point, the live intervals in Edit contain VNInfos corresponding to
843 // the inserted copies.
845 // Add the original defs from the parent interval.
846 for (LiveInterval::const_vni_iterator I = Edit->getParent().vni_begin(),
847 E = Edit->getParent().vni_end(); I != E; ++I) {
848 const VNInfo *ParentVNI = *I;
849 if (ParentVNI->isUnused())
851 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
852 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
853 VNI->setIsPHIDef(ParentVNI->isPHIDef());
854 VNI->setCopy(ParentVNI->getCopy());
856 // Mark rematted values as complex everywhere to force liveness computation.
857 // The new live ranges may be truncated.
858 if (Edit->didRematerialize(ParentVNI))
859 for (unsigned i = 0, e = Edit->size(); i != e; ++i)
860 markComplexMapped(i, ParentVNI);
864 // Every new interval must have a def by now, otherwise the split is bogus.
865 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
866 assert((*I)->hasAtLeastOneValue() && "Split interval has no value");
869 // Transfer the simply mapped values, check if any are complex.
870 bool Complex = transferSimpleValues();
872 extendPHIKillRanges();
876 // Rewrite virtual registers, possibly extending ranges.
877 rewriteAssigned(Complex);
879 // Delete defs that were rematted everywhere.
881 deleteRematVictims();
883 // Get rid of unused values and set phi-kill flags.
884 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I)
885 (*I)->RenumberValues(LIS);
887 // Now check if any registers were separated into multiple components.
888 ConnectedVNInfoEqClasses ConEQ(LIS);
889 for (unsigned i = 0, e = Edit->size(); i != e; ++i) {
890 // Don't use iterators, they are invalidated by create() below.
891 LiveInterval *li = Edit->get(i);
892 unsigned NumComp = ConEQ.Classify(li);
895 DEBUG(dbgs() << " " << NumComp << " components: " << *li << '\n');
896 SmallVector<LiveInterval*, 8> dups;
898 for (unsigned i = 1; i != NumComp; ++i)
899 dups.push_back(&Edit->create(LIS, VRM));
900 ConEQ.Distribute(&dups[0], MRI);
903 // Calculate spill weight and allocation hints for new intervals.
904 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), LIS, SA.Loops);
908 //===----------------------------------------------------------------------===//
909 // Single Block Splitting
910 //===----------------------------------------------------------------------===//
912 /// getMultiUseBlocks - if CurLI has more than one use in a basic block, it
913 /// may be an advantage to split CurLI for the duration of the block.
914 bool SplitAnalysis::getMultiUseBlocks(BlockPtrSet &Blocks) {
915 // If CurLI is local to one block, there is no point to splitting it.
916 if (UseBlocks.size() <= 1)
918 // Add blocks with multiple uses.
919 for (unsigned i = 0, e = UseBlocks.size(); i != e; ++i) {
920 const BlockInfo &BI = UseBlocks[i];
921 if (BI.FirstUse == BI.LastUse)
923 Blocks.insert(BI.MBB);
925 return !Blocks.empty();
928 /// splitSingleBlocks - Split CurLI into a separate live interval inside each
929 /// basic block in Blocks.
930 void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) {
931 DEBUG(dbgs() << " splitSingleBlocks for " << Blocks.size() << " blocks.\n");
932 ArrayRef<SplitAnalysis::BlockInfo> UseBlocks = SA.getUseBlocks();
933 for (unsigned i = 0; i != UseBlocks.size(); ++i) {
934 const SplitAnalysis::BlockInfo &BI = UseBlocks[i];
935 if (!Blocks.count(BI.MBB))
939 SlotIndex LastSplitPoint = SA.getLastSplitPoint(BI.MBB->getNumber());
940 SlotIndex SegStart = enterIntvBefore(std::min(BI.FirstUse,
942 if (!BI.LiveOut || BI.LastUse < LastSplitPoint) {
943 useIntv(SegStart, leaveIntvAfter(BI.LastUse));
945 // The last use is after the last valid split point.
946 SlotIndex SegStop = leaveIntvBefore(LastSplitPoint);
947 useIntv(SegStart, SegStop);
948 overlapIntv(SegStop, BI.LastUse);